QuarkPlatformPkg: remove TrEE reference.
[mirror_edk2.git] / QuarkPlatformPkg / Quark.fdf
CommitLineData
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1## @file\r
2# FDF file of Clanton Peak CRB platform with 32-bit DXE\r
3#\r
4# This package provides QuarkNcSocId platform specific modules.\r
568556cf 5# Copyright (c) 2013 - 2018 Intel Corporation.\r
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6#\r
7# This program and the accompanying materials\r
8# are licensed and made available under the terms and conditions of the BSD License\r
9# which accompanies this distribution. The full text of the license may be found at\r
10# http://opensource.org/licenses/bsd-license.php\r
11#\r
12# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14#\r
15##\r
16\r
17################################################################################\r
18#\r
19# Defines Section - statements that will be processed to create a Makefile.\r
20#\r
21################################################################################\r
22[Defines]\r
23# Address 0x100000000 (4 GB reset address)\r
24# Base Size\r
25# +---------------------------+\r
26# FLASH_BASE | FD.Quark: | 0x800000 (8 MB)\r
27# 0xFF800000 | BaseAddress |\r
28# +---------------------------+\r
29#\r
30# Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.\r
31# 0xFF800000 + 0x400000 = 0xFFC00000.\r
32#\r
33# Address 0x0 (0xFF800000 for 8 MB SPI part)\r
34# +---------------------------+\r
35# FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE\r
36# 0x00400000 | | 0x00100000\r
37# +---------------------------+\r
38# FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE\r
39# 0x00500000 | | 0x001E0000\r
40# +---------------------------+\r
41# NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE\r
42# 0x006E0000 | Variable + FTW Working + |\r
43# | FTW Spare |\r
44# +---+-------------------+---+\r
45# NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE\r
46# | |\r
47# +-------------------+\r
48# FTW_WORKING_BASE | | FTW_WORKING_SIZE\r
49# | |\r
50# +-------------------+\r
51# FTW_SPARE_BASE | | FTW_SPARE_SIZE\r
52# | |\r
53# +---+-------------------+---+\r
54# RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE\r
55# 0x00700000 | | 0x00008000\r
56# +---------------------------+\r
57# PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE\r
58# 0x00710000 | | 0x00001000\r
59# +---------------------------+\r
60# FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE\r
61# 0x720000 | | 0x000E0000\r
62# +---------------------------+\r
63\r
64 #\r
65 # Define value used to compute FLASH regions below reset vector location just below 4GB\r
66 #\r
67 DEFINE RESET_ADDRESS = 0x100000000 # 4 GB\r
68\r
69 #\r
70 # Set size of FLASH to 8MB\r
71 #\r
72 DEFINE FLASH_SIZE = 0x800000\r
73 DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device\r
74\r
75 #\r
76 # Set FLASH block size to 4KB\r
77 #\r
78 DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB\r
79\r
80 #\r
81 # Misc settings\r
82 #\r
83 DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks\r
84\r
85 #\r
86 # Start PAYLOAD at 4MB into 8MB FLASH\r
87 #\r
88 DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000\r
89 DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000\r
90\r
91 #\r
92 # Put FVMAIN between PAYLOAD and RMU Binary\r
93 #\r
94 DEFINE FLASH_FV_MAIN_BASE = 0x00500000\r
95 DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000\r
96\r
97 #\r
98 # Place NV Storage just above Platform Data Base\r
99 #\r
100 DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000\r
101 DEFINE NVRAM_AREA_SIZE = 0x00020000\r
102\r
103 DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000\r
104 DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)\r
105 DEFINE FTW_WORKING_SIZE = 0x00002000\r
106 DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)\r
107 DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)\r
108\r
109 #\r
110 # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)\r
111 #\r
112 DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address\r
113 DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size\r
114\r
115 #\r
116 # Platform Data Base must be 64KB above RMU\r
117 #\r
118 DEFINE VPD_BASE = 0x00708000\r
119 DEFINE VPD_SIZE = 0x00001000\r
120\r
121 #\r
122 # Place FV Recovery above NV Storage\r
123 #\r
124 DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000\r
125 DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)\r
126\r
127################################################################################\r
128#\r
129# FD Section\r
130# The [FD] Section is made up of the definition statements and a\r
131# description of what goes into the Flash Device Image. Each FD section\r
132# defines one flash "device" image. A flash device image may be one of\r
133# the following: Removable media bootable image (like a boot floppy\r
134# image,) an Option ROM image (that would be "flashed" into an add-in\r
135# card,) a System "Flash" image (that would be burned into a system's\r
136# flash) or an Update ("Capsule") image that will be used to update and\r
137# existing system flash.\r
138#\r
139################################################################################\r
140[FD.Quark]\r
141BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE.\r
142Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.\r
143ErasePolarity = 1\r
144BlockSize = $(FLASH_BLOCKSIZE)\r
145NumBlocks = 0x800 #The number of blocks for the Flash Device.\r
146\r
147SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)\r
148SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE)\r
149\r
150################################################################################\r
151#\r
152# Following are lists of FD Region layout which correspond to the locations of different\r
153# images within the flash device.\r
154#\r
155# Regions must be defined in ascending order and may not overlap.\r
156#\r
157# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
158# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
159# "0x" characters. Like:\r
160# Offset|Size\r
161# PcdOffsetCName|PcdSizeCName\r
162# RegionType <FV, DATA, or FILE>\r
163#\r
164################################################################################\r
165\r
166########################################################\r
167# Quark Payload Image\r
168########################################################\r
169$(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)\r
170gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize\r
171FV = PAYLOAD\r
172\r
173########################################################\r
174# Quark FVMAIN Image (Compressed)\r
175########################################################\r
176$(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)\r
177gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize\r
178FV = FVMAIN_COMPACT\r
179\r
180#############################################################################\r
181# Quark NVRAM Area\r
182# Quark NVRAM Area contains: Variable + FTW Working + FTW Spare\r
183#############################################################################\r
184$(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)\r
185gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
186#NV_VARIABLE_STORE\r
187DATA = {\r
188 ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
189 # ZeroVector []\r
190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
192 # FileSystemGuid: gEfiSystemNvDataFvGuid =\r
193 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
194 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
195 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
196 # FvLength: 0x20000\r
197 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\r
198 #Signature "_FVH" #Attributes\r
199 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
200 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
201 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,\r
202 #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block\r
203 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),\r
204 #Blockmap[1]: End\r
205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
206 ## This is the VARIABLE_STORE_HEADER\r
207 !if $(SECURE_BOOT_ENABLE)\r
208 # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }\r
209 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
210 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
211 !else\r
212 # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
213 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
214 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
215 !endif\r
216 #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8\r
217 # This can speed up the Variable Dispatch a bit.\r
218 0xB8, 0xDF, 0x00, 0x00,\r
219 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
220 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
221}\r
222\r
223$(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)\r
224gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
225#NV_FTW_WORKING\r
226DATA = {\r
227 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =\r
228 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
229 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,\r
230 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,\r
231 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
232 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,\r
233 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
234 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
235}\r
236\r
237$(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)\r
238gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
239#NV_FTW_SPARE\r
240\r
241#########################################################\r
242# Quark Remote Management Unit Binary\r
243#########################################################\r
244$(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)\r
245INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf\r
246\r
247#########################################################\r
248# PlatformData Binary, default for standalone is none built-in so user selects.\r
249#########################################################\r
250$(VPD_BASE)|$(VPD_SIZE)\r
251gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress\r
252FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin\r
253\r
254#######################\r
255# Quark FVRECOVERY Image\r
256#######################\r
257$(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)\r
258gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize\r
259FV = FVRECOVERY\r
260\r
261################################################################################\r
262#\r
263# FV Section\r
264#\r
265# [FV] section is used to define what components or modules are placed within a flash\r
266# device file. This section also defines order the components and modules are positioned\r
267# within the image. The [FV] section consists of define statements, set statements and\r
268# module statements.\r
269#\r
270################################################################################\r
271[FV.FVRECOVERY]\r
272BlockSize = $(FLASH_BLOCKSIZE)\r
273FvAlignment = 16 #FV alignment and FV attributes setting.\r
274ERASE_POLARITY = 1\r
275MEMORY_MAPPED = TRUE\r
276STICKY_WRITE = TRUE\r
277LOCK_CAP = TRUE\r
278LOCK_STATUS = TRUE\r
279WRITE_DISABLED_CAP = TRUE\r
280WRITE_ENABLED_CAP = TRUE\r
281WRITE_STATUS = TRUE\r
282WRITE_LOCK_CAP = TRUE\r
283WRITE_LOCK_STATUS = TRUE\r
284READ_DISABLED_CAP = TRUE\r
285READ_ENABLED_CAP = TRUE\r
286READ_STATUS = TRUE\r
287READ_LOCK_CAP = TRUE\r
288READ_LOCK_STATUS = TRUE\r
289FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8\r
290\r
291################################################################################\r
292#\r
293# The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.\r
294# Parsing tools will scan the INF file to determine the type of component or module.\r
295# The component or module type is used to reference the standard rules\r
296# defined elsewhere in the FDF file.\r
297#\r
298# The format for INF statements is:\r
299# INF $(PathAndInfFileName)\r
300#\r
301################################################################################\r
302\r
303##\r
304# PEI Apriori file example, more PEIM module added later.\r
305##\r
306APRIORI PEI {\r
307 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
308 # PlatformConfigPei should be immediately after Pcd driver.\r
309 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
310 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
311 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
312 INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
313}\r
314\r
315##\r
316# SEC Phase modules\r
317##\r
318INF UefiCpuPkg/SecCore/SecCore.inf\r
319\r
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320!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
321 # FMP image decriptor\r
322INF RuleOverride = FMP_IMAGE_DESC QuarkPlatformPkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf\r
323!endif\r
324\r
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325INF MdeModulePkg/Core/Pei/PeiMain.inf\r
326\r
327##\r
328# PEI Phase RAW Data files.\r
329##\r
330FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {\r
331 SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin\r
332}\r
333\r
334INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
335INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
336INF RuleOverride = NORELOC MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
337INF RuleOverride = NORELOC MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
338INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
339INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
340INF RuleOverride = NORELOC UefiCpuPkg/CpuMpPei/CpuMpPei.inf\r
341INF RuleOverride = NORELOC MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
342INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf\r
343INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf\r
344INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf\r
345INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf\r
346INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
347INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
348INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf\r
349INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
6ceeb1e2 350!if $(MEASURED_BOOT_ENABLE)\r
b1d95b19 351INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
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352INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
353!endif\r
b303605e 354\r
8affbb62 355!if $(RECOVERY_ENABLE)\r
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356FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
357 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
358 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID\r
359 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
360 }\r
361}\r
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362!endif\r
363\r
364!if $(RECOVERY_ENABLE)\r
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365\r
366################################################################################\r
367#\r
368# FV Section\r
369#\r
370# [FV] section is used to define what components or modules are placed within a flash\r
371# device file. This section also defines order the components and modules are positioned\r
372# within the image. The [FV] section consists of define statements, set statements and\r
373# module statements.\r
374#\r
375################################################################################\r
376[FV.FVRECOVERY_COMPONENTS]\r
377BlockSize = $(FLASH_BLOCKSIZE)\r
378FvAlignment = 16 #FV alignment and FV attributes setting.\r
379ERASE_POLARITY = 1\r
380MEMORY_MAPPED = TRUE\r
381STICKY_WRITE = TRUE\r
382LOCK_CAP = TRUE\r
383LOCK_STATUS = TRUE\r
384WRITE_DISABLED_CAP = TRUE\r
385WRITE_ENABLED_CAP = TRUE\r
386WRITE_STATUS = TRUE\r
387WRITE_LOCK_CAP = TRUE\r
388WRITE_LOCK_STATUS = TRUE\r
389READ_DISABLED_CAP = TRUE\r
390READ_ENABLED_CAP = TRUE\r
391READ_STATUS = TRUE\r
392READ_LOCK_CAP = TRUE\r
393READ_LOCK_STATUS = TRUE\r
394\r
395INF QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf\r
396INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
397INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf\r
398INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
399INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
400INF FatPkg/FatPei/FatPei.inf\r
401INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
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402INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
403\r
404!endif\r
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405\r
406################################################################################\r
407#\r
408# FV Section\r
409#\r
410# [FV] section is used to define what components or modules are placed within a flash\r
411# device file. This section also defines order the components and modules are positioned\r
412# within the image. The [FV] section consists of define statements, set statements and\r
413# module statements.\r
414#\r
415################################################################################\r
416[FV.FVMAIN]\r
417BlockSize = $(FLASH_BLOCKSIZE)\r
418FvAlignment = 16\r
419ERASE_POLARITY = 1\r
420MEMORY_MAPPED = TRUE\r
421STICKY_WRITE = TRUE\r
422LOCK_CAP = TRUE\r
423LOCK_STATUS = TRUE\r
424WRITE_DISABLED_CAP = TRUE\r
425WRITE_ENABLED_CAP = TRUE\r
426WRITE_STATUS = TRUE\r
427WRITE_LOCK_CAP = TRUE\r
428WRITE_LOCK_STATUS = TRUE\r
429READ_DISABLED_CAP = TRUE\r
430READ_ENABLED_CAP = TRUE\r
431READ_STATUS = TRUE\r
432READ_LOCK_CAP = TRUE\r
433READ_LOCK_STATUS = TRUE\r
434FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F\r
435\r
436##\r
437# DXE Phase modules\r
438##\r
439INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
440INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
441\r
442!if $(SOURCE_DEBUG_ENABLE)\r
443 INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf\r
444!endif\r
445\r
446#\r
447# Early SoC / Platform modules\r
448#\r
449INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf\r
450\r
451##\r
452# EDK Core modules\r
453##\r
454INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
455INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
456INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
457INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
458INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf\r
459INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf\r
460\r
461INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
462INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
463INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
464INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
465INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
466INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
467!if $(SECURE_BOOT_ENABLE)\r
468 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
469!endif\r
470INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
471INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
472INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
473INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
474INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
475INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
476INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
477INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
478\r
479#\r
480# Platform\r
481#\r
482INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
483INF MdeModulePkg/Application/UiApp/UiApp.inf\r
484\r
485INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf\r
486INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf\r
487INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf\r
488INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf\r
489INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
490INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf\r
491INF QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf\r
492INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf\r
493INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf\r
494INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf\r
495\r
496#\r
497# ACPI\r
498#\r
499INF QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf\r
500INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf\r
501#INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
502INF QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
503INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
504INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
505INF QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf\r
506INF RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf\r
507\r
508#\r
509# SMM\r
510#\r
511INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
512INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
513INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
514INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
515INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf\r
516INF QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf\r
517INF QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf\r
518INF QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf\r
519INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
520INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
521\r
522#\r
523# SMBIOS\r
524#\r
525INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
526INF QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf\r
527INF QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf\r
528\r
529#\r
530# PCI\r
531#\r
532INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf\r
533INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
534INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf\r
535!if $(SOURCE_DEBUG_ENABLE)\r
536!else\r
537INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf\r
538!endif\r
539\r
540#\r
541# USB\r
542#\r
543!if $(PERFORMANCE_ENABLE)\r
544!else\r
545INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
546INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf\r
547INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
548INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
549INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
550INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
551!endif\r
552\r
553#\r
554# SDIO\r
555#\r
556!if $(PERFORMANCE_ENABLE)\r
557!else\r
558INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf\r
559INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf\r
560!endif\r
561\r
562#\r
563# Console\r
564#\r
565INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
566INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
567INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
568\r
569INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
570INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
571INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
572INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
573\r
574#\r
575# File System Modules\r
576#\r
577!if $(PERFORMANCE_ENABLE)\r
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578!else\r
579INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
580INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
581INF FatPkg/EnhancedFatDxe/Fat.inf\r
582!endif\r
583\r
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584#\r
585# Performance Application\r
586#\r
587!if $(PERFORMANCE_ENABLE)\r
588INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
589!endif\r
590\r
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591#\r
592# Trusted Platform Module\r
593#\r
594!if $(MEASURED_BOOT_ENABLE)\r
62c9131a 595INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
6ceeb1e2 596INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
62c9131a 597INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
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598!endif\r
599\r
8affbb62 600!if $(CAPSULE_ENABLE)\r
568556cf 601INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
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602INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf\r
603!endif\r
604\r
605!if $(RECOVERY_ENABLE)\r
606FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
607 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
608 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
609 }\r
610!endif\r
611\r
612!if $(CAPSULE_ENABLE)\r
613FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {\r
614 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer\r
615 SECTION UI = "Pkcs7TestRoot"\r
616 }\r
617!endif\r
618\r
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619################################################################################\r
620#\r
621# FV Section\r
622#\r
623# [FV] section is used to define what components or modules are placed within a flash\r
624# device file. This section also defines order the components and modules are positioned\r
625# within the image. The [FV] section consists of define statements, set statements and\r
626# module statements.\r
627#\r
628################################################################################\r
629[FV.FVMAIN_COMPACT]\r
630FvAlignment = 16\r
631ERASE_POLARITY = 1\r
632MEMORY_MAPPED = TRUE\r
633STICKY_WRITE = TRUE\r
634LOCK_CAP = TRUE\r
635LOCK_STATUS = TRUE\r
636WRITE_DISABLED_CAP = TRUE\r
637WRITE_ENABLED_CAP = TRUE\r
638WRITE_STATUS = TRUE\r
639WRITE_LOCK_CAP = TRUE\r
640WRITE_LOCK_STATUS = TRUE\r
641READ_DISABLED_CAP = TRUE\r
642READ_ENABLED_CAP = TRUE\r
643READ_STATUS = TRUE\r
644READ_LOCK_CAP = TRUE\r
645READ_LOCK_STATUS = TRUE\r
646\r
647FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
648 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID\r
649 SECTION FV_IMAGE = FVMAIN\r
650 }\r
651}\r
652\r
653################################################################################\r
654#\r
655# FV Section\r
656#\r
657# [FV] section is used to define what components or modules are placed within a flash\r
658# device file. This section also defines order the components and modules are positioned\r
659# within the image. The [FV] section consists of define statements, set statements and\r
660# module statements.\r
661#\r
662################################################################################\r
663[FV.PAYLOAD]\r
664BlockSize = $(FLASH_BLOCKSIZE)\r
665FvAlignment = 16 #FV alignment and FV attributes setting.\r
666ERASE_POLARITY = 1\r
667MEMORY_MAPPED = TRUE\r
668STICKY_WRITE = TRUE\r
669LOCK_CAP = TRUE\r
670LOCK_STATUS = TRUE\r
671WRITE_DISABLED_CAP = TRUE\r
672WRITE_ENABLED_CAP = TRUE\r
673WRITE_STATUS = TRUE\r
674WRITE_LOCK_CAP = TRUE\r
675WRITE_LOCK_STATUS = TRUE\r
676READ_DISABLED_CAP = TRUE\r
677READ_ENABLED_CAP = TRUE\r
678READ_STATUS = TRUE\r
679READ_LOCK_CAP = TRUE\r
680READ_LOCK_STATUS = TRUE\r
681\r
682#\r
683# Shell and Applications\r
684#\r
685INF RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf\r
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687!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
688\r
689[FV.CapsuleDispatchFv]\r
690FvAlignment = 16\r
691ERASE_POLARITY = 1\r
692MEMORY_MAPPED = TRUE\r
693STICKY_WRITE = TRUE\r
694LOCK_CAP = TRUE\r
695LOCK_STATUS = TRUE\r
696WRITE_DISABLED_CAP = TRUE\r
697WRITE_ENABLED_CAP = TRUE\r
698WRITE_STATUS = TRUE\r
699WRITE_LOCK_CAP = TRUE\r
700WRITE_LOCK_STATUS = TRUE\r
701READ_DISABLED_CAP = TRUE\r
702READ_ENABLED_CAP = TRUE\r
703READ_STATUS = TRUE\r
704READ_LOCK_CAP = TRUE\r
705READ_LOCK_STATUS = TRUE\r
706\r
707!if $(CAPSULE_ENABLE)\r
708INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf\r
709!endif\r
710\r
711[FV.SystemFirmwareUpdateCargo]\r
712FvAlignment = 16\r
713ERASE_POLARITY = 1\r
714MEMORY_MAPPED = TRUE\r
715STICKY_WRITE = TRUE\r
716LOCK_CAP = TRUE\r
717LOCK_STATUS = TRUE\r
718WRITE_DISABLED_CAP = TRUE\r
719WRITE_ENABLED_CAP = TRUE\r
720WRITE_STATUS = TRUE\r
721WRITE_LOCK_CAP = TRUE\r
722WRITE_LOCK_STATUS = TRUE\r
723READ_DISABLED_CAP = TRUE\r
724READ_ENABLED_CAP = TRUE\r
725READ_STATUS = TRUE\r
726READ_LOCK_CAP = TRUE\r
727READ_LOCK_STATUS = TRUE\r
728\r
729FILE RAW = 14D83A59-A810-4556-8192-1C0A593C065C { # PcdEdkiiSystemFirmwareFileGuid\r
730 FD = Quark\r
731 }\r
732\r
733FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid\r
734 FV = CapsuleDispatchFv\r
735 }\r
736\r
737FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid\r
738 QuarkPlatformPkg/Feature/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini\r
739 }\r
740\r
741!endif\r
742\r
743!if $(CAPSULE_ENABLE)\r
744[FmpPayload.FmpPayloadSystemFirmwarePkcs7]\r
745IMAGE_HEADER_INIT_VERSION = 0x02\r
746IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid\r
747IMAGE_INDEX = 0x1\r
748HARDWARE_INSTANCE = 0x0\r
749MONOTONIC_COUNT = 0x2\r
750CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7\r
751\r
752FV = SystemFirmwareUpdateCargo\r
753\r
754[Capsule.QuarkFirmwareUpdateCapsuleFmpPkcs7]\r
755CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid\r
756CAPSULE_FLAGS = PersistAcrossReset,InitiateReset\r
757CAPSULE_HEADER_SIZE = 0x20\r
758CAPSULE_HEADER_INIT_VERSION = 0x1\r
759\r
760FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7\r
761!endif\r
762\r
763!if $(RECOVERY_ENABLE)\r
764[FmpPayload.FmpPayloadSystemFirmwareRsa2048]\r
765IMAGE_HEADER_INIT_VERSION = 0x02\r
766IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid\r
767IMAGE_INDEX = 0x1\r
768HARDWARE_INSTANCE = 0x0\r
769MONOTONIC_COUNT = 0x2\r
770CERTIFICATE_GUID = A7717414-C616-4977-9420-844712A735BF # RSA2048SHA256\r
771\r
772FV = SystemFirmwareUpdateCargo\r
773\r
774[Capsule.QuarkRec]\r
775CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid\r
776CAPSULE_FLAGS = PersistAcrossReset,InitiateReset\r
777CAPSULE_HEADER_SIZE = 0x20\r
778CAPSULE_HEADER_INIT_VERSION = 0x1\r
779\r
780FMP_PAYLOAD = FmpPayloadSystemFirmwareRsa2048\r
781!endif\r
782\r
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783################################################################################\r
784#\r
785# Rules are use with the [FV] section's module INF type to define\r
786# how an FFS file is created for a given INF file. The following Rule are the default\r
787# rules for the different module type. User can add the customized rules to define the\r
788# content of the FFS file.\r
789#\r
790################################################################################\r
791[Rule.Common.SEC]\r
792 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
793 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
794 RAW BIN Align = 16 |.com\r
795 }\r
796\r
797[Rule.Common.PEI_CORE]\r
798 FILE PEI_CORE = $(NAMED_GUID) {\r
799 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
800 UI STRING="$(MODULE_NAME)" Optional\r
801 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
802 }\r
803\r
804[Rule.Common.PEIM.NORELOC]\r
805 FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {\r
806 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
807 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
808 UI STRING="$(MODULE_NAME)" Optional\r
809 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
810 }\r
811\r
812[Rule.Common.PEIM]\r
813 FILE PEIM = $(NAMED_GUID) {\r
814 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
815 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
816 UI STRING="$(MODULE_NAME)" Optional\r
817 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
818 }\r
819\r
820[Rule.Common.DXE_CORE]\r
821 FILE DXE_CORE = $(NAMED_GUID) {\r
822 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
823 UI STRING="$(MODULE_NAME)" Optional\r
824 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
825 }\r
826\r
827[Rule.Common.UEFI_DRIVER]\r
828 FILE DRIVER = $(NAMED_GUID) {\r
829 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
830 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
831 UI STRING="$(MODULE_NAME)" Optional\r
832 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
833 }\r
834\r
835[Rule.Common.DXE_DRIVER]\r
836 FILE DRIVER = $(NAMED_GUID) {\r
837 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
838 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
839 UI STRING="$(MODULE_NAME)" Optional\r
840 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
841 }\r
842\r
843[Rule.Common.DXE_RUNTIME_DRIVER]\r
844 FILE DRIVER = $(NAMED_GUID) {\r
845 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
846 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
847 UI STRING="$(MODULE_NAME)" Optional\r
848 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
849 }\r
850\r
851[Rule.Common.DXE_SMM_DRIVER]\r
852 FILE SMM = $(NAMED_GUID) {\r
853 SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
854 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
855 UI STRING="$(MODULE_NAME)" Optional\r
856 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
857 }\r
858\r
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859[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
860 FILE SMM = $(NAMED_GUID) {\r
861 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
862 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
863 RAW ACPI Optional |.acpi\r
864 RAW ASL Optional |.aml\r
865 UI STRING="$(MODULE_NAME)" Optional\r
866 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
867 }\r
868\r
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869[Rule.Common.SMM_CORE]\r
870 FILE SMM_CORE = $(NAMED_GUID) {\r
871 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
872 UI STRING="$(MODULE_NAME)" Optional\r
873 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
874 }\r
875\r
876[Rule.Common.UEFI_APPLICATION]\r
877 FILE APPLICATION = $(NAMED_GUID) {\r
878 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
879 UI STRING="$(MODULE_NAME)" Optional\r
880 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
881 }\r
882\r
883[Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED]\r
884 FILE APPLICATION = $(NAMED_GUID) {\r
885 UI STRING="$(MODULE_NAME)" Optional\r
886 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
887 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { # TIANO COMPRESS GUID\r
888 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
889 }\r
890 }\r
891\r
892[Rule.Common.UEFI_APPLICATION.UI]\r
893 FILE APPLICATION = $(NAMED_GUID) {\r
894 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
895 UI STRING="Enter Setup"\r
896 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
897 }\r
898\r
899[Rule.Common.USER_DEFINED.ACPITABLE]\r
900 FILE FREEFORM = $(NAMED_GUID) {\r
901 RAW ACPI |.acpi\r
902 RAW ASL |.aml\r
903 }\r
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904\r
905[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
906 FILE PEIM = $(NAMED_GUID) {\r
907 RAW BIN |.acpi\r
908 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
909 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
910 UI STRING="$(MODULE_NAME)" Optional\r
911 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
912 }\r
913\r