projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9b6bbcdb MK |
1 | /** @file\r |
| 2 | HTE handling routines for MRC use.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2013-2015 Intel Corporation.\r | |
| 5 | \r | |
| 6 | This program and the accompanying materials\r | |
| 7 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 8 | which accompanies this distribution. The full text of the license may be found at\r | |
| 9 | http://opensource.org/licenses/bsd-license.php\r | |
| 10 | \r | |
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | \r | |
| 14 | **/\r | |
| 15 | #ifndef __HTE_H\r | |
| 16 | #define __HTE_H\r | |
| 17 | \r | |
| 18 | #define STATIC static\r | |
| 19 | #define VOID void\r | |
| 20 | \r | |
| 21 | #if !defined(__GNUC__) && (__STDC_VERSION__ < 199901L)\r | |
| 22 | typedef uint32_t UINT32;\r | |
| 23 | typedef uint16_t UINT16;\r | |
| 24 | typedef uint8_t UINT8;\r | |
| 25 | #endif\r | |
| 26 | \r | |
| 27 | typedef enum\r | |
| 28 | {\r | |
| 29 | MrcNoHaltSystemOnError,\r | |
| 30 | MrcHaltSystemOnError,\r | |
| 31 | MrcHaltHteEngineOnError,\r | |
| 32 | MrcNoHaltHteEngineOnError\r | |
| 33 | } HALT_TYPE;\r | |
| 34 | \r | |
| 35 | typedef enum\r | |
| 36 | {\r | |
| 37 | MrcMemInit, MrcMemTest\r | |
| 38 | } MEM_INIT_OR_TEST;\r | |
| 39 | \r | |
| 40 | #define READ_TRAIN 1\r | |
| 41 | #define WRITE_TRAIN 2\r | |
| 42 | \r | |
| 43 | #define HTE_MEMTEST_NUM 2\r | |
| 44 | #define HTE_LOOP_CNT 5 // EXP_LOOP_CNT field of HTE_CMD_CTL. This CANNOT be less than 4\r | |
| 45 | #define HTE_LFSR_VICTIM_SEED 0xF294BA21 // Random seed for victim.\r | |
| 46 | #define HTE_LFSR_AGRESSOR_SEED 0xEBA7492D // Random seed for aggressor.\r | |
| 47 | UINT32\r | |
| 48 | HteMemInit(\r | |
| 49 | MRC_PARAMS *CurrentMrcData,\r | |
| 50 | UINT8 MemInitFlag,\r | |
| 51 | UINT8 HaltHteEngineOnError);\r | |
| 52 | \r | |
| 53 | UINT16\r | |
| 54 | BasicWriteReadHTE(\r | |
| 55 | MRC_PARAMS *CurrentMrcData,\r | |
| 56 | UINT32 Address,\r | |
| 57 | UINT8 FirstRun,\r | |
| 58 | UINT8 Mode);\r | |
| 59 | \r | |
| 60 | UINT16\r | |
| 61 | WriteStressBitLanesHTE(\r | |
| 62 | MRC_PARAMS *CurrentMrcData,\r | |
| 63 | UINT32 Address,\r | |
| 64 | UINT8 FirstRun);\r | |
| 65 | \r | |
| 66 | VOID\r | |
| 67 | HteMemOp(\r | |
| 68 | UINT32 Address,\r | |
| 69 | UINT8 FirstRun,\r | |
| 70 | UINT8 IsWrite);\r | |
| 71 | \r | |
| 72 | #endif\r |