QuarkSocPkg: Add new package for Quark SoC X1000

[mirror_edk2.git] / QuarkSocPkg / QuarkNorthCluster / MemoryInit / Pei / meminit_utils.h

/************************************************************************\r
 *\r
 * Copyright (c) 2013-2015 Intel Corporation.\r
 *\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
* which accompanies this distribution.  The full text of the license may be found at\r
* http://opensource.org/licenses/bsd-license.php\r
*\r
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 *\r
 ***************************************************************************/\r
#ifndef _MEMINIT_UTILS_H_\r
#define _MEMINIT_UTILS_H_\r
\r
// General Definitions:\r
#ifdef QUICKSIM\r
#define SAMPLE_SIZE     4   // reduce number of training samples in simulation env\r
#else\r
#define SAMPLE_SIZE     6   // must be odd number\r
#endif\r
\r
#define EARLY_DB    (0x12)  // must be less than this number to enable early deadband\r
#define LATE_DB     (0x34)  // must be greater than this number to enable late deadband\r
#define CHX_REGS    (11*4)\r
#define FULL_CLK      128\r
#define HALF_CLK       64\r
#define QRTR_CLK       32\r
\r
\r
\r
#define MCEIL(num,den) ((uint8_t)((num+den-1)/den))\r
#define MMAX(a,b)      ((((int32_t)(a))>((int32_t)(b)))?(a):(b))\r
#define MCOUNT(a)      (sizeof(a)/sizeof(*a))\r
\r
typedef enum ALGOS_enum {\r
  eRCVN = 0,\r
  eWDQS,\r
  eWDQx,\r
  eRDQS,\r
  eVREF,\r
  eWCMD,\r
  eWCTL,\r
  eWCLK,\r
  eMAX_ALGOS,\r
} ALGOs_t;\r
\r
\r
// Prototypes:\r
void set_rcvn(uint8_t channel, uint8_t rank, uint8_t byte_lane, uint32_t pi_count);\r
void set_rdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane, uint32_t pi_count);\r
void set_wdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane, uint32_t pi_count);\r
void set_wdq(uint8_t channel, uint8_t rank, uint8_t byte_lane, uint32_t pi_count);\r
void set_wcmd(uint8_t channel, uint32_t pi_count);\r
void set_wclk(uint8_t channel, uint8_t grp, uint32_t pi_count);\r
void set_wctl(uint8_t channel, uint8_t rank, uint32_t pi_count);\r
void set_vref(uint8_t channel, uint8_t byte_lane, uint32_t setting);\r
uint32_t get_rcvn(uint8_t channel, uint8_t rank, uint8_t byte_lane);\r
uint32_t get_rdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane);\r
uint32_t get_wdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane);\r
uint32_t get_wdq(uint8_t channel, uint8_t rank, uint8_t byte_lane);\r
uint32_t get_wcmd(uint8_t channel);\r
uint32_t get_wclk(uint8_t channel, uint8_t group);\r
uint32_t get_wctl(uint8_t channel, uint8_t rank);\r
uint32_t get_vref(uint8_t channel, uint8_t byte_lane);\r
\r
void clear_pointers(void);\r
void enable_cache(void);\r
void disable_cache(void);\r
void find_rising_edge(MRCParams_t *mrc_params, uint32_t delay[], uint8_t channel, uint8_t rank, bool rcvn);\r
uint32_t sample_dqs(MRCParams_t *mrc_params, uint8_t channel, uint8_t rank, bool rcvn);\r
uint32_t get_addr(MRCParams_t *mrc_params, uint8_t channel, uint8_t rank);\r
uint32_t byte_lane_mask(MRCParams_t *mrc_params);\r
\r
uint64_t read_tsc(void);\r
uint32_t get_tsc_freq(void);\r
void delay_n(uint32_t nanoseconds);\r
void delay_u(uint32_t microseconds);\r
void delay_m(uint32_t milliseconds);\r
void delay_s(uint32_t seconds);\r
\r
void post_code(uint8_t major, uint8_t minor);\r
void training_message(uint8_t channel, uint8_t rank, uint8_t byte_lane);\r
void print_timings(MRCParams_t *mrc_params);\r
\r
void enable_scrambling(MRCParams_t *mrc_params);\r
void store_timings(MRCParams_t *mrc_params);\r
void restore_timings(MRCParams_t *mrc_params);\r
void default_timings(MRCParams_t *mrc_params);\r
\r
#ifndef SIM\r
void *memset(void *d, int c, size_t n);\r
void *memcpy(void *d, const void *s, size_t n);\r
#endif\r
\r
#endif // _MEMINIT_UTILS_H_\r