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QuarkSocPkg: Add new package for Quark SoC X1000
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1/************************************************************************\r
2 *\r
3 * Copyright (c) 2013-2015 Intel Corporation.\r
4 *\r
5* This program and the accompanying materials\r
6* are licensed and made available under the terms and conditions of the BSD License\r
7* which accompanies this distribution. The full text of the license may be found at\r
8* http://opensource.org/licenses/bsd-license.php\r
9*\r
10* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12 *\r
13 ************************************************************************/\r
14\r
15#include "mrc.h"\r
16#include "memory_options.h"\r
17\r
18#include "meminit_utils.h"\r
19#include "prememinit.h"\r
20#include "io.h"\r
21\r
22// Read character from serial console\r
23uint8_t mgetc(void);\r
24\r
25extern uint32_t DpfPrintMask;\r
26\r
27// Adjust configuration parameters before initialisation\r
28// sequence.\r
29void PreMemInit(\r
30 MRCParams_t *mrc_params)\r
31{\r
32 const DRAMParams_t *dram_params;\r
33\r
34 uint8_t dram_width;\r
35 uint32_t dram_cfg_index;\r
36 uint32_t channel_i;\r
37\r
38 ENTERFN();\r
39\r
40#ifdef MRC_SV\r
41 {\r
42 uint8_t ch;\r
43\r
44 myloop:\r
45\r
46 DPF(D_INFO, "- c - continue\n");\r
47 DPF(D_INFO, "- f - boot mode [%d]\n", mrc_params->boot_mode);\r
48 DPF(D_INFO, "- r - rank enable [%d]\n", mrc_params->rank_enables);\r
49 DPF(D_INFO, "- e - ecc switch [%d]\n", mrc_params->ecc_enables);\r
50 DPF(D_INFO, "- b - scrambling switch [%d]\n", mrc_params->scrambling_enables);\r
51 DPF(D_INFO, "- a - adr mode [%d]\n", mrc_params->address_mode);\r
52 DPF(D_INFO, "- m - menu after mrc [%d]\n", mrc_params->menu_after_mrc);\r
53 DPF(D_INFO, "- t - tune to rcvn [%d]\n", mrc_params->tune_rcvn);\r
54 DPF(D_INFO, "- o - odt switch [%d]\n", mrc_params->rd_odt_value);\r
55 DPF(D_INFO, "- d - dram density [%d]\n", mrc_params->params.DENSITY);\r
56 DPF(D_INFO, "- p - power down disable [%d]\n", mrc_params->power_down_disable);\r
57 DPF(D_INFO, "- l - log switch 0x%x\n", DpfPrintMask);\r
58 ch = mgetc();\r
59\r
60 switch (ch)\r
61 {\r
62 case 'f':\r
63 mrc_params->boot_mode >>= 1;\r
64 if(mrc_params->boot_mode == bmUnknown)\r
65 {\r
66 mrc_params->boot_mode = bmWarm;\r
67 }\r
68 DPF(D_INFO, "Boot mode %d\n", mrc_params->boot_mode);\r
69 break;\r
70\r
71 case 'p':\r
72 mrc_params->power_down_disable ^= 1;\r
73 DPF(D_INFO, "Power down disable %d\n", mrc_params->power_down_disable);\r
74 break;\r
75\r
76 case 'r':\r
77 mrc_params->rank_enables ^= 2;\r
78 DPF(D_INFO, "Rank enable %d\n", mrc_params->rank_enables);\r
79 break;\r
80\r
81 case 'e':\r
82 mrc_params->ecc_enables ^= 1;\r
83 DPF(D_INFO, "Ecc enable %d\n", mrc_params->ecc_enables);\r
84 break;\r
85\r
86 case 'b':\r
87 mrc_params->scrambling_enables ^= 1;\r
88 DPF(D_INFO, "Scrambler enable %d\n", mrc_params->scrambling_enables);\r
89 break;\r
90\r
91 case 'a':\r
92 mrc_params->address_mode = (mrc_params->address_mode + 1) % 3;\r
93 DPF(D_INFO, "Adr mode %d\n", mrc_params->address_mode);\r
94 break;\r
95\r
96 case 'm':\r
97 mrc_params->menu_after_mrc ^= 1;\r
98 DPF(D_INFO, "Menu after mrc %d\n", mrc_params->menu_after_mrc);\r
99 break;\r
100\r
101 case 't':\r
102 mrc_params->tune_rcvn ^= 1;\r
103 DPF(D_INFO, "Tune to rcvn %d\n", mrc_params->tune_rcvn);\r
104 break;\r
105\r
106 case 'o':\r
107 mrc_params->rd_odt_value = (mrc_params->rd_odt_value + 1) % 4;\r
108 DPF(D_INFO, "Rd_odt_value %d\n", mrc_params->rd_odt_value);\r
109 break;\r
110\r
111 case 'd':\r
112 mrc_params->params.DENSITY = (mrc_params->params.DENSITY + 1) % 4;\r
113 DPF(D_INFO, "Dram density %d\n", mrc_params->params.DENSITY);\r
114 break;\r
115\r
116 case 'l':\r
117 DpfPrintMask ^= 0x30;\r
118 DPF(D_INFO, "Log mask %x\n", DpfPrintMask);\r
119 break;\r
120\r
121 default:\r
122 break;\r
123 }\r
124\r
125 if (ch != 'c')\r
126 goto myloop;\r
127\r
128 }\r
129#endif\r
130\r
131 // initially expect success\r
132 mrc_params->status = MRC_SUCCESS;\r
133\r
134 // todo!!! Setup board layout (must be reviewed as is selecting static timings)\r
135 // 0 == R0 (DDR3 x16), 1 == R1 (DDR3 x16), 2 == DV (DDR3 x8), 3 == SV (DDR3 x8)\r
136 if (mrc_params->dram_width == x8)\r
137 {\r
138 mrc_params->board_id = 2; // select x8 layout\r
139 }\r
140 else\r
141 {\r
142 mrc_params->board_id = 0; // select x16 layout\r
143 }\r
144\r
145 // initially no memory\r
146 mrc_params->mem_size = 0;\r
147 channel_i = 0;\r
148\r
149 // begin of channel settings\r
150 dram_width = mrc_params->dram_width;\r
151 dram_params = &mrc_params->params;\r
152 dram_cfg_index = 0;\r
153\r
154 // Determine Column & Row Bits:\r
155 // Column:\r
156 // 11 for 8Gbx8, else 10\r
157 mrc_params->column_bits[channel_i] = ((dram_params[dram_cfg_index].DENSITY == 4) && (dram_width == x8)) ? (11) : (10);\r
158\r
159 // Row:\r
160 // 512Mbx16=12 512Mbx8=13\r
161 // 1Gbx16=13 1Gbx8=14\r
162 // 2Gbx16=14 2Gbx8=15\r
163 // 4Gbx16=15 4Gbx8=16\r
164 // 8Gbx16=16 8Gbx8=16\r
165 mrc_params->row_bits[channel_i] = 12 + (dram_params[dram_cfg_index].DENSITY)\r
166 + (((dram_params[dram_cfg_index].DENSITY < 4) && (dram_width == x8)) ? (1) : (0));\r
167\r
168 // Determine Per Channel Memory Size:\r
169 // (For 2 RANKs, multiply by 2)\r
170 // (For 16 bit data bus, divide by 2)\r
171 // DENSITY WIDTH MEM_AVAILABLE\r
172 // 512Mb x16 0x008000000 ( 128MB)\r
173 // 512Mb x8 0x010000000 ( 256MB)\r
174 // 1Gb x16 0x010000000 ( 256MB)\r
175 // 1Gb x8 0x020000000 ( 512MB)\r
176 // 2Gb x16 0x020000000 ( 512MB)\r
177 // 2Gb x8 0x040000000 (1024MB)\r
178 // 4Gb x16 0x040000000 (1024MB)\r
179 // 4Gb x8 0x080000000 (2048MB)\r
180 mrc_params->channel_size[channel_i] = (1 << dram_params[dram_cfg_index].DENSITY);\r
181 mrc_params->channel_size[channel_i] *= ((dram_width == x8) ? (2) : (1));\r
182 mrc_params->channel_size[channel_i] *= (mrc_params->rank_enables == 0x3) ? (2) : (1);\r
183 mrc_params->channel_size[channel_i] *= (mrc_params->channel_width == x16) ? (1) : (2);\r
184\r
185 // Determine memory size (convert number of 64MB/512Mb units)\r
186 mrc_params->mem_size += mrc_params->channel_size[channel_i] << 26;\r
187\r
188 // end of channel settings\r
189\r
190 LEAVEFN();\r
191 return;\r
192}\r
193\r