projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9b6bbcdb MK |
1 | ## @file\r |
| 2 | # Component description file for QNCInit driver.\r | |
| 3 | #\r | |
| 4 | # QNCInit driver implement QuarkNcSocId related drivers, includes:\r | |
| 5 | # PciHostBridge, PciExpress, SmmAccess driver and LegacyRegion driver.\r | |
| 6 | #\r | |
| 7 | # This driver mainly do full initialization for the QNC chipet includes:\r | |
| 8 | # 1. Initialize the PCI Express device.\r | |
| 9 | # 2. Initialize the PciHostBridge, and allocate the I/O and memory space from GCD service.\r | |
| 10 | # 3. Initialize the SmmAccess module and install EFI_SMM_ACCESS_PROTOCOL\r | |
| 11 | # 4. Initialize the LegacyRegion module, install EFI_LEGACY_REGION_PROTOCOL and set below 1M\r | |
| 12 | # memory attribute from MTRR.\r | |
| 13 | #\r | |
| fda6abd6 | 14 | # Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 9b6bbcdb | 15 | #\r |
| c9f231d0 | 16 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 9b6bbcdb MK |
17 | #\r |
| 18 | ##\r | |
| 19 | \r | |
| 20 | [Defines]\r | |
| 21 | INF_VERSION = 0x00010005\r | |
| 22 | BASE_NAME = QNCInitDxe\r | |
| 23 | FILE_GUID = 74D3B506-EE9C-47ed-B749-41261401DA78\r | |
| 24 | MODULE_TYPE = DXE_DRIVER\r | |
| 25 | VERSION_STRING = 1.0\r | |
| 26 | ENTRY_POINT = QNCInit\r | |
| 27 | \r | |
| 28 | #\r | |
| 29 | # The following information is for reference only and not required by the build tools.\r | |
| 30 | #\r | |
| fda6abd6 | 31 | # VALID_ARCHITECTURES = IA32 X64 EBC\r |
| 9b6bbcdb MK |
32 | #\r |
| 33 | \r | |
| 34 | [Sources]\r | |
| 35 | LegacyRegion.h\r | |
| 36 | LegacyRegion.c\r | |
| 37 | DxeQNCSmbus.c\r | |
| 38 | DxeQNCSmbus.h\r | |
| 39 | QNCSmbusExec.c\r | |
| 40 | QNCSmbus.h\r | |
| 41 | QNCInit.c\r | |
| 42 | QNCInit.h\r | |
| 43 | CommonHeader.h\r | |
| 44 | QNCRootPorts.c\r | |
| 45 | \r | |
| 46 | [Packages]\r | |
| 47 | MdePkg/MdePkg.dec\r | |
| 48 | UefiCpuPkg/UefiCpuPkg.dec\r | |
| 49 | QuarkSocPkg/QuarkSocPkg.dec\r | |
| 50 | \r | |
| 51 | [LibraryClasses]\r | |
| 52 | UefiDriverEntryPoint\r | |
| 53 | BaseLib\r | |
| 54 | UefiBootServicesTableLib\r | |
| 55 | DxeServicesTableLib\r | |
| 56 | BaseMemoryLib\r | |
| 57 | DebugLib\r | |
| 58 | PcdLib\r | |
| 59 | MtrrLib\r | |
| 60 | IoLib\r | |
| 61 | SmbusLib\r | |
| 62 | S3IoLib\r | |
| 63 | S3BootScriptLib\r | |
| 64 | IntelQNCLib\r | |
| 65 | QNCAccessLib\r | |
| 66 | \r | |
| 67 | [Protocols]\r | |
| 68 | gEfiLegacyRegion2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r | |
| 69 | gEfiSmbusHcProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r | |
| 70 | gEfiQncS3SupportProtocolGuid # PROTOCOL ALWAYS_CONSUMED\r | |
| 71 | \r | |
| 72 | [FeaturePcd]\r | |
| 73 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdSmbaIoBaseAddressFixed\r | |
| 74 | \r | |
| 75 | [FixedPcd]\r | |
| 76 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdIoApicBaseAddress\r | |
| 77 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdIoApicSize\r | |
| 78 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdHpetBaseAddress\r | |
| 79 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdHpetSize\r | |
| 80 | \r | |
| 81 | [Pcd]\r | |
| 82 | gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES\r | |
| 83 | gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010 ## PRODUCES\r | |
| 84 | gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES\r | |
| 85 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdPciExpressSize ## CONSUMES\r | |
| 86 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdSmbaIoBaseAddress\r | |
| 87 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdDeviceEnables\r | |
| 88 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdPlatformSmbusAddrNum\r | |
| 89 | gEfiQuarkNcSocIdTokenSpaceGuid.PcdPlatformSmbusAddrTable\r | |
| 90 | \r | |
| 91 | [Depex]\r | |
| 92 | gEfiPlatformPolicyProtocolGuid AND gEfiQncS3SupportProtocolGuid\r |