]> git.proxmox.com Git - mirror_edk2.git/blame - QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.c
QuarkSocPkg: Add new package for Quark SoC X1000
[mirror_edk2.git] / QuarkSocPkg / QuarkNorthCluster / Smm / Pei / SmmControlPei / SmmControlPei.c
CommitLineData
9b6bbcdb
MK
1/** @file\r
2This module provides an implementation of the SMM Control PPI for use with\r
3the QNC.\r
4\r
5Copyright (c) 2013-2015 Intel Corporation.\r
6\r
7This program and the accompanying materials\r
8are licensed and made available under the terms and conditions of the BSD License\r
9which accompanies this distribution. The full text of the license may be found at\r
10http://opensource.org/licenses/bsd-license.php\r
11\r
12THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15**/\r
16\r
17#include <PiPei.h>\r
18\r
19#include <Ppi/SmmControl.h>\r
20\r
21#include <Library/DebugLib.h>\r
22#include <Library/HobLib.h>\r
23#include <Library/PeiServicesLib.h>\r
24#include <Library/PcdLib.h>\r
25#include <Library/IoLib.h>\r
26#include <Library/PciLib.h>\r
27\r
28#include <IntelQNCPeim.h>\r
29#include <Library/QNCAccessLib.h>\r
30#include <Uefi/UefiBaseType.h>\r
31\r
32/**\r
33 Generates an SMI using the parameters passed in.\r
34\r
35 @param PeiServices Describes the list of possible PEI Services.\r
36 @param This A pointer to an instance of\r
37 EFI_SMM_CONTROL_PPI\r
38 @param ArgumentBuffer The argument buffer\r
39 @param ArgumentBufferSize The size of the argument buffer\r
40 @param Periodic TRUE to indicate a periodical SMI\r
41 @param ActivationInterval Interval of the periodical SMI\r
42\r
43 @retval EFI_INVALID_PARAMETER Periodic is TRUE or ArgumentBufferSize > 1\r
44 @retval EFI_SUCCESS SMI generated\r
45\r
46**/\r
47EFI_STATUS\r
48EFIAPI\r
49PeiActivate (\r
50 IN EFI_PEI_SERVICES **PeiServices,\r
51 IN PEI_SMM_CONTROL_PPI *This,\r
52 IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
53 IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
54 IN BOOLEAN Periodic OPTIONAL,\r
55 IN UINTN ActivationInterval OPTIONAL\r
56 );\r
57\r
58/**\r
59 Clears an SMI.\r
60\r
61 @param PeiServices Describes the list of possible PEI Services.\r
62 @param This Pointer to an instance of EFI_SMM_CONTROL_PPI\r
63 @param Periodic TRUE to indicate a periodical SMI\r
64\r
65 @return Return value from SmmClear()\r
66\r
67**/\r
68EFI_STATUS\r
69EFIAPI\r
70PeiDeactivate (\r
71 IN EFI_PEI_SERVICES **PeiServices,\r
72 IN PEI_SMM_CONTROL_PPI *This,\r
73 IN BOOLEAN Periodic OPTIONAL\r
74 );\r
75\r
76PEI_SMM_CONTROL_PPI mSmmControlPpi = {\r
77 PeiActivate,\r
78 PeiDeactivate\r
79};\r
80\r
81EFI_PEI_PPI_DESCRIPTOR mPpiList = {\r
82 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
83 &gPeiSmmControlPpiGuid,\r
84 &mSmmControlPpi\r
85};\r
86\r
87/**\r
88 Clear SMI related chipset status and re-enable SMI by setting the EOS bit.\r
89\r
90 @retval EFI_SUCCESS The requested operation has been carried out successfully\r
91 @retval EFI_DEVICE_ERROR The EOS bit could not be set.\r
92\r
93**/\r
94EFI_STATUS\r
95SmmClear (\r
96 VOID\r
97 )\r
98{\r
99 UINT16 PM1BLK_Base;\r
100 UINT16 GPE0BLK_Base;\r
101\r
102 //\r
103 // Get PM1BLK_Base & GPE0BLK_Base\r
104 //\r
105 PM1BLK_Base = PcdGet16 (PcdPm1blkIoBaseAddress);\r
106 GPE0BLK_Base = PcdGet16 (PcdGpe0blkIoBaseAddress);\r
107\r
108 //\r
109 // Clear the Power Button Override Status Bit, it gates EOS from being set.\r
110 // In QuarkNcSocId - Bit is read only. Handled by external SMC, do nothing.\r
111 //\r
112\r
113 //\r
114 // Clear the APM SMI Status Bit\r
115 //\r
116 IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_APM);\r
117\r
118 //\r
119 // Set the EOS Bit\r
120 //\r
121 IoOr32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_EOS);\r
122\r
123 return EFI_SUCCESS;\r
124}\r
125\r
126\r
127EFI_STATUS\r
128EFIAPI\r
129SmmTrigger (\r
130 IN UINT8 Data\r
131 )\r
132/*++\r
133\r
134Routine Description:\r
135\r
136 Trigger the software SMI\r
137\r
138Arguments:\r
139\r
140 Data The value to be set on the software SMI data port\r
141\r
142Returns:\r
143\r
144 EFI_SUCCESS Function completes successfully\r
145\r
146--*/\r
147{\r
148 UINT16 GPE0BLK_Base;\r
149 UINT32 NewValue;\r
150\r
151 //\r
152 // Get GPE0BLK_Base\r
153 //\r
154 GPE0BLK_Base = PcdGet16 (PcdGpe0blkIoBaseAddress);\r
155\r
156 //\r
157 // Enable the APMC SMI\r
158 //\r
159 IoOr32 (GPE0BLK_Base + R_QNC_GPE0BLK_SMIE, B_QNC_GPE0BLK_SMIE_APM);\r
160\r
161 //\r
162 // Enable SMI globally\r
163 //\r
164 NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);\r
165 NewValue |= SMI_EN;\r
166 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);\r
167\r
168\r
169 //\r
170 // Generate the APMC SMI\r
171 //\r
172 IoWrite8 (PcdGet16 (PcdSmmActivationPort), Data);\r
173\r
174 return EFI_SUCCESS;\r
175}\r
176\r
177/**\r
178 Generates an SMI using the parameters passed in.\r
179\r
180 @param PeiServices Describes the list of possible PEI Services.\r
181 @param This A pointer to an instance of\r
182 EFI_SMM_CONTROL_PPI\r
183 @param ArgumentBuffer The argument buffer\r
184 @param ArgumentBufferSize The size of the argument buffer\r
185 @param Periodic TRUE to indicate a periodical SMI\r
186 @param ActivationInterval Interval of the periodical SMI\r
187\r
188 @retval EFI_INVALID_PARAMETER Periodic is TRUE or ArgumentBufferSize > 1\r
189 @retval EFI_SUCCESS SMI generated\r
190\r
191**/\r
192EFI_STATUS\r
193EFIAPI\r
194PeiActivate (\r
195 IN EFI_PEI_SERVICES **PeiServices,\r
196 IN PEI_SMM_CONTROL_PPI *This,\r
197 IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
198 IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
199 IN BOOLEAN Periodic OPTIONAL,\r
200 IN UINTN ActivationInterval OPTIONAL\r
201 )\r
202{\r
203 INT8 Data;\r
204 EFI_STATUS Status;\r
205 //\r
206 // Periodic SMI not supported.\r
207 //\r
208 if (Periodic) {\r
209 DEBUG ((DEBUG_WARN, "Invalid parameter\n"));\r
210 return EFI_INVALID_PARAMETER;\r
211 }\r
212\r
213 if (ArgumentBuffer == NULL) {\r
214 Data = 0xFF;\r
215 } else {\r
216 if (ArgumentBufferSize == NULL || *ArgumentBufferSize != 1) {\r
217 return EFI_INVALID_PARAMETER;\r
218 }\r
219\r
220 Data = *ArgumentBuffer;\r
221 }\r
222 //\r
223 // Clear any pending the APM SMI\r
224 //\r
225 Status = SmmClear ();\r
226 if (EFI_ERROR (Status)) {\r
227 return Status;\r
228 }\r
229\r
230 return SmmTrigger (Data);\r
231}\r
232\r
233/**\r
234 Clears an SMI.\r
235\r
236 @param PeiServices Describes the list of possible PEI Services.\r
237 @param This Pointer to an instance of EFI_SMM_CONTROL_PPI\r
238 @param Periodic TRUE to indicate a periodical SMI\r
239\r
240 @return Return value from SmmClear()\r
241\r
242**/\r
243EFI_STATUS\r
244EFIAPI\r
245PeiDeactivate (\r
246 IN EFI_PEI_SERVICES **PeiServices,\r
247 IN PEI_SMM_CONTROL_PPI *This,\r
248 IN BOOLEAN Periodic OPTIONAL\r
249 )\r
250{\r
251 if (Periodic) {\r
252 return EFI_INVALID_PARAMETER;\r
253 }\r
254 return SmmClear ();\r
255}\r
256\r
257/**\r
258 This is the constructor for the SMM Control Ppi.\r
259\r
260 This function installs EFI_SMM_CONTROL_PPI.\r
261\r
262 @param FileHandle Handle of the file being invoked.\r
263 @param PeiServices Describes the list of possible PEI Services.\r
264\r
265 @retval EFI_UNSUPPORTED There's no Intel ICH on this platform\r
266 @return The status returned from InstallPpi().\r
267\r
268--*/\r
269EFI_STATUS\r
270EFIAPI\r
271SmmControlPeiEntry (\r
272 IN EFI_PEI_FILE_HANDLE FileHandle,\r
273 IN CONST EFI_PEI_SERVICES **PeiServices\r
274 )\r
275{\r
276 EFI_STATUS Status;\r
277\r
278 Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);\r
279 ASSERT_EFI_ERROR (Status);\r
280\r
281 return Status;\r
282}\r