SecurityPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / SecurityPkg / Library / Tpm12DeviceLibDTpm / Tpm12Tis.c

/** @file\r
  TIS (TPM Interface Specification) functions used by TPM1.2.\r
\r
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Uefi.h>\r
#include <IndustryStandard/Tpm12.h>\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/TimerLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/Tpm12CommandLib.h>\r
#include <Library/PcdLib.h>\r
\r
#include <IndustryStandard/TpmPtp.h>\r
#include <IndustryStandard/TpmTis.h>\r
\r
typedef enum {\r
  PtpInterfaceTis,\r
  PtpInterfaceFifo,\r
  PtpInterfaceCrb,\r
  PtpInterfaceMax,\r
} PTP_INTERFACE_TYPE;\r
\r
//\r
// Max TPM command/reponse length\r
//\r
#define TPMCMDBUFLENGTH             1024\r
\r
/**\r
  Check whether TPM chip exist.\r
\r
  @param[in] TisReg  Pointer to TIS register.\r
\r
  @retval    TRUE    TPM chip exists.\r
  @retval    FALSE   TPM chip is not found.\r
**/\r
BOOLEAN\r
Tpm12TisPcPresenceCheck (\r
  IN      TIS_PC_REGISTERS_PTR      TisReg\r
  )\r
{\r
  UINT8                             RegRead;\r
\r
  RegRead = MmioRead8 ((UINTN)&TisReg->Access);\r
  return (BOOLEAN)(RegRead != (UINT8)-1);\r
}\r
\r
/**\r
  Return PTP interface type.\r
\r
  @param[in] Register                Pointer to PTP register.\r
\r
  @return PTP interface type.\r
**/\r
PTP_INTERFACE_TYPE\r
Tpm12GetPtpInterface (\r
  IN VOID *Register\r
  )\r
{\r
  PTP_CRB_INTERFACE_IDENTIFIER  InterfaceId;\r
  PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;\r
\r
  if (!Tpm12TisPcPresenceCheck (Register)) {\r
    return PtpInterfaceMax;\r
  }\r
  //\r
  // Check interface id\r
  //\r
  InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);\r
  InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);\r
\r
  if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&\r
      (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&\r
      (InterfaceId.Bits.CapCRB != 0)) {\r
    return PtpInterfaceCrb;\r
  }\r
  if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&\r
      (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&\r
      (InterfaceId.Bits.CapFIFO != 0) &&\r
      (InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {\r
    return PtpInterfaceFifo;\r
  }\r
  return PtpInterfaceTis;\r
}\r
\r
/**\r
  Check whether the value of a TPM chip register satisfies the input BIT setting.\r
\r
  @param[in]  Register     Address port of register to be checked.\r
  @param[in]  BitSet       Check these data bits are set.\r
  @param[in]  BitClear     Check these data bits are clear.\r
  @param[in]  TimeOut      The max wait time (unit MicroSecond) when checking register.\r
\r
  @retval     EFI_SUCCESS  The register satisfies the check bit.\r
  @retval     EFI_TIMEOUT  The register can't run into the expected status in time.\r
**/\r
EFI_STATUS\r
Tpm12TisPcWaitRegisterBits (\r
  IN      UINT8                     *Register,\r
  IN      UINT8                     BitSet,\r
  IN      UINT8                     BitClear,\r
  IN      UINT32                    TimeOut\r
  )\r
{\r
  UINT8                             RegRead;\r
  UINT32                            WaitTime;\r
\r
  for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30){\r
    RegRead = MmioRead8 ((UINTN)Register);\r
    if ((RegRead & BitSet) == BitSet && (RegRead & BitClear) == 0)\r
      return EFI_SUCCESS;\r
    MicroSecondDelay (30);\r
  }\r
  return EFI_TIMEOUT;\r
}\r
\r
/**\r
  Get BurstCount by reading the burstCount field of a TIS regiger\r
  in the time of default TIS_TIMEOUT_D.\r
\r
  @param[in]  TisReg                Pointer to TIS register.\r
  @param[out] BurstCount            Pointer to a buffer to store the got BurstConut.\r
\r
  @retval     EFI_SUCCESS           Get BurstCount.\r
  @retval     EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL.\r
  @retval     EFI_TIMEOUT           BurstCount can't be got in time.\r
**/\r
EFI_STATUS\r
Tpm12TisPcReadBurstCount (\r
  IN      TIS_PC_REGISTERS_PTR      TisReg,\r
     OUT  UINT16                    *BurstCount\r
  )\r
{\r
  UINT32                            WaitTime;\r
  UINT8                             DataByte0;\r
  UINT8                             DataByte1;\r
\r
  if (BurstCount == NULL || TisReg == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  WaitTime = 0;\r
  do {\r
    //\r
    // TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned,\r
    // so it needs to use MmioRead8 to read two times\r
    //\r
    DataByte0   = MmioRead8 ((UINTN)&TisReg->BurstCount);\r
    DataByte1   = MmioRead8 ((UINTN)&TisReg->BurstCount + 1);\r
    *BurstCount = (UINT16)((DataByte1 << 8) + DataByte0);\r
    if (*BurstCount != 0) {\r
      return EFI_SUCCESS;\r
    }\r
    MicroSecondDelay (30);\r
    WaitTime += 30;\r
  } while (WaitTime < TIS_TIMEOUT_D);\r
\r
  return EFI_TIMEOUT;\r
}\r
\r
/**\r
  Set TPM chip to ready state by sending ready command TIS_PC_STS_READY\r
  to Status Register in time.\r
\r
  @param[in] TisReg                Pointer to TIS register.\r
\r
  @retval    EFI_SUCCESS           TPM chip enters into ready state.\r
  @retval    EFI_INVALID_PARAMETER TisReg is NULL.\r
  @retval    EFI_TIMEOUT           TPM chip can't be set to ready state in time.\r
**/\r
EFI_STATUS\r
Tpm12TisPcPrepareCommand (\r
  IN      TIS_PC_REGISTERS_PTR      TisReg\r
  )\r
{\r
  EFI_STATUS                        Status;\r
\r
  if (TisReg == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_READY);\r
  Status = Tpm12TisPcWaitRegisterBits (\r
             &TisReg->Status,\r
             TIS_PC_STS_READY,\r
             0,\r
             TIS_TIMEOUT_B\r
             );\r
  return Status;\r
}\r
\r
/**\r
  Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE\r
  to ACCESS Register in the time of default TIS_TIMEOUT_A.\r
\r
  @param[in] TisReg                Pointer to TIS register.\r
\r
  @retval    EFI_SUCCESS           Get the control of TPM chip.\r
  @retval    EFI_INVALID_PARAMETER TisReg is NULL.\r
  @retval    EFI_NOT_FOUND         TPM chip doesn't exit.\r
  @retval    EFI_TIMEOUT           Can't get the TPM control in time.\r
**/\r
EFI_STATUS\r
Tpm12TisPcRequestUseTpm (\r
  IN      TIS_PC_REGISTERS_PTR      TisReg\r
  )\r
{\r
  EFI_STATUS                        Status;\r
\r
  if (TisReg == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if (!Tpm12TisPcPresenceCheck (TisReg)) {\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  MmioWrite8((UINTN)&TisReg->Access, TIS_PC_ACC_RQUUSE);\r
  Status = Tpm12TisPcWaitRegisterBits (\r
             &TisReg->Access,\r
             (UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID),\r
             0,\r
             TIS_TIMEOUT_A\r
             );\r
  return Status;\r
}\r
\r
/**\r
  Send a command to TPM for execution and return response data.\r
\r
  @param[in]      TisReg        TPM register space base address.\r
  @param[in]      BufferIn      Buffer for command data.\r
  @param[in]      SizeIn        Size of command data.\r
  @param[in, out] BufferOut     Buffer for response data.\r
  @param[in, out] SizeOut       Size of response data.\r
\r
  @retval EFI_SUCCESS           Operation completed successfully.\r
  @retval EFI_BUFFER_TOO_SMALL  Response data buffer is too small.\r
  @retval EFI_DEVICE_ERROR      Unexpected device behavior.\r
  @retval EFI_UNSUPPORTED       Unsupported TPM version\r
\r
**/\r
EFI_STATUS\r
Tpm12TisTpmCommand (\r
  IN     TIS_PC_REGISTERS_PTR       TisReg,\r
  IN     UINT8                      *BufferIn,\r
  IN     UINT32                     SizeIn,\r
  IN OUT UINT8                      *BufferOut,\r
  IN OUT UINT32                     *SizeOut\r
  )\r
{\r
  EFI_STATUS                        Status;\r
  UINT16                            BurstCount;\r
  UINT32                            Index;\r
  UINT32                            TpmOutSize;\r
  UINT16                            Data16;\r
  UINT32                            Data32;\r
  UINT16                            RspTag;\r
\r
  DEBUG_CODE (\r
    UINTN  DebugSize;\r
\r
    DEBUG ((EFI_D_VERBOSE, "Tpm12TisTpmCommand Send - "));\r
    if (SizeIn > 0x100) {\r
      DebugSize = 0x40;\r
    } else {\r
      DebugSize = SizeIn;\r
    }\r
    for (Index = 0; Index < DebugSize; Index++) {\r
      DEBUG ((EFI_D_VERBOSE, "%02x ", BufferIn[Index]));\r
    }\r
    if (DebugSize != SizeIn) {\r
      DEBUG ((EFI_D_VERBOSE, "...... "));\r
      for (Index = SizeIn - 0x20; Index < SizeIn; Index++) {\r
        DEBUG ((EFI_D_VERBOSE, "%02x ", BufferIn[Index]));\r
      }\r
    }\r
    DEBUG ((EFI_D_VERBOSE, "\n"));\r
  );\r
  TpmOutSize = 0;\r
\r
  Status = Tpm12TisPcPrepareCommand (TisReg);\r
  if (EFI_ERROR (Status)){\r
    DEBUG ((DEBUG_ERROR, "Tpm12 is not ready for command!\n"));\r
    return EFI_DEVICE_ERROR;\r
  }\r
  //\r
  // Send the command data to Tpm\r
  //\r
  Index = 0;\r
  while (Index < SizeIn) {\r
    Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount);\r
    if (EFI_ERROR (Status)) {\r
      Status = EFI_DEVICE_ERROR;\r
      goto Exit;\r
    }\r
    for (; BurstCount > 0 && Index < SizeIn; BurstCount--) {\r
      MmioWrite8((UINTN)&TisReg->DataFifo, *(BufferIn + Index));\r
      Index++;\r
    }\r
  }\r
  //\r
  // Check the Tpm status STS_EXPECT change from 1 to 0\r
  //\r
  Status = Tpm12TisPcWaitRegisterBits (\r
             &TisReg->Status,\r
             (UINT8) TIS_PC_VALID,\r
             TIS_PC_STS_EXPECT,\r
             TIS_TIMEOUT_C\r
             );\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((DEBUG_ERROR, "Tpm12 The send buffer too small!\n"));\r
    Status = EFI_BUFFER_TOO_SMALL;\r
    goto Exit;\r
  }\r
  //\r
  // Executed the TPM command and waiting for the response data ready\r
  //\r
  MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_GO);\r
  Status = Tpm12TisPcWaitRegisterBits (\r
             &TisReg->Status,\r
             (UINT8) (TIS_PC_VALID | TIS_PC_STS_DATA),\r
             0,\r
             TIS_TIMEOUT_B\r
             );\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((DEBUG_ERROR, "Wait for Tpm12 response data time out!!\n"));\r
    Status = EFI_DEVICE_ERROR;\r
    goto Exit;\r
  }\r
  //\r
  // Get response data header\r
  //\r
  Index = 0;\r
  BurstCount = 0;\r
  while (Index < sizeof (TPM_RSP_COMMAND_HDR)) {\r
    Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount);\r
    if (EFI_ERROR (Status)) {\r
      Status = EFI_DEVICE_ERROR;\r
      goto Exit;\r
    }\r
    for (; BurstCount > 0; BurstCount--) {\r
      *(BufferOut + Index) = MmioRead8 ((UINTN)&TisReg->DataFifo);\r
      Index++;\r
      if (Index == sizeof (TPM_RSP_COMMAND_HDR)) break;\r
    }\r
  }\r
  DEBUG_CODE (\r
    DEBUG ((EFI_D_VERBOSE, "Tpm12TisTpmCommand ReceiveHeader - "));\r
    for (Index = 0; Index < sizeof (TPM_RSP_COMMAND_HDR); Index++) {\r
      DEBUG ((EFI_D_VERBOSE, "%02x ", BufferOut[Index]));\r
    }\r
    DEBUG ((EFI_D_VERBOSE, "\n"));\r
  );\r
  //\r
  // Check the response data header (tag, parasize and returncode)\r
  //\r
  CopyMem (&Data16, BufferOut, sizeof (UINT16));\r
  RspTag = SwapBytes16 (Data16);\r
  if (RspTag != TPM_TAG_RSP_COMMAND && RspTag != TPM_TAG_RSP_AUTH1_COMMAND && RspTag != TPM_TAG_RSP_AUTH2_COMMAND) {\r
    DEBUG ((EFI_D_ERROR, "TPM12: Response tag error - current tag value is %x\n", RspTag));\r
    Status = EFI_UNSUPPORTED;\r
    goto Exit;\r
  }\r
\r
  CopyMem (&Data32, (BufferOut + 2), sizeof (UINT32));\r
  TpmOutSize  = SwapBytes32 (Data32);\r
  if (*SizeOut < TpmOutSize) {\r
    Status = EFI_BUFFER_TOO_SMALL;\r
    goto Exit;\r
  }\r
  *SizeOut = TpmOutSize;\r
  //\r
  // Continue reading the remaining data\r
  //\r
  while ( Index < TpmOutSize ) {\r
    for (; BurstCount > 0; BurstCount--) {\r
      *(BufferOut + Index) = MmioRead8 ((UINTN)&TisReg->DataFifo);\r
      Index++;\r
      if (Index == TpmOutSize) {\r
        Status = EFI_SUCCESS;\r
        goto Exit;\r
      }\r
    }\r
    Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount);\r
    if (EFI_ERROR (Status)) {\r
      Status = EFI_DEVICE_ERROR;\r
      goto Exit;\r
    }\r
  }\r
Exit:\r
  DEBUG_CODE (\r
    DEBUG ((EFI_D_VERBOSE, "Tpm12TisTpmCommand Receive - "));\r
    for (Index = 0; Index < TpmOutSize; Index++) {\r
      DEBUG ((EFI_D_VERBOSE, "%02x ", BufferOut[Index]));\r
    }\r
    DEBUG ((EFI_D_VERBOSE, "\n"));\r
  );\r
  MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_READY);\r
  return Status;\r
}\r
\r
/**\r
  This service enables the sending of commands to the TPM12.\r
\r
  @param[in]      InputParameterBlockSize  Size of the TPM12 input parameter block.\r
  @param[in]      InputParameterBlock      Pointer to the TPM12 input parameter block.\r
  @param[in,out]  OutputParameterBlockSize Size of the TPM12 output parameter block.\r
  @param[in]      OutputParameterBlock     Pointer to the TPM12 output parameter block.\r
\r
  @retval EFI_SUCCESS            The command byte stream was successfully sent to the device and a response was successfully received.\r
  @retval EFI_DEVICE_ERROR       The command was not successfully sent to the device or a response was not successfully received from the device.\r
  @retval EFI_BUFFER_TOO_SMALL   The output parameter block is too small.\r
**/\r
EFI_STATUS\r
EFIAPI\r
Tpm12SubmitCommand (\r
  IN UINT32            InputParameterBlockSize,\r
  IN UINT8             *InputParameterBlock,\r
  IN OUT UINT32        *OutputParameterBlockSize,\r
  IN UINT8             *OutputParameterBlock\r
  )\r
{\r
  PTP_INTERFACE_TYPE  PtpInterface;\r
\r
  //\r
  // Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address.\r
  //\r
  PtpInterface = Tpm12GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
  switch (PtpInterface) {\r
  case PtpInterfaceFifo:\r
  case PtpInterfaceTis:\r
    return Tpm12TisTpmCommand (\r
             (TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress),\r
             InputParameterBlock,\r
             InputParameterBlockSize,\r
             OutputParameterBlock,\r
             OutputParameterBlockSize\r
             );\r
  case PtpInterfaceCrb:\r
    //\r
    // No need to support CRB because it is only accept TPM2 command.\r
    //\r
  default:\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
}\r
\r
/**\r
  Check whether the value of a TPM chip register satisfies the input BIT setting.\r
\r
  @param[in]  Register     Address port of register to be checked.\r
  @param[in]  BitSet       Check these data bits are set.\r
  @param[in]  BitClear     Check these data bits are clear.\r
  @param[in]  TimeOut      The max wait time (unit MicroSecond) when checking register.\r
\r
  @retval     EFI_SUCCESS  The register satisfies the check bit.\r
  @retval     EFI_TIMEOUT  The register can't run into the expected status in time.\r
**/\r
EFI_STATUS\r
Tpm12PtpCrbWaitRegisterBits (\r
  IN      UINT32                    *Register,\r
  IN      UINT32                    BitSet,\r
  IN      UINT32                    BitClear,\r
  IN      UINT32                    TimeOut\r
  )\r
{\r
  UINT32                            RegRead;\r
  UINT32                            WaitTime;\r
\r
  for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30){\r
    RegRead = MmioRead32 ((UINTN)Register);\r
    if ((RegRead & BitSet) == BitSet && (RegRead & BitClear) == 0) {\r
      return EFI_SUCCESS;\r
    }\r
    MicroSecondDelay (30);\r
  }\r
  return EFI_TIMEOUT;\r
}\r
\r
/**\r
  Get the control of TPM chip.\r
\r
  @param[in] CrbReg                Pointer to CRB register.\r
\r
  @retval    EFI_SUCCESS           Get the control of TPM chip.\r
  @retval    EFI_INVALID_PARAMETER CrbReg is NULL.\r
  @retval    EFI_NOT_FOUND         TPM chip doesn't exit.\r
  @retval    EFI_TIMEOUT           Can't get the TPM control in time.\r
**/\r
EFI_STATUS\r
Tpm12PtpCrbRequestUseTpm (\r
  IN      PTP_CRB_REGISTERS_PTR      CrbReg\r
  )\r
{\r
  EFI_STATUS                        Status;\r
\r
  MmioWrite32((UINTN)&CrbReg->LocalityControl, PTP_CRB_LOCALITY_CONTROL_REQUEST_ACCESS);\r
  Status = Tpm12PtpCrbWaitRegisterBits (\r
             &CrbReg->LocalityStatus,\r
             PTP_CRB_LOCALITY_STATUS_GRANTED,\r
             0,\r
             PTP_TIMEOUT_A\r
             );\r
  return Status;\r
}\r
\r
/**\r
  This service requests use TPM12.\r
\r
  @retval EFI_SUCCESS      Get the control of TPM12 chip.\r
  @retval EFI_NOT_FOUND    TPM12 not found.\r
  @retval EFI_DEVICE_ERROR Unexpected device behavior.\r
**/\r
EFI_STATUS\r
EFIAPI\r
Tpm12RequestUseTpm (\r
  VOID\r
  )\r
{\r
  PTP_INTERFACE_TYPE  PtpInterface;\r
\r
  //\r
  // Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address.\r
  // Some other program might leverage this function to check the existence of TPM chip.\r
  //\r
  PtpInterface = Tpm12GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
  switch (PtpInterface) {\r
  case PtpInterfaceCrb:\r
    return Tpm12PtpCrbRequestUseTpm ((PTP_CRB_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
  case PtpInterfaceFifo:\r
  case PtpInterfaceTis:\r
    return Tpm12TisPcRequestUseTpm ((TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
  default:\r
    return EFI_NOT_FOUND;\r
  }\r
}\r