0c18794e |
1 | /** @file\r |
2 | Basic TIS (TPM Interface Specification) functions.\r |
3 | \r |
4 | Copyright (c) 2005 - 2011, Intel Corporation. All rights reserved.<BR>\r |
5 | This program and the accompanying materials \r |
6 | are licensed and made available under the terms and conditions of the BSD License \r |
7 | which accompanies this distribution. The full text of the license may be found at \r |
8 | http://opensource.org/licenses/bsd-license.php\r |
9 | \r |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
12 | \r |
13 | **/\r |
14 | \r |
15 | #include "CommonHeader.h"\r |
16 | \r |
17 | /**\r |
18 | Check whether TPM chip exist.\r |
19 | \r |
20 | @param[in] TisReg Pointer to TIS register.\r |
21 | \r |
22 | @retval TRUE TPM chip exists.\r |
23 | @retval FALSE TPM chip is not found.\r |
24 | **/\r |
25 | BOOLEAN\r |
26 | TisPcPresenceCheck (\r |
27 | IN TIS_PC_REGISTERS_PTR TisReg\r |
28 | )\r |
29 | {\r |
30 | UINT8 RegRead;\r |
31 | \r |
32 | RegRead = MmioRead8 ((UINTN)&TisReg->Access);\r |
33 | return (BOOLEAN)(RegRead != (UINT8)-1);\r |
34 | }\r |
35 | \r |
36 | /**\r |
37 | Check whether the value of a TPM chip register satisfies the input BIT setting.\r |
38 | \r |
39 | @param[in] Register Address port of register to be checked.\r |
40 | @param[in] BitSet Check these data bits are set.\r |
41 | @param[in] BitClear Check these data bits are clear.\r |
42 | @param[in] TimeOut The max wait time (unit MicroSecond) when checking register.\r |
43 | \r |
44 | @retval EFI_SUCCESS The register satisfies the check bit.\r |
45 | @retval EFI_TIMEOUT The register can't run into the expected status in time.\r |
46 | **/\r |
47 | EFI_STATUS\r |
48 | EFIAPI\r |
49 | TisPcWaitRegisterBits (\r |
50 | IN UINT8 *Register,\r |
51 | IN UINT8 BitSet,\r |
52 | IN UINT8 BitClear,\r |
53 | IN UINT32 TimeOut\r |
54 | )\r |
55 | {\r |
56 | UINT8 RegRead;\r |
57 | UINT32 WaitTime;\r |
58 | \r |
59 | for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30){\r |
60 | RegRead = MmioRead8 ((UINTN)Register);\r |
61 | if ((RegRead & BitSet) == BitSet && (RegRead & BitClear) == 0)\r |
62 | return EFI_SUCCESS;\r |
63 | MicroSecondDelay (30);\r |
64 | }\r |
65 | return EFI_TIMEOUT;\r |
66 | }\r |
67 | \r |
68 | /**\r |
69 | Get BurstCount by reading the burstCount field of a TIS regiger \r |
70 | in the time of default TIS_TIMEOUT_D.\r |
71 | \r |
72 | @param[in] TisReg Pointer to TIS register.\r |
73 | @param[out] BurstCount Pointer to a buffer to store the got BurstConut.\r |
74 | \r |
75 | @retval EFI_SUCCESS Get BurstCount.\r |
76 | @retval EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL.\r |
77 | @retval EFI_TIMEOUT BurstCount can't be got in time.\r |
78 | **/\r |
79 | EFI_STATUS\r |
80 | EFIAPI\r |
81 | TisPcReadBurstCount (\r |
82 | IN TIS_PC_REGISTERS_PTR TisReg,\r |
83 | OUT UINT16 *BurstCount\r |
84 | )\r |
85 | {\r |
86 | UINT32 WaitTime;\r |
87 | UINT8 DataByte0;\r |
88 | UINT8 DataByte1;\r |
89 | \r |
90 | if (BurstCount == NULL || TisReg == NULL) {\r |
91 | return EFI_INVALID_PARAMETER;\r |
92 | }\r |
93 | \r |
94 | WaitTime = 0;\r |
95 | do {\r |
96 | //\r |
97 | // TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned,\r |
98 | // so it needs to use MmioRead8 to read two times\r |
99 | //\r |
100 | DataByte0 = MmioRead8 ((UINTN)&TisReg->BurstCount);\r |
101 | DataByte1 = MmioRead8 ((UINTN)&TisReg->BurstCount + 1);\r |
102 | *BurstCount = (UINT16)((DataByte1 << 8) + DataByte0);\r |
103 | if (*BurstCount != 0) {\r |
104 | return EFI_SUCCESS;\r |
105 | }\r |
106 | MicroSecondDelay (30);\r |
107 | WaitTime += 30;\r |
108 | } while (WaitTime < TIS_TIMEOUT_D);\r |
109 | \r |
110 | return EFI_TIMEOUT;\r |
111 | }\r |
112 | \r |
113 | /**\r |
114 | Set TPM chip to ready state by sending ready command TIS_PC_STS_READY \r |
115 | to Status Register in time.\r |
116 | \r |
117 | @param[in] TisReg Pointer to TIS register.\r |
118 | \r |
119 | @retval EFI_SUCCESS TPM chip enters into ready state.\r |
120 | @retval EFI_INVALID_PARAMETER TisReg is NULL.\r |
121 | @retval EFI_TIMEOUT TPM chip can't be set to ready state in time.\r |
122 | **/\r |
123 | EFI_STATUS\r |
124 | EFIAPI\r |
125 | TisPcPrepareCommand (\r |
126 | IN TIS_PC_REGISTERS_PTR TisReg\r |
127 | )\r |
128 | {\r |
129 | EFI_STATUS Status;\r |
130 | \r |
131 | if (TisReg == NULL) {\r |
132 | return EFI_INVALID_PARAMETER;\r |
133 | }\r |
134 | \r |
135 | MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_READY);\r |
136 | Status = TisPcWaitRegisterBits (\r |
137 | &TisReg->Status,\r |
138 | TIS_PC_STS_READY,\r |
139 | 0,\r |
140 | TIS_TIMEOUT_B\r |
141 | );\r |
142 | return Status;\r |
143 | }\r |
144 | \r |
145 | /**\r |
146 | Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE \r |
147 | to ACCESS Register in the time of default TIS_TIMEOUT_D.\r |
148 | \r |
149 | @param[in] TisReg Pointer to TIS register.\r |
150 | \r |
151 | @retval EFI_SUCCESS Get the control of TPM chip.\r |
152 | @retval EFI_INVALID_PARAMETER TisReg is NULL.\r |
153 | @retval EFI_NOT_FOUND TPM chip doesn't exit.\r |
154 | @retval EFI_TIMEOUT Can't get the TPM control in time.\r |
155 | **/\r |
156 | EFI_STATUS\r |
157 | EFIAPI\r |
158 | TisPcRequestUseTpm (\r |
159 | IN TIS_PC_REGISTERS_PTR TisReg\r |
160 | )\r |
161 | {\r |
162 | EFI_STATUS Status;\r |
163 | \r |
164 | if (TisReg == NULL) {\r |
165 | return EFI_INVALID_PARAMETER;\r |
166 | }\r |
167 | \r |
168 | if (!TisPcPresenceCheck (TisReg)) {\r |
169 | return EFI_NOT_FOUND;\r |
170 | }\r |
171 | \r |
172 | MmioWrite8((UINTN)&TisReg->Access, TIS_PC_ACC_RQUUSE);\r |
173 | Status = TisPcWaitRegisterBits (\r |
174 | &TisReg->Access,\r |
175 | (UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID),\r |
176 | 0,\r |
177 | TIS_TIMEOUT_D\r |
178 | );\r |
179 | return Status;\r |
180 | }\r |