projects / mirror_edk2.git / blame
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1 | /** @file\r |
| 2 | Header file for IDE mode of ATA host controller.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | This program and the accompanying materials\r | |
| 6 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | http://opensource.org/licenses/bsd-license.php\r | |
| 9 | \r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | \r | |
| 13 | **/\r | |
| 14 | \r | |
| 15 | \r | |
| 16 | \r | |
| 17 | #ifndef __OPAL_PASSWORD_IDE_MODE_H__\r | |
| 18 | #define __OPAL_PASSWORD_IDE_MODE_H__\r | |
| 19 | \r | |
| 20 | typedef enum {\r | |
| 21 | EfiIdePrimary = 0,\r | |
| 22 | EfiIdeSecondary = 1,\r | |
| 23 | EfiIdeMaxChannel = 2\r | |
| 24 | } EFI_IDE_CHANNEL;\r | |
| 25 | \r | |
| 26 | typedef enum {\r | |
| 27 | EfiIdeMaster = 0,\r | |
| 28 | EfiIdeSlave = 1,\r | |
| 29 | EfiIdeMaxDevice = 2\r | |
| 30 | } EFI_IDE_DEVICE;\r | |
| 31 | \r | |
| 32 | //\r | |
| 33 | // IDE registers set\r | |
| 34 | //\r | |
| 35 | typedef struct {\r | |
| 36 | UINT16 Data;\r | |
| 37 | UINT16 ErrOrFeature;\r | |
| 38 | UINT16 SectorCount;\r | |
| 39 | UINT16 SectorNumber;\r | |
| 40 | UINT16 CylinderLsb;\r | |
| 41 | UINT16 CylinderMsb;\r | |
| 42 | UINT16 Head;\r | |
| 43 | UINT16 CmdOrStatus;\r | |
| 44 | UINT16 AltOrDev;\r | |
| 45 | } EFI_IDE_REGISTERS;\r | |
| 46 | \r | |
| 47 | //\r | |
| 48 | // Bit definitions in Programming Interface byte of the Class Code field\r | |
| 49 | // in PCI IDE controller's Configuration Space\r | |
| 50 | //\r | |
| 51 | #define IDE_PRIMARY_OPERATING_MODE BIT0\r | |
| 52 | #define IDE_PRIMARY_PROGRAMMABLE_INDICATOR BIT1\r | |
| 53 | #define IDE_SECONDARY_OPERATING_MODE BIT2\r | |
| 54 | #define IDE_SECONDARY_PROGRAMMABLE_INDICATOR BIT3\r | |
| 55 | \r | |
| 56 | /**\r | |
| 57 | Get IDE i/o port registers' base addresses by mode.\r | |
| 58 | \r | |
| 59 | In 'Compatibility' mode, use fixed addresses.\r | |
| 60 | In Native-PCI mode, get base addresses from BARs in the PCI IDE controller's\r | |
| 61 | Configuration Space.\r | |
| 62 | \r | |
| 63 | The steps to get IDE i/o port registers' base addresses for each channel\r | |
| 64 | as follows:\r | |
| 65 | \r | |
| 66 | 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE\r | |
| 67 | controller's Configuration Space to determine the operating mode.\r | |
| 68 | \r | |
| 69 | 2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below.\r | |
| 70 | ___________________________________________\r | |
| 71 | | | Command Block | Control Block |\r | |
| 72 | | Channel | Registers | Registers |\r | |
| 73 | |___________|_______________|_______________|\r | |
| 74 | | Primary | 1F0h - 1F7h | 3F6h - 3F7h |\r | |
| 75 | |___________|_______________|_______________|\r | |
| 76 | | Secondary | 170h - 177h | 376h - 377h |\r | |
| 77 | |___________|_______________|_______________|\r | |
| 78 | \r | |
| 79 | Table 1. Compatibility resource mappings\r | |
| 80 | \r | |
| 81 | b) In Native-PCI mode, IDE registers are mapped into IO space using the BARs\r | |
| 82 | in IDE controller's PCI Configuration Space, shown in the Table 2 below.\r | |
| 83 | ___________________________________________________\r | |
| 84 | | | Command Block | Control Block |\r | |
| 85 | | Channel | Registers | Registers |\r | |
| 86 | |___________|___________________|___________________|\r | |
| 87 | | Primary | BAR at offset 0x10| BAR at offset 0x14|\r | |
| 88 | |___________|___________________|___________________|\r | |
| 89 | | Secondary | BAR at offset 0x18| BAR at offset 0x1C|\r | |
| 90 | |___________|___________________|___________________|\r | |
| 91 | \r | |
| 92 | Table 2. BARs for Register Mapping\r | |
| 93 | \r | |
| 94 | @param[in] Bus The bus number of ata host controller.\r | |
| 95 | @param[in] Device The device number of ata host controller.\r | |
| 96 | @param[in] Function The function number of ata host controller.\r | |
| 97 | @param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to\r | |
| 98 | store the IDE i/o port registers' base addresses\r | |
| 99 | \r | |
| 100 | @retval EFI_UNSUPPORTED Return this Value when the BARs is not IO type\r | |
| 101 | @retval EFI_SUCCESS Get the Base address successfully\r | |
| 102 | @retval Other Read the pci configureation Data error\r | |
| 103 | \r | |
| 104 | **/\r | |
| 105 | EFI_STATUS\r | |
| 106 | EFIAPI\r | |
| 107 | GetIdeRegisterIoAddr (\r | |
| 108 | IN UINTN Bus,\r | |
| 109 | IN UINTN Device,\r | |
| 110 | IN UINTN Function,\r | |
| 111 | IN OUT EFI_IDE_REGISTERS *IdeRegisters\r | |
| 112 | );\r | |
| 113 | \r | |
| 114 | /**\r | |
| 115 | Sends out an ATA Identify Command to the specified device.\r | |
| 116 | \r | |
| 117 | This function sends out the ATA Identify Command to the\r | |
| 118 | specified device. Only ATA device responses to this command. If\r | |
| 119 | the command succeeds, it returns the Identify Data structure which\r | |
| 120 | contains information about the device. This function extracts the\r | |
| 121 | information it needs to fill the IDE_BLK_IO_DEV Data structure,\r | |
| 122 | including device type, media block Size, media capacity, and etc.\r | |
| 123 | \r | |
| 124 | @param IdeRegisters A pointer to EFI_IDE_REGISTERS Data structure.\r | |
| 125 | @param Channel The channel number of device.\r | |
| 126 | @param Device The device number of device.\r | |
| 127 | @param Buffer A pointer to Data Buffer which is used to contain IDENTIFY Data.\r | |
| 128 | \r | |
| 129 | @retval EFI_SUCCESS Identify ATA device successfully.\r | |
| 130 | @retval EFI_DEVICE_ERROR ATA Identify Device Command failed or device is not ATA device.\r | |
| 131 | @retval EFI_OUT_OF_RESOURCES Allocate memory failed.\r | |
| 132 | **/\r | |
| 133 | EFI_STATUS\r | |
| 134 | EFIAPI\r | |
| 135 | AtaIdentify (\r | |
| 136 | IN EFI_IDE_REGISTERS *IdeRegisters,\r | |
| 137 | IN UINT8 Channel,\r | |
| 138 | IN UINT8 Device,\r | |
| 139 | IN OUT ATA_IDENTIFY_DATA *Buffer\r | |
| 140 | );\r | |
| 141 | \r | |
| 142 | /**\r | |
| 143 | This function is used to send out ATA commands conforms to the PIO Data In Protocol.\r | |
| 144 | \r | |
| 145 | @param IdeRegisters A pointer to EFI_IDE_REGISTERS Data structure.\r | |
| 146 | @param Buffer A pointer to the source Buffer for the Data.\r | |
| 147 | @param ByteCount The Length of the Data.\r | |
| 148 | @param Read Flag used to determine the Data transfer direction.\r | |
| 149 | Read equals 1, means Data transferred from device to host;\r | |
| 150 | Read equals 0, means Data transferred from host to device.\r | |
| 151 | @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK Data structure.\r | |
| 152 | @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK Data structure.\r | |
| 153 | @param Timeout The time to complete the command.\r | |
| 154 | \r | |
| 155 | @retval EFI_SUCCESS send out the ATA command and device send required Data successfully.\r | |
| 156 | @retval EFI_DEVICE_ERROR command sent failed.\r | |
| 157 | \r | |
| 158 | **/\r | |
| 159 | EFI_STATUS\r | |
| 160 | EFIAPI\r | |
| 161 | AtaPioDataInOut (\r | |
| 162 | IN EFI_IDE_REGISTERS *IdeRegisters,\r | |
| 163 | IN OUT VOID *Buffer,\r | |
| 164 | IN UINT64 ByteCount,\r | |
| 165 | IN BOOLEAN Read,\r | |
| 166 | IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,\r | |
| 167 | IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,\r | |
| 168 | IN UINT64 Timeout\r | |
| 169 | );\r | |
| 170 | \r | |
| 171 | \r | |
| 172 | #endif\r | |
| 173 | \r |