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5d73d92f | 1 | /** @file\r |
2 | Header file for Pci shell Debug1 function.\r | |
3 | \r | |
541ddf44 | 4 | Copyright (c) 2013 Hewlett-Packard Development Company, L.P.\r |
0c84a69f | 5 | Copyright (c) 2005 - 2017, Intel Corporation. All rights reserved.<BR>\r |
5d73d92f | 6 | This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #ifndef _EFI_SHELL_PCI_H_\r | |
17 | #define _EFI_SHELL_PCI_H_\r | |
18 | \r | |
19 | typedef enum {\r | |
20 | PciDevice,\r | |
21 | PciP2pBridge,\r | |
22 | PciCardBusBridge,\r | |
23 | PciUndefined\r | |
24 | } PCI_HEADER_TYPE;\r | |
25 | \r | |
5d73d92f | 26 | #define INDEX_OF(Field) ((UINT8 *) (Field) - (UINT8 *) mConfigSpace)\r |
27 | \r | |
5d73d92f | 28 | #define IS_PCIE_ENDPOINT(DevicePortType) \\r |
0c84a69f RN |
29 | ((DevicePortType) == PCIE_DEVICE_PORT_TYPE_PCIE_ENDPOINT || \\r |
30 | (DevicePortType) == PCIE_DEVICE_PORT_TYPE_LEGACY_PCIE_ENDPOINT || \\r | |
31 | (DevicePortType) == PCIE_DEVICE_PORT_TYPE_ROOT_COMPLEX_INTEGRATED_ENDPOINT)\r | |
5d73d92f | 32 | \r |
33 | #define IS_PCIE_SWITCH(DevicePortType) \\r | |
0c84a69f RN |
34 | ((DevicePortType == PCIE_DEVICE_PORT_TYPE_UPSTREAM_PORT) || \\r |
35 | (DevicePortType == PCIE_DEVICE_PORT_TYPE_DOWNSTREAM_PORT))\r | |
5d73d92f | 36 | \r |
37 | #pragma pack(1)\r | |
5d73d92f | 38 | //\r |
39 | // Data region after PCI configuration header(for cardbus bridge)\r | |
40 | //\r | |
41 | typedef struct {\r | |
42 | UINT16 SubVendorId; // Subsystem Vendor ID\r | |
43 | UINT16 SubSystemId; // Subsystem ID\r | |
44 | UINT32 LegacyBase; // Optional 16-Bit PC Card Legacy\r | |
45 | // Mode Base Address\r | |
46 | //\r | |
47 | UINT32 Data[46];\r | |
48 | } PCI_CARDBUS_DATA;\r | |
49 | \r | |
a1d4bfcc | 50 | typedef union {\r |
0c84a69f RN |
51 | PCI_DEVICE_HEADER_TYPE_REGION Device;\r |
52 | PCI_BRIDGE_CONTROL_REGISTER Bridge;\r | |
53 | PCI_CARDBUS_CONTROL_REGISTER CardBus;\r | |
a1d4bfcc | 54 | } NON_COMMON_UNION;\r |
55 | \r | |
5d73d92f | 56 | typedef struct {\r |
0c84a69f RN |
57 | PCI_DEVICE_INDEPENDENT_REGION Common;\r |
58 | NON_COMMON_UNION NonCommon;\r | |
59 | UINT32 Data[48];\r | |
5d73d92f | 60 | } PCI_CONFIG_SPACE;\r |
61 | \r | |
5d73d92f | 62 | #pragma pack()\r |
63 | \r | |
64 | #endif // _PCI_H_\r |