[mirror_edk2.git] / StdLib / Include / Ipf / machine / pte.h

/*	$NetBSD: pte.h,v 1.1 2006/04/07 14:21:18 cherry Exp $	*/\r
\r
/*-\r
 * Copyright (c) 2001 Doug Rabson\r
 * All rights reserved.\r
 *\r
 * Redistribution and use in source and binary forms, with or without\r
 * modification, are permitted provided that the following conditions\r
 * are met:\r
 * 1. Redistributions of source code must retain the above copyright\r
 *    notice, this list of conditions and the following disclaimer.\r
 * 2. Redistributions in binary form must reproduce the above copyright\r
 *    notice, this list of conditions and the following disclaimer in the\r
 *    documentation and/or other materials provided with the distribution.\r
 *\r
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
 * SUCH DAMAGE.\r
 *\r
 * $FreeBSD$\r
 */\r
\r
#ifndef _MACHINE_PTE_H_\r
#define	_MACHINE_PTE_H_\r
\r
#define	PTE_PRESENT	0x0000000000000001\r
#define	PTE__RV1_	0x0000000000000002\r
#define	PTE_MA_MASK	0x000000000000001C\r
#define	PTE_MA_WB	0x0000000000000000\r
#define	PTE_MA_UC	0x0000000000000010\r
#define	PTE_MA_UCE	0x0000000000000014\r
#define	PTE_MA_WC	0x0000000000000018\r
#define	PTE_MA_NATPAGE	0x000000000000001C\r
#define	PTE_ACCESSED	0x0000000000000020\r
#define	PTE_DIRTY	0x0000000000000040\r
#define	PTE_PL_MASK	0x0000000000000180\r
#define	PTE_PL_KERN	0x0000000000000000\r
#define	PTE_PL_USER	0x0000000000000180\r
#define	PTE_AR_MASK	0x0000000000000E00\r
\r
#define	PTE_AR_R	0x0000000000000000\r
#define	PTE_AR_RX	0x0000000000000200\r
#define	PTE_AR_RW	0x0000000000000400\r
#define	PTE_AR_RWX	0x0000000000000600\r
#define	PTE_AR_R_RW	0x0000000000000800\r
#define	PTE_AR_RX_RWX	0x0000000000000A00\r
#define	PTE_AR_RWX_RW	0x0000000000000C00\r
#define	PTE_AR_X_RX	0x0000000000000E00\r
#define	PTE_PPN_MASK	0x0003FFFFFFFFF000\r
#define	PTE__RV2_	0x000C000000000000\r
#define	PTE_ED		0x0010000000000000\r
#define	PTE_IG_MASK	0xFFE0000000000000\r
#define	PTE_WIRED	0x0020000000000000\r
#define	PTE_MANAGED	0x0040000000000000\r
#define	PTE_PROT_MASK	0x0700000000000000\r
\r
#define	ITIR__RV1_	0x0000000000000003\r
#define	ITIR_PS_MASK	0x00000000000000FC\r
#define	ITIR_KEY_MASK	0x00000000FFFFFF00\r
#define	ITIR__RV2_	0xFFFFFFFF00000000\r
\r
#ifndef _LOCORE\r
\r
typedef uint64_t pt_entry_t;\r
\r
static __inline pt_entry_t\r
pte_atomic_clear(pt_entry_t *ptep, uint64_t val)\r
{\r
	return (atomic_clear_64(ptep, val));\r
}\r
\r
static __inline pt_entry_t\r
pte_atomic_set(pt_entry_t *ptep, uint64_t val)\r
{\r
	return (atomic_set_64(ptep, val));\r
}\r
\r
/*\r
 * A long-format VHPT entry.\r
 */\r
struct ia64_lpte {\r
        pt_entry_t      pte;\r
        uint64_t        itir;\r
        uint64_t        tag;            /* includes ti */\r
        uint64_t        chain;          /* pa of collision chain */\r
};\r
\r
\r
/*\r
 * Layout of rr[x].\r
 */\r
struct ia64_rr {\r
	uint64_t	rr_ve	:1;	/* bit 0 */\r
	uint64_t	__rv1__	:1;	/* bit 1 */\r
	uint64_t	rr_ps	:6;	/* bits 2..7 */\r
	uint64_t	rr_rid	:24;	/* bits 8..31 */\r
	uint64_t	__rv2__	:32;	/* bits 32..63 */\r
};\r
\r
#endif /* !LOCORE */\r
\r
#endif /* !_MACHINE_PTE_H_ */\r
Commit	Line	Data
2aa62f2b	1	/* $NetBSD: pte.h,v 1.1 2006/04/07 14:21:18 cherry Exp $ */\r
	2	\r
	3	/*-\r
	4	* Copyright (c) 2001 Doug Rabson\r
	5	* All rights reserved.\r
	6	*\r
	7	* Redistribution and use in source and binary forms, with or without\r
	8	* modification, are permitted provided that the following conditions\r
	9	* are met:\r
	10	* 1. Redistributions of source code must retain the above copyright\r
	11	* notice, this list of conditions and the following disclaimer.\r
	12	* 2. Redistributions in binary form must reproduce the above copyright\r
	13	* notice, this list of conditions and the following disclaimer in the\r
	14	* documentation and/or other materials provided with the distribution.\r
	15	*\r
	16	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r
	17	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
	18	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
	19	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r
	20	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
	21	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
	22	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
	23	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
	24	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
	25	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
	26	* SUCH DAMAGE.\r
	27	*\r
	28	* $FreeBSD$\r
	29	*/\r
	30	\r
	31	#ifndef _MACHINE_PTE_H_\r
	32	#define _MACHINE_PTE_H_\r
	33	\r
	34	#define PTE_PRESENT 0x0000000000000001\r
	35	#define PTE__RV1_ 0x0000000000000002\r
	36	#define PTE_MA_MASK 0x000000000000001C\r
	37	#define PTE_MA_WB 0x0000000000000000\r
	38	#define PTE_MA_UC 0x0000000000000010\r
	39	#define PTE_MA_UCE 0x0000000000000014\r
	40	#define PTE_MA_WC 0x0000000000000018\r
	41	#define PTE_MA_NATPAGE 0x000000000000001C\r
	42	#define PTE_ACCESSED 0x0000000000000020\r
	43	#define PTE_DIRTY 0x0000000000000040\r
	44	#define PTE_PL_MASK 0x0000000000000180\r
	45	#define PTE_PL_KERN 0x0000000000000000\r
	46	#define PTE_PL_USER 0x0000000000000180\r
	47	#define PTE_AR_MASK 0x0000000000000E00\r
	48	\r
	49	#define PTE_AR_R 0x0000000000000000\r
	50	#define PTE_AR_RX 0x0000000000000200\r
	51	#define PTE_AR_RW 0x0000000000000400\r
	52	#define PTE_AR_RWX 0x0000000000000600\r
	53	#define PTE_AR_R_RW 0x0000000000000800\r
	54	#define PTE_AR_RX_RWX 0x0000000000000A00\r
	55	#define PTE_AR_RWX_RW 0x0000000000000C00\r
	56	#define PTE_AR_X_RX 0x0000000000000E00\r
	57	#define PTE_PPN_MASK 0x0003FFFFFFFFF000\r
	58	#define PTE__RV2_ 0x000C000000000000\r
	59	#define PTE_ED 0x0010000000000000\r
	60	#define PTE_IG_MASK 0xFFE0000000000000\r
	61	#define PTE_WIRED 0x0020000000000000\r
	62	#define PTE_MANAGED 0x0040000000000000\r
	63	#define PTE_PROT_MASK 0x0700000000000000\r
	64	\r
65	#define ITIR__RV1_ 0x0000000000000003\r
66	#define ITIR_PS_MASK 0x00000000000000FC\r
67	#define ITIR_KEY_MASK 0x00000000FFFFFF00\r
68	#define ITIR__RV2_ 0xFFFFFFFF00000000\r
69	\r
70	#ifndef _LOCORE\r
71	\r
72	typedef uint64_t pt_entry_t;\r
73	\r
74	static __inline pt_entry_t\r
75	pte_atomic_clear(pt_entry_t *ptep, uint64_t val)\r
76	{\r
77	return (atomic_clear_64(ptep, val));\r
78	}\r
79	\r
80	static __inline pt_entry_t\r
81	pte_atomic_set(pt_entry_t *ptep, uint64_t val)\r
82	{\r
83	return (atomic_set_64(ptep, val));\r
84	}\r
85	\r
86	/*\r
87	* A long-format VHPT entry.\r
88	*/\r
89	struct ia64_lpte {\r
90	pt_entry_t pte;\r
91	uint64_t itir;\r
92	uint64_t tag; /* includes ti */\r
93	uint64_t chain; /* pa of collision chain */\r
94	};\r
95	\r
96	\r
97	/*\r
98	* Layout of rr[x].\r
99	*/\r
100	struct ia64_rr {\r
101	uint64_t rr_ve :1; /* bit 0 */\r
102	uint64_t __rv1__ :1; /* bit 1 */\r
103	uint64_t rr_ps :6; /* bits 2..7 */\r
104	uint64_t rr_rid :24; /* bits 8..31 */\r
105	uint64_t __rv2__ :32; /* bits 32..63 */\r
106	};\r
107	\r
108	#endif /* !LOCORE */\r
109	\r
110	#endif /* !_MACHINE_PTE_H_ */\r