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f6ab0cee | 1 | /*++\r |
2 | \r | |
9dcae728 | 3 | Copyright (c) 2006 - 2007 Intel Corporation. All rights reserved. \r |
f6ab0cee | 4 | This software and associated documentation (if any) is furnished\r |
5 | under a license and may only be used or copied in accordance\r | |
6 | with the terms of the license. Except as permitted by such\r | |
7 | license, no part of this software or documentation may be\r | |
8 | reproduced, stored in a retrieval system, or transmitted in any\r | |
9 | form or by any means without the express written consent of\r | |
10 | Intel Corporation.\r | |
11 | \r | |
12 | \r | |
13 | Module Name:\r | |
14 | \r | |
15 | Acpi1_0.h\r | |
16 | \r | |
17 | Abstract:\r | |
18 | \r | |
19 | ACPI 1.0b definitions from the ACPI Specification, revision 1.0b\r | |
20 | \r | |
21 | --*/\r | |
22 | \r | |
23 | #ifndef _ACPI_1_0_H_\r | |
24 | #define _ACPI_1_0_H_\r | |
25 | \r | |
9dcae728 | 26 | #include "IndustryStandard/Acpi.h"\r |
27 | \r | |
f6ab0cee | 28 | //\r |
29 | // Ensure proper structure formats\r | |
30 | //\r | |
31 | #pragma pack(1)\r | |
32 | //\r | |
33 | // ACPI 1.0b table structures\r | |
34 | //\r | |
35 | //\r | |
36 | // Root System Description Pointer Structure\r | |
37 | //\r | |
38 | typedef struct {\r | |
39 | UINT64 Signature;\r | |
40 | UINT8 Checksum;\r | |
41 | UINT8 OemId[6];\r | |
42 | UINT8 Reserved;\r | |
43 | UINT32 RsdtAddress;\r | |
44 | } EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r | |
45 | \r | |
46 | //\r | |
47 | // Root System Description Table\r | |
48 | // No definition needed as it is a common description table header followed by a\r | |
49 | // variable number of UINT32 table pointers.\r | |
50 | //\r | |
51 | //\r | |
52 | // RSDT Revision (as defined in ACPI 1.0b spec.)\r | |
53 | //\r | |
54 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r | |
55 | \r | |
56 | //\r | |
57 | // Fixed ACPI Description Table Structure (FADT)\r | |
58 | //\r | |
59 | typedef struct {\r | |
60 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
61 | UINT32 FirmwareCtrl;\r | |
62 | UINT32 Dsdt;\r | |
63 | UINT8 IntModel;\r | |
64 | UINT8 Reserved1;\r | |
65 | UINT16 SciInt;\r | |
66 | UINT32 SmiCmd;\r | |
67 | UINT8 AcpiEnable;\r | |
68 | UINT8 AcpiDisable;\r | |
69 | UINT8 S4BiosReq;\r | |
70 | UINT8 Reserved2;\r | |
71 | UINT32 Pm1aEvtBlk;\r | |
72 | UINT32 Pm1bEvtBlk;\r | |
73 | UINT32 Pm1aCntBlk;\r | |
74 | UINT32 Pm1bCntBlk;\r | |
75 | UINT32 Pm2CntBlk;\r | |
76 | UINT32 PmTmrBlk;\r | |
77 | UINT32 Gpe0Blk;\r | |
78 | UINT32 Gpe1Blk;\r | |
79 | UINT8 Pm1EvtLen;\r | |
80 | UINT8 Pm1CntLen;\r | |
81 | UINT8 Pm2CntLen;\r | |
82 | UINT8 PmTmLen;\r | |
83 | UINT8 Gpe0BlkLen;\r | |
84 | UINT8 Gpe1BlkLen;\r | |
85 | UINT8 Gpe1Base;\r | |
86 | UINT8 Reserved3;\r | |
87 | UINT16 PLvl2Lat;\r | |
88 | UINT16 PLvl3Lat;\r | |
89 | UINT16 FlushSize;\r | |
90 | UINT16 FlushStride;\r | |
91 | UINT8 DutyOffset;\r | |
92 | UINT8 DutyWidth;\r | |
93 | UINT8 DayAlrm;\r | |
94 | UINT8 MonAlrm;\r | |
95 | UINT8 Century;\r | |
96 | UINT8 Reserved4;\r | |
97 | UINT8 Reserved5;\r | |
98 | UINT8 Reserved6;\r | |
99 | UINT32 Flags;\r | |
100 | } EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;\r | |
101 | \r | |
102 | //\r | |
103 | // FADT Version (as defined in ACPI 1.0b spec.)\r | |
104 | //\r | |
105 | #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01\r | |
106 | \r | |
107 | //\r | |
108 | // Fixed ACPI Description Table Fixed Feature Flags\r | |
109 | // All other bits are reserved and must be set to 0.\r | |
110 | //\r | |
111 | #define EFI_ACPI_1_0_WBINVD (1 << 0)\r | |
112 | #define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)\r | |
113 | #define EFI_ACPI_1_0_PROC_C1 (1 << 2)\r | |
114 | #define EFI_ACPI_1_0_P_LVL2_UP (1 << 3)\r | |
115 | #define EFI_ACPI_1_0_PWR_BUTTON (1 << 4)\r | |
116 | #define EFI_ACPI_1_0_SLP_BUTTON (1 << 5)\r | |
117 | #define EFI_ACPI_1_0_FIX_RTC (1 << 6)\r | |
118 | #define EFI_ACPI_1_0_RTC_S4 (1 << 7)\r | |
119 | #define EFI_ACPI_1_0_TMR_VAL_EXT (1 << 8)\r | |
120 | #define EFI_ACPI_1_0_DCK_CAP (1 << 9)\r | |
121 | \r | |
122 | //\r | |
123 | // Firmware ACPI Control Structure\r | |
124 | //\r | |
125 | typedef struct {\r | |
126 | UINT32 Signature;\r | |
127 | UINT32 Length;\r | |
128 | UINT32 HardwareSignature;\r | |
129 | UINT32 FirmwareWakingVector;\r | |
130 | UINT32 GlobalLock;\r | |
131 | UINT32 Flags;\r | |
132 | UINT8 Reserved[40];\r | |
133 | } EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r | |
134 | \r | |
135 | //\r | |
136 | // Firmware Control Structure Feature Flags\r | |
137 | // All other bits are reserved and must be set to 0.\r | |
138 | //\r | |
139 | #define EFI_ACPI_1_0_S4BIOS_F (1 << 0)\r | |
140 | \r | |
141 | //\r | |
142 | // Multiple APIC Description Table header definition. The rest of the table\r | |
143 | // must be defined in a platform specific manner.\r | |
144 | //\r | |
145 | typedef struct {\r | |
146 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
147 | UINT32 LocalApicAddress;\r | |
148 | UINT32 Flags;\r | |
149 | } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r | |
150 | \r | |
151 | //\r | |
152 | // MADT Revision (as defined in ACPI 1.0b spec.)\r | |
153 | //\r | |
154 | #define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r | |
155 | \r | |
156 | //\r | |
157 | // Multiple APIC Flags\r | |
158 | // All other bits are reserved and must be set to 0.\r | |
159 | //\r | |
160 | #define EFI_ACPI_1_0_PCAT_COMPAT (1 << 0)\r | |
161 | \r | |
162 | //\r | |
163 | // Multiple APIC Description Table APIC structure types\r | |
164 | // All other values between 0x09 an 0xFF are reserved and\r | |
165 | // will be ignored by OSPM.\r | |
166 | //\r | |
167 | #define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00\r | |
168 | #define EFI_ACPI_1_0_IO_APIC 0x01\r | |
169 | #define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r | |
170 | #define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r | |
171 | #define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04\r | |
172 | \r | |
173 | //\r | |
174 | // APIC Structure Definitions\r | |
175 | //\r | |
176 | //\r | |
177 | // Processor Local APIC Structure Definition\r | |
178 | //\r | |
179 | typedef struct {\r | |
180 | UINT8 Type;\r | |
181 | UINT8 Length;\r | |
182 | UINT8 AcpiProcessorId;\r | |
183 | UINT8 ApicId;\r | |
184 | UINT32 Flags;\r | |
185 | } EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r | |
186 | \r | |
187 | //\r | |
188 | // Local APIC Flags. All other bits are reserved and must be 0.\r | |
189 | //\r | |
190 | #define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)\r | |
191 | \r | |
192 | //\r | |
193 | // IO APIC Structure\r | |
194 | //\r | |
195 | typedef struct {\r | |
196 | UINT8 Type;\r | |
197 | UINT8 Length;\r | |
198 | UINT8 IoApicId;\r | |
199 | UINT8 Reserved;\r | |
200 | UINT32 IoApicAddress;\r | |
201 | UINT32 SystemVectorBase;\r | |
202 | } EFI_ACPI_1_0_IO_APIC_STRUCTURE;\r | |
203 | \r | |
204 | //\r | |
205 | // Interrupt Source Override Structure\r | |
206 | //\r | |
207 | typedef struct {\r | |
208 | UINT8 Type;\r | |
209 | UINT8 Length;\r | |
210 | UINT8 Bus;\r | |
211 | UINT8 Source;\r | |
212 | UINT32 GlobalSystemInterruptVector;\r | |
213 | UINT16 Flags;\r | |
214 | } EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r | |
215 | \r | |
216 | //\r | |
217 | // Non-Maskable Interrupt Source Structure\r | |
218 | //\r | |
219 | typedef struct {\r | |
220 | UINT8 Type;\r | |
221 | UINT8 Length;\r | |
222 | UINT16 Flags;\r | |
223 | UINT32 GlobalSystemInterruptVector;\r | |
224 | } EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r | |
225 | \r | |
226 | //\r | |
227 | // Local APIC NMI Structure\r | |
228 | //\r | |
229 | typedef struct {\r | |
230 | UINT8 Type;\r | |
231 | UINT8 Length;\r | |
232 | UINT8 AcpiProcessorId;\r | |
233 | UINT16 Flags;\r | |
234 | UINT8 LocalApicInti;\r | |
235 | } EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;\r | |
236 | \r | |
237 | //\r | |
238 | // Smart Battery Description Table (SBST)\r | |
239 | //\r | |
240 | typedef struct {\r | |
241 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
242 | UINT32 WarningEnergyLevel;\r | |
243 | UINT32 LowEnergyLevel;\r | |
244 | UINT32 CriticalEnergyLevel;\r | |
245 | } EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;\r | |
246 | \r | |
247 | //\r | |
248 | // Known table signatures\r | |
249 | //\r | |
250 | //\r | |
251 | // "RSD PTR " Root System Description Pointer\r | |
252 | //\r | |
253 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL\r | |
254 | \r | |
255 | //\r | |
256 | // "APIC" Multiple APIC Description Table\r | |
257 | //\r | |
258 | #define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041\r | |
259 | \r | |
260 | //\r | |
261 | // "DSDT" Differentiated System Description Table\r | |
262 | //\r | |
263 | #define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344\r | |
264 | \r | |
265 | //\r | |
266 | // "FACS" Firmware ACPI Control Structure\r | |
267 | //\r | |
268 | #define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146\r | |
269 | \r | |
270 | //\r | |
271 | // "FACP" Fixed ACPI Description Table\r | |
272 | //\r | |
273 | #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r | |
274 | \r | |
275 | //\r | |
276 | // "PSDT" Persistent System Description Table\r | |
277 | //\r | |
278 | #define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350\r | |
279 | \r | |
280 | //\r | |
281 | // "RSDT" Root System Description Table\r | |
282 | //\r | |
283 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352\r | |
284 | \r | |
285 | //\r | |
286 | // "SBST" Smart Battery Specification Table\r | |
287 | //\r | |
288 | #define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253\r | |
289 | \r | |
290 | //\r | |
291 | // "SSDT" Secondary System Description Table\r | |
292 | //\r | |
293 | #define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r | |
294 | \r | |
295 | #pragma pack()\r | |
296 | \r | |
297 | #endif\r |