[mirror_edk2.git] / Tools / Source / TianoTools / Include / Protocol / PciRootBridgeIo.h

/** @file\r
  PCI Root Bridge I/O protocol as defined in the EFI 1.1 specification.\r
\r
  PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, \r
  and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
  defferent types of bus mastering DMA\r
\r
  Copyright (c) 2006, Intel Corporation                                                         \r
  All rights reserved. This program and the accompanying materials                          \r
  are licensed and made available under the terms and conditions of the BSD License         \r
  which accompanies this distribution.  The full text of the license may be found at        \r
  http://opensource.org/licenses/bsd-license.php                                            \r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
  Module Name:  PciRootBridgeIo.h\r
\r
**/\r
\r
#ifndef __PCI_ROOT_BRIDGE_IO_H__\r
#define __PCI_ROOT_BRIDGE_IO_H__\r
\r
#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
  { \\r
    0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
  }\r
\r
typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r
\r
typedef enum {\r
  EfiPciWidthUint8,\r
  EfiPciWidthUint16,\r
  EfiPciWidthUint32,\r
  EfiPciWidthUint64,\r
  EfiPciWidthFifoUint8,\r
  EfiPciWidthFifoUint16,\r
  EfiPciWidthFifoUint32,\r
  EfiPciWidthFifoUint64,\r
  EfiPciWidthFillUint8,\r
  EfiPciWidthFillUint16,\r
  EfiPciWidthFillUint32,\r
  EfiPciWidthFillUint64,\r
  EfiPciWidthMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
\r
typedef enum {\r
  EfiPciOperationBusMasterRead,\r
  EfiPciOperationBusMasterWrite,\r
  EfiPciOperationBusMasterCommonBuffer,\r
  EfiPciOperationBusMasterRead64,\r
  EfiPciOperationBusMasterWrite64,\r
  EfiPciOperationBusMasterCommonBuffer64,\r
  EfiPciOperationMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
\r
#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO          0x0001\r
#define EFI_PCI_ATTRIBUTE_ISA_IO                      0x0002\r
#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO              0x0004\r
#define EFI_PCI_ATTRIBUTE_VGA_MEMORY                  0x0008\r
#define EFI_PCI_ATTRIBUTE_VGA_IO                      0x0010\r
#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO              0x0020\r
#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO            0x0040\r
#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE        0x0080\r
#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED               0x0800\r
#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE              0x1000\r
#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE          0x8000\r
\r
#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER   (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
\r
#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
\r
#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
    ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
\r
typedef struct {\r
  UINT8   Register;\r
  UINT8   Function;\r
  UINT8   Device;\r
  UINT8   Bus;\r
  UINT32  ExtendedRegister;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
\r
/**                                                                 \r
  Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
  satisfied or after a defined duration.\r
          \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Width                 Signifies the width of the memory or I/O operations.\r
  @param  Address               The base address of the memory or I/O operations.  \r
  @param  Mask                  Mask used for the polling criteria.\r
  @param  Value                 The comparison value used for the polling exit criteria.\r
  @param  Delay                 The number of 100 ns units to poll.\r
  @param  Result                Pointer to the last value read from the memory location.\r
                                \r
  @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.\r
  @retval EFI_TIMEOUT           Delay expired before a match occurred.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN  UINT64                                   Address,\r
  IN  UINT64                                   Mask,\r
  IN  UINT64                                   Value,\r
  IN  UINT64                                   Delay,\r
  OUT UINT64                                   *Result\r
  );\r
\r
/**                                                                 \r
  Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
          \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Width                 Signifies the width of the memory operations.\r
  @param  Address               The base address of the memory operations.                                  \r
  @param  Count                 The number of memory operations to perform.\r
  @param  Buffer                For read operations, the destination buffer to store the results. For write\r
                                operations, the source buffer to write data from.                          \r
  \r
  @retval EFI_SUCCESS           The data was read from or written to the PCI root bridge.  \r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   Address,\r
  IN     UINTN                                    Count,\r
  IN OUT VOID                                     *Buffer\r
  );\r
\r
typedef struct {\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Read;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Write;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
\r
/**                                                                 \r
  Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
  root bridge memory space.                                                                       \r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
  @param  Width                 Signifies the width of the memory operations.\r
  @param  DestAddress           The destination address of the memory operation.                                \r
  @param  SrcAddress            The source address of the memory operation.                                \r
  @param  Count                 The number of memory operations to perform.    \r
                                \r
  @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.  \r
  @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   DestAddress,\r
  IN     UINT64                                   SrcAddress,\r
  IN     UINTN                                    Count\r
  );\r
\r
/**                                                                 \r
Commit	Line	Data
21b50a27	1	/** @file\r
	2	PCI Root Bridge I/O protocol as defined in the EFI 1.1 specification.\r
	3	\r
	4	PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, \r
	5	and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
	6	defferent types of bus mastering DMA\r
	7	\r
	8	Copyright (c) 2006, Intel Corporation \r
	9	All rights reserved. This program and the accompanying materials \r
	10	are licensed and made available under the terms and conditions of the BSD License \r
	11	which accompanies this distribution. The full text of the license may be found at \r
	12	http://opensource.org/licenses/bsd-license.php \r
	13	\r
	14	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	15	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	16	\r
	17	Module Name: PciRootBridgeIo.h\r
	18	\r
	19	**/\r
	20	\r
	21	#ifndef __PCI_ROOT_BRIDGE_IO_H__\r
	22	#define __PCI_ROOT_BRIDGE_IO_H__\r
	23	\r
	24	#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
	25	{ \\r
	26	0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
	27	}\r
	28	\r
	29	typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r
	30	\r
	31	typedef enum {\r
	32	EfiPciWidthUint8,\r
	33	EfiPciWidthUint16,\r
	34	EfiPciWidthUint32,\r
	35	EfiPciWidthUint64,\r
	36	EfiPciWidthFifoUint8,\r
	37	EfiPciWidthFifoUint16,\r
	38	EfiPciWidthFifoUint32,\r
	39	EfiPciWidthFifoUint64,\r
	40	EfiPciWidthFillUint8,\r
	41	EfiPciWidthFillUint16,\r
	42	EfiPciWidthFillUint32,\r
	43	EfiPciWidthFillUint64,\r
	44	EfiPciWidthMaximum\r
	45	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
	46	\r
	47	typedef enum {\r
	48	EfiPciOperationBusMasterRead,\r
	49	EfiPciOperationBusMasterWrite,\r
	50	EfiPciOperationBusMasterCommonBuffer,\r
	51	EfiPciOperationBusMasterRead64,\r
	52	EfiPciOperationBusMasterWrite64,\r
	53	EfiPciOperationBusMasterCommonBuffer64,\r
	54	EfiPciOperationMaximum\r
	55	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
	56	\r
	57	#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001\r
	58	#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002\r
	59	#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004\r
	60	#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008\r
	61	#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010\r
	62	#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020\r
	63	#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040\r
	64	#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080\r
65	#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800\r
66	#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000\r
67	#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000\r
68	\r
69	#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EFI_PCI_ATTRIBUTE_MEMORY_CACHED \| EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
70	\r
71	#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
72	\r
73	#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
74	((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
75	\r
76	typedef struct {\r
77	UINT8 Register;\r
78	UINT8 Function;\r
79	UINT8 Device;\r
80	UINT8 Bus;\r
81	UINT32 ExtendedRegister;\r
82	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
83	\r
84	/** \r
85	Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
86	satisfied or after a defined duration.\r
87	\r
88	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
89	@param Width Signifies the width of the memory or I/O operations.\r
90	@param Address The base address of the memory or I/O operations. \r
91	@param Mask Mask used for the polling criteria.\r
92	@param Value The comparison value used for the polling exit criteria.\r
93	@param Delay The number of 100 ns units to poll.\r
94	@param Result Pointer to the last value read from the memory location.\r
95	\r
96	@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
97	@retval EFI_TIMEOUT Delay expired before a match occurred.\r
98	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
99	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
100	\r
101	**/\r
102	typedef\r
103	EFI_STATUS\r
104	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM) (\r
105	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
106	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
107	IN UINT64 Address,\r
108	IN UINT64 Mask,\r
109	IN UINT64 Value,\r
110	IN UINT64 Delay,\r
111	OUT UINT64 *Result\r
112	);\r
113	\r
114	/** \r
115	Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
116	\r
117	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
118	@param Width Signifies the width of the memory operations.\r
119	@param Address The base address of the memory operations. \r
120	@param Count The number of memory operations to perform.\r
121	@param Buffer For read operations, the destination buffer to store the results. For write\r
122	operations, the source buffer to write data from. \r
123	\r
124	@retval EFI_SUCCESS The data was read from or written to the PCI root bridge. \r
125	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
126	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
127	\r
128	**/\r
129	typedef\r
130	EFI_STATUS\r
131	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM) (\r
132	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
133	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
134	IN UINT64 Address,\r
135	IN UINTN Count,\r
136	IN OUT VOID *Buffer\r
137	);\r
138	\r
139	typedef struct {\r
140	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;\r
141	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;\r
142	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
143	\r
144	/** \r
145	Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
146	root bridge memory space. \r
147	\r
148	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
149	@param Width Signifies the width of the memory operations.\r
150	@param DestAddress The destination address of the memory operation. \r
151	@param SrcAddress The source address of the memory operation. \r
152	@param Count The number of memory operations to perform. \r
153	\r
154	@retval EFI_SUCCESS The data was copied from one memory region to another memory region. \r
155	@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
156	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
157	\r
158	**/\r
159	typedef\r
160	EFI_STATUS\r
161	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM) (\r
162	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
163	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
164	IN UINT64 DestAddress,\r
165	IN UINT64 SrcAddress,\r
166	IN UINTN Count\r
167	);\r
168	\r
169	/** \r
170