[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuDxe.h

/** @file\r
  CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.\r
\r
  Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef _CPU_DXE_H_\r
#define _CPU_DXE_H_\r
\r
#include <PiDxe.h>\r
\r
#include <Protocol/Cpu.h>\r
#include <Protocol/MpService.h>\r
#include <Register/Msr.h>\r
\r
#include <Ppi/SecPlatformInformation.h>\r
#include <Ppi/SecPlatformInformation2.h>\r
\r
#include <Library/UefiDriverEntryPoint.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/DxeServicesTableLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/CpuLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/MtrrLib.h>\r
#include <Library/LocalApicLib.h>\r
#include <Library/UefiCpuLib.h>\r
#include <Library/UefiLib.h>\r
#include <Library/CpuExceptionHandlerLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/ReportStatusCodeLib.h>\r
#include <Library/MpInitLib.h>\r
#include <Library/TimerLib.h>\r
\r
#include <Guid/IdleLoopEvent.h>\r
#include <Guid/VectorHandoffTable.h>\r
\r
#define EFI_MEMORY_CACHETYPE_MASK     (EFI_MEMORY_UC  | \\r
                                       EFI_MEMORY_WC  | \\r
                                       EFI_MEMORY_WT  | \\r
                                       EFI_MEMORY_WB  | \\r
                                       EFI_MEMORY_UCE   \\r
                                       )\r
\r
#define EFI_MEMORY_PAGETYPE_MASK      (EFI_MEMORY_RP  | \\r
                                       EFI_MEMORY_XP  | \\r
                                       EFI_MEMORY_RO    \\r
                                       )\r
\r
#define HEAP_GUARD_NONSTOP_MODE       \\r
        ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT4|BIT1|BIT0)) > BIT6)\r
\r
#define NULL_DETECTION_NONSTOP_MODE   \\r
        ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT0)) > BIT6)\r
\r
/**\r
  Flush CPU data cache. If the instruction cache is fully coherent\r
  with all DMA operations then function can just return EFI_SUCCESS.\r
\r
  @param  This              Protocol instance structure\r
  @param  Start             Physical address to start flushing from.\r
  @param  Length            Number of bytes to flush. Round up to chipset\r
                            granularity.\r
  @param  FlushType         Specifies the type of flush operation to perform.\r
\r
  @retval EFI_SUCCESS       If cache was flushed\r
  @retval EFI_UNSUPPORTED   If flush type is not supported.\r
  @retval EFI_DEVICE_ERROR  If requested range could not be flushed.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuFlushCpuDataCache (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This,\r
  IN EFI_PHYSICAL_ADDRESS      Start,\r
  IN UINT64                    Length,\r
  IN EFI_CPU_FLUSH_TYPE        FlushType\r
  );\r
\r
/**\r
  Enables CPU interrupts.\r
\r
  @param  This              Protocol instance structure\r
\r
  @retval EFI_SUCCESS       If interrupts were enabled in the CPU\r
  @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuEnableInterrupt (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This\r
  );\r
\r
/**\r
  Disables CPU interrupts.\r
\r
  @param  This              Protocol instance structure\r
\r
  @retval EFI_SUCCESS       If interrupts were disabled in the CPU.\r
  @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuDisableInterrupt (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This\r
  );\r
\r
/**\r
  Return the state of interrupts.\r
\r
  @param  This                   Protocol instance structure\r
  @param  State                  Pointer to the CPU's current interrupt state\r
\r
  @retval EFI_SUCCESS            If interrupts were disabled in the CPU.\r
  @retval EFI_INVALID_PARAMETER  State is NULL.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuGetInterruptState (\r
  IN  EFI_CPU_ARCH_PROTOCOL     *This,\r
  OUT BOOLEAN                   *State\r
  );\r
\r
/**\r
  Generates an INIT to the CPU.\r
\r
  @param  This              Protocol instance structure\r
  @param  InitType          Type of CPU INIT to perform\r
\r
  @retval EFI_SUCCESS       If CPU INIT occurred. This value should never be\r
                            seen.\r
  @retval EFI_DEVICE_ERROR  If CPU INIT failed.\r
  @retval EFI_UNSUPPORTED   Requested type of CPU INIT not supported.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuInit (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This,\r
  IN EFI_CPU_INIT_TYPE         InitType\r
  );\r
\r
/**\r
  Registers a function to be called from the CPU interrupt handler.\r
\r
  @param  This                   Protocol instance structure\r
  @param  InterruptType          Defines which interrupt to hook. IA-32\r
                                 valid range is 0x00 through 0xFF\r
  @param  InterruptHandler       A pointer to a function of type\r
                                 EFI_CPU_INTERRUPT_HANDLER that is called\r
                                 when a processor interrupt occurs.  A null\r
                                 pointer is an error condition.\r
\r
  @retval EFI_SUCCESS            If handler installed or uninstalled.\r
  @retval EFI_ALREADY_STARTED    InterruptHandler is not NULL, and a handler\r
                                 for InterruptType was previously installed.\r
  @retval EFI_INVALID_PARAMETER  InterruptHandler is NULL, and a handler for\r
                                 InterruptType was not previously installed.\r
  @retval EFI_UNSUPPORTED        The interrupt specified by InterruptType\r
                                 is not supported.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuRegisterInterruptHandler (\r
  IN EFI_CPU_ARCH_PROTOCOL         *This,\r
  IN EFI_EXCEPTION_TYPE            InterruptType,\r
  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler\r
  );\r
\r
/**\r
  Returns a timer value from one of the CPU's internal timers. There is no\r
  inherent time interval between ticks but is a function of the CPU frequency.\r
\r
  @param  This                - Protocol instance structure.\r
  @param  TimerIndex          - Specifies which CPU timer is requested.\r
  @param  TimerValue          - Pointer to the returned timer value.\r
  @param  TimerPeriod         - A pointer to the amount of time that passes\r
                                in femtoseconds (10-15) for each increment\r
                                of TimerValue. If TimerValue does not\r
                                increment at a predictable rate, then 0 is\r
                                returned.  The amount of time that has\r
                                passed between two calls to GetTimerValue()\r
                                can be calculated with the formula\r
                                (TimerValue2 - TimerValue1) * TimerPeriod.\r
                                This parameter is optional and may be NULL.\r
\r
  @retval EFI_SUCCESS           - If the CPU timer count was returned.\r
  @retval EFI_UNSUPPORTED       - If the CPU does not have any readable timers.\r
  @retval EFI_DEVICE_ERROR      - If an error occurred while reading the timer.\r
  @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuGetTimerValue (\r
  IN  EFI_CPU_ARCH_PROTOCOL       *This,\r
  IN  UINT32                      TimerIndex,\r
  OUT UINT64                      *TimerValue,\r
  OUT UINT64                      *TimerPeriod OPTIONAL\r
  );\r
\r
/**\r
  Set memory cacheability attributes for given range of memeory.\r
\r
  @param  This                   Protocol instance structure\r
  @param  BaseAddress            Specifies the start address of the\r
                                 memory range\r
  @param  Length                 Specifies the length of the memory range\r
  @param  Attributes             The memory cacheability for the memory range\r
\r
  @retval EFI_SUCCESS            If the cacheability of that memory range is\r
                                 set successfully\r
  @retval EFI_UNSUPPORTED        If the desired operation cannot be done\r
  @retval EFI_INVALID_PARAMETER  The input parameter is not correct,\r
                                 such as Length = 0\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuSetMemoryAttributes (\r
  IN EFI_CPU_ARCH_PROTOCOL      *This,\r
  IN EFI_PHYSICAL_ADDRESS       BaseAddress,\r
  IN UINT64                     Length,\r
  IN UINT64                     Attributes\r
  );\r
\r
/**\r
  Initialize Global Descriptor Table.\r
\r
**/\r
VOID\r
InitGlobalDescriptorTable (\r
  VOID\r
  );\r
\r
/**\r
  Sets the code selector (CS).\r
\r
  @param  Selector  Value of code selector.\r
\r
**/\r
VOID\r
EFIAPI\r
SetCodeSelector (\r
  UINT16 Selector\r
  );\r
\r
/**\r
  Sets the data selector (DS).\r
\r
  @param  Selector  Value of data selector.\r
\r
**/\r
VOID\r
EFIAPI\r
SetDataSelectors (\r
  UINT16 Selector\r
  );\r
\r
/**\r
  Update GCD memory space attributes according to current page table setup.\r
**/\r
VOID\r
RefreshGcdMemoryAttributesFromPaging (\r
  VOID\r
  );\r
\r
/**\r
  Special handler for #DB exception, which will restore the page attributes\r
  (not-present). It should work with #PF handler which will set pages to\r
  'present'.\r
\r
  @param ExceptionType  Exception type.\r
  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.\r
\r
**/\r
VOID\r
EFIAPI\r
DebugExceptionHandler (\r
  IN EFI_EXCEPTION_TYPE   ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT   SystemContext\r
  );\r
\r
/**\r
  Special handler for #PF exception, which will set the pages which caused\r
  #PF to be 'present'. The attribute of those pages should be restored in\r
  the subsequent #DB handler.\r
\r
  @param ExceptionType  Exception type.\r
  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.\r
\r
**/\r
VOID\r
EFIAPI\r
PageFaultExceptionHandler (\r
  IN EFI_EXCEPTION_TYPE   ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT   SystemContext\r
  );\r
\r
extern BOOLEAN mIsAllocatingPageTable;\r
extern UINTN   mNumberOfProcessors;\r
\r
#endif\r
\r
Commit	Line	Data
a47463f2	1	/** @file\r
7fadaacd	2	CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.\r
a47463f2	3	\r
7537f8c0	4	Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
0acd8697	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
a47463f2	6	\r
	7	**/\r
	8	\r
430fbbe0	9	#ifndef _CPU_DXE_H_\r
430fbbe0	10	#define _CPU_DXE_H_\r
a47463f2	11	\r
	12	#include <PiDxe.h>\r
	13	\r
	14	#include <Protocol/Cpu.h>\r
7fadaacd	15	#include <Protocol/MpService.h>\r
b1bd0d74	16	#include <Register/Msr.h>\r
7fadaacd JF	17	\r
	18	#include <Ppi/SecPlatformInformation.h>\r
	19	#include <Ppi/SecPlatformInformation2.h>\r
a47463f2	20	\r
	21	#include <Library/UefiDriverEntryPoint.h>\r
	22	#include <Library/UefiBootServicesTableLib.h>\r
	23	#include <Library/DxeServicesTableLib.h>\r
	24	#include <Library/BaseLib.h>\r
	25	#include <Library/CpuLib.h>\r
	26	#include <Library/BaseMemoryLib.h>\r
	27	#include <Library/MemoryAllocationLib.h>\r
	28	#include <Library/DebugLib.h>\r
	29	#include <Library/MtrrLib.h>\r
d4605c23	30	#include <Library/LocalApicLib.h>\r
661cab5d	31	#include <Library/UefiCpuLib.h>\r
e41aad15 JF	32	#include <Library/UefiLib.h>\r
e41aad15 JF	33	#include <Library/CpuExceptionHandlerLib.h>\r
7fadaacd JF	34	#include <Library/HobLib.h>\r
	35	#include <Library/ReportStatusCodeLib.h>\r
	36	#include <Library/MpInitLib.h>\r
7537f8c0	37	#include <Library/TimerLib.h>\r
7fadaacd	38	\r
32394027	39	#include <Guid/IdleLoopEvent.h>\r
e41aad15	40	#include <Guid/VectorHandoffTable.h>\r
a47463f2	41	\r
	42	#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC \| \\r
	43	EFI_MEMORY_WC \| \\r
	44	EFI_MEMORY_WT \| \\r
	45	EFI_MEMORY_WB \| \\r
	46	EFI_MEMORY_UCE \\r
	47	)\r
	48	\r
c1cab54c JW	49	#define EFI_MEMORY_PAGETYPE_MASK (EFI_MEMORY_RP \| \\r
	50	EFI_MEMORY_XP \| \\r
	51	EFI_MEMORY_RO \\r
	52	)\r
a47463f2	53	\r
dcc02621	54	#define HEAP_GUARD_NONSTOP_MODE \\r
02ba936d	55	((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6\|BIT4\|BIT1\|BIT0)) > BIT6)\r
dcc02621 JW	56	\r
	57	#define NULL_DETECTION_NONSTOP_MODE \\r
	58	((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6\|BIT0)) > BIT6)\r
	59	\r
430fbbe0	60	/**\r
	61	Flush CPU data cache. If the instruction cache is fully coherent\r
	62	with all DMA operations then function can just return EFI_SUCCESS.\r
	63	\r
	64	@param This Protocol instance structure\r
	65	@param Start Physical address to start flushing from.\r
	66	@param Length Number of bytes to flush. Round up to chipset\r
	67	granularity.\r
	68	@param FlushType Specifies the type of flush operation to perform.\r
	69	\r
	70	@retval EFI_SUCCESS If cache was flushed\r
	71	@retval EFI_UNSUPPORTED If flush type is not supported.\r
	72	@retval EFI_DEVICE_ERROR If requested range could not be flushed.\r
	73	\r
	74	**/\r
a47463f2	75	EFI_STATUS\r
	76	EFIAPI\r
	77	CpuFlushCpuDataCache (\r
	78	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	79	IN EFI_PHYSICAL_ADDRESS Start,\r
	80	IN UINT64 Length,\r
	81	IN EFI_CPU_FLUSH_TYPE FlushType\r
	82	);\r
	83	\r
430fbbe0	84	/**\r
	85	Enables CPU interrupts.\r
	86	\r
	87	@param This Protocol instance structure\r
	88	\r
	89	@retval EFI_SUCCESS If interrupts were enabled in the CPU\r
	90	@retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.\r
	91	\r
	92	**/\r
a47463f2	93	EFI_STATUS\r
	94	EFIAPI\r
	95	CpuEnableInterrupt (\r
	96	IN EFI_CPU_ARCH_PROTOCOL *This\r
	97	);\r
	98	\r
430fbbe0	99	/**\r
	100	Disables CPU interrupts.\r
	101	\r
	102	@param This Protocol instance structure\r
	103	\r
	104	@retval EFI_SUCCESS If interrupts were disabled in the CPU.\r
	105	@retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.\r
	106	\r
	107	**/\r
a47463f2	108	EFI_STATUS\r
	109	EFIAPI\r
	110	CpuDisableInterrupt (\r
	111	IN EFI_CPU_ARCH_PROTOCOL *This\r
	112	);\r
	113	\r
430fbbe0	114	/**\r
	115	Return the state of interrupts.\r
	116	\r
	117	@param This Protocol instance structure\r
	118	@param State Pointer to the CPU's current interrupt state\r
	119	\r
	120	@retval EFI_SUCCESS If interrupts were disabled in the CPU.\r
	121	@retval EFI_INVALID_PARAMETER State is NULL.\r
	122	\r
	123	**/\r
a47463f2	124	EFI_STATUS\r
	125	EFIAPI\r
	126	CpuGetInterruptState (\r
	127	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	128	OUT BOOLEAN *State\r
	129	);\r
	130	\r
430fbbe0	131	/**\r
	132	Generates an INIT to the CPU.\r
	133	\r
	134	@param This Protocol instance structure\r
	135	@param InitType Type of CPU INIT to perform\r
	136	\r
	137	@retval EFI_SUCCESS If CPU INIT occurred. This value should never be\r
	138	seen.\r
	139	@retval EFI_DEVICE_ERROR If CPU INIT failed.\r
	140	@retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.\r
	141	\r
	142	**/\r
a47463f2	143	EFI_STATUS\r
	144	EFIAPI\r
	145	CpuInit (\r
	146	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	147	IN EFI_CPU_INIT_TYPE InitType\r
	148	);\r
	149	\r
430fbbe0	150	/**\r
	151	Registers a function to be called from the CPU interrupt handler.\r
	152	\r
	153	@param This Protocol instance structure\r
	154	@param InterruptType Defines which interrupt to hook. IA-32\r
	155	valid range is 0x00 through 0xFF\r
	156	@param InterruptHandler A pointer to a function of type\r
	157	EFI_CPU_INTERRUPT_HANDLER that is called\r
	158	when a processor interrupt occurs. A null\r
	159	pointer is an error condition.\r
	160	\r
	161	@retval EFI_SUCCESS If handler installed or uninstalled.\r
	162	@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler\r
	163	for InterruptType was previously installed.\r
	164	@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for\r
	165	InterruptType was not previously installed.\r
	166	@retval EFI_UNSUPPORTED The interrupt specified by InterruptType\r
	167	is not supported.\r
	168	\r
	169	**/\r
a47463f2	170	EFI_STATUS\r
	171	EFIAPI\r
	172	CpuRegisterInterruptHandler (\r
	173	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	174	IN EFI_EXCEPTION_TYPE InterruptType,\r
	175	IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
	176	);\r
	177	\r
430fbbe0	178	/**\r
	179	Returns a timer value from one of the CPU's internal timers. There is no\r
	180	inherent time interval between ticks but is a function of the CPU frequency.\r
	181	\r
	182	@param This - Protocol instance structure.\r
	183	@param TimerIndex - Specifies which CPU timer is requested.\r
	184	@param TimerValue - Pointer to the returned timer value.\r
	185	@param TimerPeriod - A pointer to the amount of time that passes\r
	186	in femtoseconds (10-15) for each increment\r
	187	of TimerValue. If TimerValue does not\r
	188	increment at a predictable rate, then 0 is\r
	189	returned. The amount of time that has\r
	190	passed between two calls to GetTimerValue()\r
	191	can be calculated with the formula\r
	192	(TimerValue2 - TimerValue1) * TimerPeriod.\r
	193	This parameter is optional and may be NULL.\r
	194	\r
	195	@retval EFI_SUCCESS - If the CPU timer count was returned.\r
	196	@retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.\r
	197	@retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.\r
	198	@retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.\r
	199	\r
	200	**/\r
a47463f2	201	EFI_STATUS\r
	202	EFIAPI\r
	203	CpuGetTimerValue (\r
	204	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	205	IN UINT32 TimerIndex,\r
	206	OUT UINT64 *TimerValue,\r
	207	OUT UINT64 *TimerPeriod OPTIONAL\r
	208	);\r
	209	\r
430fbbe0	210	/**\r
	211	Set memory cacheability attributes for given range of memeory.\r
	212	\r
	213	@param This Protocol instance structure\r
	214	@param BaseAddress Specifies the start address of the\r
	215	memory range\r
	216	@param Length Specifies the length of the memory range\r
	217	@param Attributes The memory cacheability for the memory range\r
	218	\r
	219	@retval EFI_SUCCESS If the cacheability of that memory range is\r
	220	set successfully\r
	221	@retval EFI_UNSUPPORTED If the desired operation cannot be done\r
	222	@retval EFI_INVALID_PARAMETER The input parameter is not correct,\r
	223	such as Length = 0\r
	224	\r
	225	**/\r
a47463f2	226	EFI_STATUS\r
	227	EFIAPI\r
	228	CpuSetMemoryAttributes (\r
	229	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	230	IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
	231	IN UINT64 Length,\r
	232	IN UINT64 Attributes\r
	233	);\r
	234	\r
430fbbe0	235	/**\r
	236	Initialize Global Descriptor Table.\r
	237	\r
	238	**/\r
a47463f2	239	VOID\r
	240	InitGlobalDescriptorTable (\r
	241	VOID\r
	242	);\r
	243	\r
430fbbe0	244	/**\r
	245	Sets the code selector (CS).\r
	246	\r
	247	@param Selector Value of code selector.\r
	248	\r
	249	**/\r
a47463f2	250	VOID\r
	251	EFIAPI\r
	252	SetCodeSelector (\r
	253	UINT16 Selector\r
	254	);\r
	255	\r
430fbbe0	256	/**\r
	257	Sets the data selector (DS).\r
	258	\r
	259	@param Selector Value of data selector.\r
	260	\r
	261	**/\r
a47463f2	262	VOID\r
	263	EFIAPI\r
	264	SetDataSelectors (\r
	265	UINT16 Selector\r
	266	);\r
	267	\r
cbd7300c DB	268	/**\r
	269	Update GCD memory space attributes according to current page table setup.\r
	270	**/\r
c1cab54c JW	271	VOID\r
	272	RefreshGcdMemoryAttributesFromPaging (\r
	273	VOID\r
	274	);\r
	275	\r
dcc02621 JW	276	/**\r
	277	Special handler for #DB exception, which will restore the page attributes\r
	278	(not-present). It should work with #PF handler which will set pages to\r
	279	'present'.\r
	280	\r
	281	@param ExceptionType Exception type.\r
	282	@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
	283	\r
	284	**/\r
	285	VOID\r
	286	EFIAPI\r
	287	DebugExceptionHandler (\r
51d0100b	288	IN EFI_EXCEPTION_TYPE ExceptionType,\r
dcc02621 JW	289	IN EFI_SYSTEM_CONTEXT SystemContext\r
	290	);\r
	291	\r
	292	/**\r
	293	Special handler for #PF exception, which will set the pages which caused\r
	294	#PF to be 'present'. The attribute of those pages should be restored in\r
	295	the subsequent #DB handler.\r
	296	\r
	297	@param ExceptionType Exception type.\r
	298	@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
	299	\r
	300	**/\r
	301	VOID\r
	302	EFIAPI\r
	303	PageFaultExceptionHandler (\r
51d0100b	304	IN EFI_EXCEPTION_TYPE ExceptionType,\r
dcc02621 JW	305	IN EFI_SYSTEM_CONTEXT SystemContext\r
	306	);\r
	307	\r
147fd35c	308	extern BOOLEAN mIsAllocatingPageTable;\r
dcc02621	309	extern UINTN mNumberOfProcessors;\r
147fd35c	310	\r
a47463f2	311	#endif\r
a47463f2	312	\r