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[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuDxe.h

/** @file\r
  CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.\r
\r
  Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef _CPU_DXE_H_\r
#define _CPU_DXE_H_\r
\r
#include <PiDxe.h>\r
\r
#include <Protocol/Cpu.h>\r
#include <Protocol/MpService.h>\r
#include <Register/Msr.h>\r
\r
#include <Ppi/SecPlatformInformation.h>\r
#include <Ppi/SecPlatformInformation2.h>\r
\r
#include <Library/UefiDriverEntryPoint.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/DxeServicesTableLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/CpuLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/MtrrLib.h>\r
#include <Library/LocalApicLib.h>\r
#include <Library/UefiCpuLib.h>\r
#include <Library/UefiLib.h>\r
#include <Library/CpuExceptionHandlerLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/ReportStatusCodeLib.h>\r
#include <Library/MpInitLib.h>\r
#include <Library/TimerLib.h>\r
\r
#include <Guid/IdleLoopEvent.h>\r
#include <Guid/VectorHandoffTable.h>\r
\r
#define EFI_MEMORY_CACHETYPE_MASK     (EFI_MEMORY_UC  | \\r
                                       EFI_MEMORY_WC  | \\r
                                       EFI_MEMORY_WT  | \\r
                                       EFI_MEMORY_WB  | \\r
                                       EFI_MEMORY_UCE   \\r
                                       )\r
\r
#define EFI_MEMORY_PAGETYPE_MASK      (EFI_MEMORY_RP  | \\r
                                       EFI_MEMORY_XP  | \\r
                                       EFI_MEMORY_RO    \\r
                                       )\r
\r
/**\r
  Flush CPU data cache. If the instruction cache is fully coherent\r
  with all DMA operations then function can just return EFI_SUCCESS.\r
\r
  @param  This              Protocol instance structure\r
  @param  Start             Physical address to start flushing from.\r
  @param  Length            Number of bytes to flush. Round up to chipset\r
                            granularity.\r
  @param  FlushType         Specifies the type of flush operation to perform.\r
\r
  @retval EFI_SUCCESS       If cache was flushed\r
  @retval EFI_UNSUPPORTED   If flush type is not supported.\r
  @retval EFI_DEVICE_ERROR  If requested range could not be flushed.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuFlushCpuDataCache (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This,\r
  IN EFI_PHYSICAL_ADDRESS      Start,\r
  IN UINT64                    Length,\r
  IN EFI_CPU_FLUSH_TYPE        FlushType\r
  );\r
\r
/**\r
  Enables CPU interrupts.\r
\r
  @param  This              Protocol instance structure\r
\r
  @retval EFI_SUCCESS       If interrupts were enabled in the CPU\r
  @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuEnableInterrupt (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This\r
  );\r
\r
/**\r
  Disables CPU interrupts.\r
\r
  @param  This              Protocol instance structure\r
\r
  @retval EFI_SUCCESS       If interrupts were disabled in the CPU.\r
  @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuDisableInterrupt (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This\r
  );\r
\r
/**\r
  Return the state of interrupts.\r
\r
  @param  This                   Protocol instance structure\r
  @param  State                  Pointer to the CPU's current interrupt state\r
\r
  @retval EFI_SUCCESS            If interrupts were disabled in the CPU.\r
  @retval EFI_INVALID_PARAMETER  State is NULL.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuGetInterruptState (\r
  IN  EFI_CPU_ARCH_PROTOCOL     *This,\r
  OUT BOOLEAN                   *State\r
  );\r
\r
/**\r
  Generates an INIT to the CPU.\r
\r
  @param  This              Protocol instance structure\r
  @param  InitType          Type of CPU INIT to perform\r
\r
  @retval EFI_SUCCESS       If CPU INIT occurred. This value should never be\r
                            seen.\r
  @retval EFI_DEVICE_ERROR  If CPU INIT failed.\r
  @retval EFI_UNSUPPORTED   Requested type of CPU INIT not supported.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuInit (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This,\r
  IN EFI_CPU_INIT_TYPE         InitType\r
  );\r
\r
/**\r
  Registers a function to be called from the CPU interrupt handler.\r
\r
  @param  This                   Protocol instance structure\r
  @param  InterruptType          Defines which interrupt to hook. IA-32\r
                                 valid range is 0x00 through 0xFF\r
  @param  InterruptHandler       A pointer to a function of type\r
                                 EFI_CPU_INTERRUPT_HANDLER that is called\r
                                 when a processor interrupt occurs.  A null\r
                                 pointer is an error condition.\r
\r
  @retval EFI_SUCCESS            If handler installed or uninstalled.\r
  @retval EFI_ALREADY_STARTED    InterruptHandler is not NULL, and a handler\r
                                 for InterruptType was previously installed.\r
  @retval EFI_INVALID_PARAMETER  InterruptHandler is NULL, and a handler for\r
                                 InterruptType was not previously installed.\r
  @retval EFI_UNSUPPORTED        The interrupt specified by InterruptType\r
                                 is not supported.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuRegisterInterruptHandler (\r
  IN EFI_CPU_ARCH_PROTOCOL         *This,\r
  IN EFI_EXCEPTION_TYPE            InterruptType,\r
  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler\r
  );\r
\r
/**\r
  Returns a timer value from one of the CPU's internal timers. There is no\r
  inherent time interval between ticks but is a function of the CPU frequency.\r
\r
  @param  This                - Protocol instance structure.\r
  @param  TimerIndex          - Specifies which CPU timer is requested.\r
  @param  TimerValue          - Pointer to the returned timer value.\r
  @param  TimerPeriod         - A pointer to the amount of time that passes\r
                                in femtoseconds (10-15) for each increment\r
                                of TimerValue. If TimerValue does not\r
                                increment at a predictable rate, then 0 is\r
                                returned.  The amount of time that has\r
                                passed between two calls to GetTimerValue()\r
                                can be calculated with the formula\r
                                (TimerValue2 - TimerValue1) * TimerPeriod.\r
                                This parameter is optional and may be NULL.\r
\r
  @retval EFI_SUCCESS           - If the CPU timer count was returned.\r
  @retval EFI_UNSUPPORTED       - If the CPU does not have any readable timers.\r
  @retval EFI_DEVICE_ERROR      - If an error occurred while reading the timer.\r
  @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuGetTimerValue (\r
  IN  EFI_CPU_ARCH_PROTOCOL       *This,\r
  IN  UINT32                      TimerIndex,\r
  OUT UINT64                      *TimerValue,\r
  OUT UINT64                      *TimerPeriod OPTIONAL\r
  );\r
\r
/**\r
  Set memory cacheability attributes for given range of memeory.\r
\r
  @param  This                   Protocol instance structure\r
  @param  BaseAddress            Specifies the start address of the\r
                                 memory range\r
  @param  Length                 Specifies the length of the memory range\r
  @param  Attributes             The memory cacheability for the memory range\r
\r
  @retval EFI_SUCCESS            If the cacheability of that memory range is\r
                                 set successfully\r
  @retval EFI_UNSUPPORTED        If the desired operation cannot be done\r
  @retval EFI_INVALID_PARAMETER  The input parameter is not correct,\r
                                 such as Length = 0\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuSetMemoryAttributes (\r
  IN EFI_CPU_ARCH_PROTOCOL      *This,\r
  IN EFI_PHYSICAL_ADDRESS       BaseAddress,\r
  IN UINT64                     Length,\r
  IN UINT64                     Attributes\r
  );\r
\r
/**\r
  Initialize Global Descriptor Table.\r
\r
**/\r
VOID\r
InitGlobalDescriptorTable (\r
  VOID\r
  );\r
\r
/**\r
  Sets the code selector (CS).\r
\r
  @param  Selector  Value of code selector.\r
\r
**/\r
VOID\r
EFIAPI\r
SetCodeSelector (\r
  UINT16 Selector\r
  );\r
\r
/**\r
  Sets the data selector (DS).\r
\r
  @param  Selector  Value of data selector.\r
\r
**/\r
VOID\r
EFIAPI\r
SetDataSelectors (\r
  UINT16 Selector\r
  );\r
\r
/**\r
  Update GCD memory space attributes according to current page table setup.\r
**/\r
VOID\r
RefreshGcdMemoryAttributesFromPaging (\r
  VOID\r
  );\r
\r
#endif\r
\r