[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuDxe.h

/** @file\r
  CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.\r
\r
  Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef _CPU_DXE_H_\r
#define _CPU_DXE_H_\r
\r
#include <PiDxe.h>\r
\r
#include <Protocol/Cpu.h>\r
#include <Protocol/MpService.h>\r
#include <Register/Msr.h>\r
\r
#include <Ppi/SecPlatformInformation.h>\r
#include <Ppi/SecPlatformInformation2.h>\r
\r
#include <Library/UefiDriverEntryPoint.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/DxeServicesTableLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/CpuLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/MtrrLib.h>\r
#include <Library/LocalApicLib.h>\r
#include <Library/UefiCpuLib.h>\r
#include <Library/UefiLib.h>\r
#include <Library/CpuExceptionHandlerLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/ReportStatusCodeLib.h>\r
#include <Library/MpInitLib.h>\r
#include <Library/TimerLib.h>\r
\r
#include <Guid/IdleLoopEvent.h>\r
#include <Guid/VectorHandoffTable.h>\r
\r
#define EFI_MEMORY_CACHETYPE_MASK     (EFI_MEMORY_UC  | \\r
                                       EFI_MEMORY_WC  | \\r
                                       EFI_MEMORY_WT  | \\r
                                       EFI_MEMORY_WB  | \\r
                                       EFI_MEMORY_UCE   \\r
                                       )\r
\r
#define EFI_MEMORY_PAGETYPE_MASK      (EFI_MEMORY_RP  | \\r
                                       EFI_MEMORY_XP  | \\r
                                       EFI_MEMORY_RO    \\r
                                       )\r
\r
#define HEAP_GUARD_NONSTOP_MODE       \\r
        ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT1|BIT0)) > BIT6)\r
\r
#define NULL_DETECTION_NONSTOP_MODE   \\r
        ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT0)) > BIT6)\r
\r
/**\r
  Flush CPU data cache. If the instruction cache is fully coherent\r
  with all DMA operations then function can just return EFI_SUCCESS.\r
\r
  @param  This              Protocol instance structure\r
  @param  Start             Physical address to start flushing from.\r
  @param  Length            Number of bytes to flush. Round up to chipset\r
                            granularity.\r
  @param  FlushType         Specifies the type of flush operation to perform.\r
\r
  @retval EFI_SUCCESS       If cache was flushed\r
  @retval EFI_UNSUPPORTED   If flush type is not supported.\r
  @retval EFI_DEVICE_ERROR  If requested range could not be flushed.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuFlushCpuDataCache (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This,\r
  IN EFI_PHYSICAL_ADDRESS      Start,\r
  IN UINT64                    Length,\r
  IN EFI_CPU_FLUSH_TYPE        FlushType\r
  );\r
\r
/**\r
  Enables CPU interrupts.\r
\r
  @param  This              Protocol instance structure\r
\r
  @retval EFI_SUCCESS       If interrupts were enabled in the CPU\r
  @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuEnableInterrupt (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This\r
  );\r
\r
/**\r
  Disables CPU interrupts.\r
\r
  @param  This              Protocol instance structure\r
\r
  @retval EFI_SUCCESS       If interrupts were disabled in the CPU.\r
  @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuDisableInterrupt (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This\r
  );\r
\r
/**\r
  Return the state of interrupts.\r
\r
  @param  This                   Protocol instance structure\r
  @param  State                  Pointer to the CPU's current interrupt state\r
\r
  @retval EFI_SUCCESS            If interrupts were disabled in the CPU.\r
  @retval EFI_INVALID_PARAMETER  State is NULL.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuGetInterruptState (\r
  IN  EFI_CPU_ARCH_PROTOCOL     *This,\r
  OUT BOOLEAN                   *State\r
  );\r
\r
/**\r
  Generates an INIT to the CPU.\r
\r
  @param  This              Protocol instance structure\r
  @param  InitType          Type of CPU INIT to perform\r
\r
  @retval EFI_SUCCESS       If CPU INIT occurred. This value should never be\r
                            seen.\r
  @retval EFI_DEVICE_ERROR  If CPU INIT failed.\r
  @retval EFI_UNSUPPORTED   Requested type of CPU INIT not supported.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuInit (\r
  IN EFI_CPU_ARCH_PROTOCOL     *This,\r
  IN EFI_CPU_INIT_TYPE         InitType\r
  );\r
\r
/**\r
  Registers a function to be called from the CPU interrupt handler.\r
\r
  @param  This                   Protocol instance structure\r
  @param  InterruptType          Defines which interrupt to hook. IA-32\r
                                 valid range is 0x00 through 0xFF\r
  @param  InterruptHandler       A pointer to a function of type\r
                                 EFI_CPU_INTERRUPT_HANDLER that is called\r
                                 when a processor interrupt occurs.  A null\r
                                 pointer is an error condition.\r
\r
  @retval EFI_SUCCESS            If handler installed or uninstalled.\r
  @retval EFI_ALREADY_STARTED    InterruptHandler is not NULL, and a handler\r
                                 for InterruptType was previously installed.\r
  @retval EFI_INVALID_PARAMETER  InterruptHandler is NULL, and a handler for\r
                                 InterruptType was not previously installed.\r
  @retval EFI_UNSUPPORTED        The interrupt specified by InterruptType\r
                                 is not supported.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuRegisterInterruptHandler (\r
  IN EFI_CPU_ARCH_PROTOCOL         *This,\r
  IN EFI_EXCEPTION_TYPE            InterruptType,\r
  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler\r
  );\r
\r
/**\r
  Returns a timer value from one of the CPU's internal timers. There is no\r
  inherent time interval between ticks but is a function of the CPU frequency.\r
\r
  @param  This                - Protocol instance structure.\r
  @param  TimerIndex          - Specifies which CPU timer is requested.\r
  @param  TimerValue          - Pointer to the returned timer value.\r
  @param  TimerPeriod         - A pointer to the amount of time that passes\r
                                in femtoseconds (10-15) for each increment\r
                                of TimerValue. If TimerValue does not\r
                                increment at a predictable rate, then 0 is\r
                                returned.  The amount of time that has\r
                                passed between two calls to GetTimerValue()\r
                                can be calculated with the formula\r
                                (TimerValue2 - TimerValue1) * TimerPeriod.\r
                                This parameter is optional and may be NULL.\r
\r
  @retval EFI_SUCCESS           - If the CPU timer count was returned.\r
  @retval EFI_UNSUPPORTED       - If the CPU does not have any readable timers.\r
  @retval EFI_DEVICE_ERROR      - If an error occurred while reading the timer.\r
  @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuGetTimerValue (\r
  IN  EFI_CPU_ARCH_PROTOCOL       *This,\r
  IN  UINT32                      TimerIndex,\r
  OUT UINT64                      *TimerValue,\r
  OUT UINT64                      *TimerPeriod OPTIONAL\r
  );\r
\r
/**\r
  Set memory cacheability attributes for given range of memeory.\r
\r
  @param  This                   Protocol instance structure\r
  @param  BaseAddress            Specifies the start address of the\r
                                 memory range\r
  @param  Length                 Specifies the length of the memory range\r
  @param  Attributes             The memory cacheability for the memory range\r
\r
  @retval EFI_SUCCESS            If the cacheability of that memory range is\r
                                 set successfully\r
  @retval EFI_UNSUPPORTED        If the desired operation cannot be done\r
  @retval EFI_INVALID_PARAMETER  The input parameter is not correct,\r
                                 such as Length = 0\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
CpuSetMemoryAttributes (\r
  IN EFI_CPU_ARCH_PROTOCOL      *This,\r
  IN EFI_PHYSICAL_ADDRESS       BaseAddress,\r
  IN UINT64                     Length,\r
  IN UINT64                     Attributes\r
  );\r
\r
/**\r
  Initialize Global Descriptor Table.\r
\r
**/\r
VOID\r
InitGlobalDescriptorTable (\r
  VOID\r
  );\r
\r
/**\r
  Sets the code selector (CS).\r
\r
  @param  Selector  Value of code selector.\r
\r
**/\r
VOID\r
EFIAPI\r
SetCodeSelector (\r
  UINT16 Selector\r
  );\r
\r
/**\r
  Sets the data selector (DS).\r
\r
  @param  Selector  Value of data selector.\r
\r
**/\r
VOID\r
EFIAPI\r
SetDataSelectors (\r
  UINT16 Selector\r
  );\r
\r
/**\r
  Update GCD memory space attributes according to current page table setup.\r
**/\r
VOID\r
RefreshGcdMemoryAttributesFromPaging (\r
  VOID\r
  );\r
\r
/**\r
  Special handler for #DB exception, which will restore the page attributes\r
  (not-present). It should work with #PF handler which will set pages to\r
  'present'.\r
\r
  @param ExceptionType  Exception type.\r
  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.\r
\r
**/\r
VOID\r
EFIAPI\r
DebugExceptionHandler (\r
  IN EFI_EXCEPTION_TYPE   ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT   SystemContext\r
  );\r
\r
/**\r
  Special handler for #PF exception, which will set the pages which caused\r
  #PF to be 'present'. The attribute of those pages should be restored in\r
  the subsequent #DB handler.\r
\r
  @param ExceptionType  Exception type.\r
  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.\r
\r
**/\r
VOID\r
EFIAPI\r
PageFaultExceptionHandler (\r
  IN EFI_EXCEPTION_TYPE   ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT   SystemContext\r
  );\r
\r
extern BOOLEAN mIsAllocatingPageTable;\r
extern UINTN   mNumberOfProcessors;\r
\r
#endif\r
\r
Commit	Line	Data
a47463f2	1	/** @file\r
7fadaacd	2	CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.\r
a47463f2	3	\r
7537f8c0	4	Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
01a1c0fc	5	This program and the accompanying materials\r
a47463f2	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
430fbbe0	15	#ifndef _CPU_DXE_H_\r
430fbbe0	16	#define _CPU_DXE_H_\r
a47463f2	17	\r
	18	#include <PiDxe.h>\r
	19	\r
	20	#include <Protocol/Cpu.h>\r
7fadaacd	21	#include <Protocol/MpService.h>\r
b1bd0d74	22	#include <Register/Msr.h>\r
7fadaacd JF	23	\r
	24	#include <Ppi/SecPlatformInformation.h>\r
	25	#include <Ppi/SecPlatformInformation2.h>\r
a47463f2	26	\r
	27	#include <Library/UefiDriverEntryPoint.h>\r
	28	#include <Library/UefiBootServicesTableLib.h>\r
	29	#include <Library/DxeServicesTableLib.h>\r
	30	#include <Library/BaseLib.h>\r
	31	#include <Library/CpuLib.h>\r
	32	#include <Library/BaseMemoryLib.h>\r
	33	#include <Library/MemoryAllocationLib.h>\r
	34	#include <Library/DebugLib.h>\r
	35	#include <Library/MtrrLib.h>\r
d4605c23	36	#include <Library/LocalApicLib.h>\r
661cab5d	37	#include <Library/UefiCpuLib.h>\r
e41aad15 JF	38	#include <Library/UefiLib.h>\r
e41aad15 JF	39	#include <Library/CpuExceptionHandlerLib.h>\r
7fadaacd JF	40	#include <Library/HobLib.h>\r
	41	#include <Library/ReportStatusCodeLib.h>\r
	42	#include <Library/MpInitLib.h>\r
7537f8c0	43	#include <Library/TimerLib.h>\r
7fadaacd	44	\r
32394027	45	#include <Guid/IdleLoopEvent.h>\r
e41aad15	46	#include <Guid/VectorHandoffTable.h>\r
a47463f2	47	\r
	48	#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC \| \\r
	49	EFI_MEMORY_WC \| \\r
	50	EFI_MEMORY_WT \| \\r
	51	EFI_MEMORY_WB \| \\r
	52	EFI_MEMORY_UCE \\r
	53	)\r
	54	\r
c1cab54c JW	55	#define EFI_MEMORY_PAGETYPE_MASK (EFI_MEMORY_RP \| \\r
	56	EFI_MEMORY_XP \| \\r
	57	EFI_MEMORY_RO \\r
	58	)\r
a47463f2	59	\r
dcc02621 JW	60	#define HEAP_GUARD_NONSTOP_MODE \\r
	61	((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6\|BIT1\|BIT0)) > BIT6)\r
	62	\r
	63	#define NULL_DETECTION_NONSTOP_MODE \\r
	64	((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6\|BIT0)) > BIT6)\r
	65	\r
430fbbe0	66	/**\r
	67	Flush CPU data cache. If the instruction cache is fully coherent\r
	68	with all DMA operations then function can just return EFI_SUCCESS.\r
	69	\r
	70	@param This Protocol instance structure\r
	71	@param Start Physical address to start flushing from.\r
	72	@param Length Number of bytes to flush. Round up to chipset\r
	73	granularity.\r
	74	@param FlushType Specifies the type of flush operation to perform.\r
	75	\r
	76	@retval EFI_SUCCESS If cache was flushed\r
	77	@retval EFI_UNSUPPORTED If flush type is not supported.\r
	78	@retval EFI_DEVICE_ERROR If requested range could not be flushed.\r
	79	\r
	80	**/\r
a47463f2	81	EFI_STATUS\r
	82	EFIAPI\r
	83	CpuFlushCpuDataCache (\r
	84	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	85	IN EFI_PHYSICAL_ADDRESS Start,\r
	86	IN UINT64 Length,\r
	87	IN EFI_CPU_FLUSH_TYPE FlushType\r
	88	);\r
	89	\r
430fbbe0	90	/**\r
	91	Enables CPU interrupts.\r
	92	\r
	93	@param This Protocol instance structure\r
	94	\r
	95	@retval EFI_SUCCESS If interrupts were enabled in the CPU\r
	96	@retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.\r
	97	\r
	98	**/\r
a47463f2	99	EFI_STATUS\r
	100	EFIAPI\r
	101	CpuEnableInterrupt (\r
	102	IN EFI_CPU_ARCH_PROTOCOL *This\r
	103	);\r
	104	\r
430fbbe0	105	/**\r
	106	Disables CPU interrupts.\r
	107	\r
	108	@param This Protocol instance structure\r
	109	\r
	110	@retval EFI_SUCCESS If interrupts were disabled in the CPU.\r
	111	@retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.\r
	112	\r
	113	**/\r
a47463f2	114	EFI_STATUS\r
	115	EFIAPI\r
	116	CpuDisableInterrupt (\r
	117	IN EFI_CPU_ARCH_PROTOCOL *This\r
	118	);\r
	119	\r
430fbbe0	120	/**\r
	121	Return the state of interrupts.\r
	122	\r
	123	@param This Protocol instance structure\r
	124	@param State Pointer to the CPU's current interrupt state\r
	125	\r
	126	@retval EFI_SUCCESS If interrupts were disabled in the CPU.\r
	127	@retval EFI_INVALID_PARAMETER State is NULL.\r
	128	\r
	129	**/\r
a47463f2	130	EFI_STATUS\r
	131	EFIAPI\r
	132	CpuGetInterruptState (\r
	133	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	134	OUT BOOLEAN *State\r
	135	);\r
	136	\r
430fbbe0	137	/**\r
	138	Generates an INIT to the CPU.\r
	139	\r
	140	@param This Protocol instance structure\r
	141	@param InitType Type of CPU INIT to perform\r
	142	\r
	143	@retval EFI_SUCCESS If CPU INIT occurred. This value should never be\r
	144	seen.\r
	145	@retval EFI_DEVICE_ERROR If CPU INIT failed.\r
	146	@retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.\r
	147	\r
	148	**/\r
a47463f2	149	EFI_STATUS\r
	150	EFIAPI\r
	151	CpuInit (\r
	152	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	153	IN EFI_CPU_INIT_TYPE InitType\r
	154	);\r
	155	\r
430fbbe0	156	/**\r
	157	Registers a function to be called from the CPU interrupt handler.\r
	158	\r
	159	@param This Protocol instance structure\r
	160	@param InterruptType Defines which interrupt to hook. IA-32\r
	161	valid range is 0x00 through 0xFF\r
	162	@param InterruptHandler A pointer to a function of type\r
	163	EFI_CPU_INTERRUPT_HANDLER that is called\r
	164	when a processor interrupt occurs. A null\r
	165	pointer is an error condition.\r
	166	\r
	167	@retval EFI_SUCCESS If handler installed or uninstalled.\r
	168	@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler\r
	169	for InterruptType was previously installed.\r
	170	@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for\r
	171	InterruptType was not previously installed.\r
	172	@retval EFI_UNSUPPORTED The interrupt specified by InterruptType\r
	173	is not supported.\r
	174	\r
	175	**/\r
a47463f2	176	EFI_STATUS\r
	177	EFIAPI\r
	178	CpuRegisterInterruptHandler (\r
	179	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	180	IN EFI_EXCEPTION_TYPE InterruptType,\r
	181	IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
	182	);\r
	183	\r
430fbbe0	184	/**\r
	185	Returns a timer value from one of the CPU's internal timers. There is no\r
	186	inherent time interval between ticks but is a function of the CPU frequency.\r
	187	\r
	188	@param This - Protocol instance structure.\r
	189	@param TimerIndex - Specifies which CPU timer is requested.\r
	190	@param TimerValue - Pointer to the returned timer value.\r
	191	@param TimerPeriod - A pointer to the amount of time that passes\r
	192	in femtoseconds (10-15) for each increment\r
	193	of TimerValue. If TimerValue does not\r
	194	increment at a predictable rate, then 0 is\r
	195	returned. The amount of time that has\r
	196	passed between two calls to GetTimerValue()\r
	197	can be calculated with the formula\r
	198	(TimerValue2 - TimerValue1) * TimerPeriod.\r
	199	This parameter is optional and may be NULL.\r
	200	\r
	201	@retval EFI_SUCCESS - If the CPU timer count was returned.\r
	202	@retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.\r
	203	@retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.\r
	204	@retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.\r
	205	\r
	206	**/\r
a47463f2	207	EFI_STATUS\r
	208	EFIAPI\r
	209	CpuGetTimerValue (\r
	210	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	211	IN UINT32 TimerIndex,\r
	212	OUT UINT64 *TimerValue,\r
	213	OUT UINT64 *TimerPeriod OPTIONAL\r
	214	);\r
	215	\r
430fbbe0	216	/**\r
	217	Set memory cacheability attributes for given range of memeory.\r
	218	\r
	219	@param This Protocol instance structure\r
	220	@param BaseAddress Specifies the start address of the\r
	221	memory range\r
	222	@param Length Specifies the length of the memory range\r
	223	@param Attributes The memory cacheability for the memory range\r
	224	\r
	225	@retval EFI_SUCCESS If the cacheability of that memory range is\r
	226	set successfully\r
	227	@retval EFI_UNSUPPORTED If the desired operation cannot be done\r
	228	@retval EFI_INVALID_PARAMETER The input parameter is not correct,\r
	229	such as Length = 0\r
	230	\r
	231	**/\r
a47463f2	232	EFI_STATUS\r
	233	EFIAPI\r
	234	CpuSetMemoryAttributes (\r
	235	IN EFI_CPU_ARCH_PROTOCOL *This,\r
	236	IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
	237	IN UINT64 Length,\r
	238	IN UINT64 Attributes\r
	239	);\r
	240	\r
430fbbe0	241	/**\r
	242	Initialize Global Descriptor Table.\r
	243	\r
	244	**/\r
a47463f2	245	VOID\r
	246	InitGlobalDescriptorTable (\r
	247	VOID\r
	248	);\r
	249	\r
430fbbe0	250	/**\r
	251	Sets the code selector (CS).\r
	252	\r
	253	@param Selector Value of code selector.\r
	254	\r
	255	**/\r
a47463f2	256	VOID\r
	257	EFIAPI\r
	258	SetCodeSelector (\r
	259	UINT16 Selector\r
	260	);\r
	261	\r
430fbbe0	262	/**\r
	263	Sets the data selector (DS).\r
	264	\r
	265	@param Selector Value of data selector.\r
	266	\r
	267	**/\r
a47463f2	268	VOID\r
	269	EFIAPI\r
	270	SetDataSelectors (\r
	271	UINT16 Selector\r
	272	);\r
	273	\r
cbd7300c DB	274	/**\r
	275	Update GCD memory space attributes according to current page table setup.\r
	276	**/\r
c1cab54c JW	277	VOID\r
	278	RefreshGcdMemoryAttributesFromPaging (\r
	279	VOID\r
	280	);\r
	281	\r
dcc02621 JW	282	/**\r
	283	Special handler for #DB exception, which will restore the page attributes\r
	284	(not-present). It should work with #PF handler which will set pages to\r
	285	'present'.\r
	286	\r
	287	@param ExceptionType Exception type.\r
	288	@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
	289	\r
	290	**/\r
	291	VOID\r
	292	EFIAPI\r
	293	DebugExceptionHandler (\r
51d0100b	294	IN EFI_EXCEPTION_TYPE ExceptionType,\r
dcc02621 JW	295	IN EFI_SYSTEM_CONTEXT SystemContext\r
	296	);\r
	297	\r
	298	/**\r
	299	Special handler for #PF exception, which will set the pages which caused\r
	300	#PF to be 'present'. The attribute of those pages should be restored in\r
	301	the subsequent #DB handler.\r
	302	\r
	303	@param ExceptionType Exception type.\r
	304	@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
	305	\r
	306	**/\r
	307	VOID\r
	308	EFIAPI\r
	309	PageFaultExceptionHandler (\r
51d0100b	310	IN EFI_EXCEPTION_TYPE ExceptionType,\r
dcc02621 JW	311	IN EFI_SYSTEM_CONTEXT SystemContext\r
	312	);\r
	313	\r
147fd35c	314	extern BOOLEAN mIsAllocatingPageTable;\r
dcc02621	315	extern UINTN mNumberOfProcessors;\r
147fd35c	316	\r
a47463f2	317	#endif\r
a47463f2	318	\r