projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| a1e8986d | 1 | /** @file\r |
| f60f4cfe | 2 | C based implementation of IA32 interrupt handling only\r |
| a1e8986d JJ |
3 | requiring a minimal assembly interrupt entry point.\r |
| 4 | \r | |
| 0d4c1db8 | 5 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
| 0acd8697 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| a1e8986d JJ |
7 | \r |
| 8 | **/\r | |
| 9 | \r | |
| 10 | #ifndef _CPU_GDT_H_\r | |
| 11 | #define _CPU_GDT_H_\r | |
| 12 | \r | |
| 13 | //\r | |
| 14 | // Local structure definitions\r | |
| 15 | //\r | |
| 16 | \r | |
| 17 | #pragma pack (1)\r | |
| 18 | \r | |
| 19 | //\r | |
| 20 | // Global Descriptor Entry structures\r | |
| 21 | //\r | |
| 22 | \r | |
| 23 | typedef struct _GDT_ENTRY {\r | |
| 053e878b MK |
24 | UINT16 Limit15_0;\r |
| 25 | UINT16 Base15_0;\r | |
| 26 | UINT8 Base23_16;\r | |
| 27 | UINT8 Type;\r | |
| 28 | UINT8 Limit19_16_and_flags;\r | |
| 29 | UINT8 Base31_24;\r | |
| a1e8986d JJ |
30 | } GDT_ENTRY;\r |
| 31 | \r | |
| 32 | typedef\r | |
| 053e878b MK |
33 | struct _GDT_ENTRIES {\r |
| 34 | GDT_ENTRY Null;\r | |
| 35 | GDT_ENTRY Linear;\r | |
| 36 | GDT_ENTRY LinearCode;\r | |
| 37 | GDT_ENTRY SysData;\r | |
| 38 | GDT_ENTRY SysCode;\r | |
| 39 | GDT_ENTRY SysCode16;\r | |
| 40 | GDT_ENTRY LinearData64;\r | |
| 41 | GDT_ENTRY LinearCode64;\r | |
| 42 | GDT_ENTRY Spare5;\r | |
| a1e8986d JJ |
43 | } GDT_ENTRIES;\r |
| 44 | \r | |
| 45 | #pragma pack ()\r | |
| 46 | \r | |
| 053e878b MK |
47 | #define NULL_SEL OFFSET_OF (GDT_ENTRIES, Null)\r |
| 48 | #define LINEAR_SEL OFFSET_OF (GDT_ENTRIES, Linear)\r | |
| 49 | #define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)\r | |
| 50 | #define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)\r | |
| 51 | #define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)\r | |
| 52 | #define SYS_CODE16_SEL OFFSET_OF (GDT_ENTRIES, SysCode16)\r | |
| 53 | #define LINEAR_DATA64_SEL OFFSET_OF (GDT_ENTRIES, LinearData64)\r | |
| 54 | #define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)\r | |
| 55 | #define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)\r | |
| a1e8986d JJ |
56 | \r |
| 57 | #if defined (MDE_CPU_IA32)\r | |
| 053e878b MK |
58 | #define CPU_CODE_SEL LINEAR_CODE_SEL\r |
| 59 | #define CPU_DATA_SEL LINEAR_SEL\r | |
| a1e8986d | 60 | #elif defined (MDE_CPU_X64)\r |
| 053e878b MK |
61 | #define CPU_CODE_SEL LINEAR_CODE64_SEL\r |
| 62 | #define CPU_DATA_SEL LINEAR_DATA64_SEL\r | |
| a1e8986d | 63 | #else\r |
| 053e878b | 64 | #error CPU type not supported for CPU GDT initialization!\r |
| a1e8986d JJ |
65 | #endif\r |
| 66 | \r | |
| 67 | #endif // _CPU_GDT_H_\r |