[mirror_edk2.git] / UefiCpuPkg / CpuDxe / Ia32 / CpuAsm.asm

      TITLE   CpuAsm.asm:\r
;------------------------------------------------------------------------------\r
;*\r
;*   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
;*   This program and the accompanying materials\r
;*   are licensed and made available under the terms and conditions of the BSD License\r
;*   which accompanies this distribution.  The full text of the license may be found at\r
;*   http://opensource.org/licenses/bsd-license.php\r
;*\r
;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;*\r
;*    CpuAsm.asm\r
;*\r
;*   Abstract:\r
;*\r
;------------------------------------------------------------------------------\r
\r
    .686\r
    .model  flat,C\r
    .code\r
\r
EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions\r
\r
;\r
; point to the external interrupt vector table\r
;\r
ExternalVectorTablePtr DWORD 0\r
\r
InitializeExternalVectorTablePtr PROC PUBLIC\r
    mov     eax, [esp+4]\r
    mov     ExternalVectorTablePtr, eax\r
    ret\r
InitializeExternalVectorTablePtr ENDP\r
\r
;------------------------------------------------------------------------------\r
; VOID\r
; SetCodeSelector (\r
;   UINT16 Selector\r
;   );\r
;------------------------------------------------------------------------------\r
SetCodeSelector PROC PUBLIC\r
    mov     ecx, [esp+4]\r
    sub     esp, 0x10\r
    lea     eax, setCodeSelectorLongJump\r
    mov     [esp], eax\r
    mov     [esp+4], cx\r
    jmp     fword ptr [esp]\r
setCodeSelectorLongJump:\r
    add     esp, 0x10\r
    ret\r
SetCodeSelector ENDP\r
\r
;------------------------------------------------------------------------------\r
; VOID\r
; SetDataSelectors (\r
;   UINT16 Selector\r
;   );\r
;------------------------------------------------------------------------------\r
SetDataSelectors PROC PUBLIC\r
    mov     ecx, [esp+4]\r
    mov     ss, cx\r
    mov     ds, cx\r
    mov     es, cx\r
    mov     fs, cx\r
    mov     gs, cx\r
    ret\r
SetDataSelectors ENDP\r
\r
;---------------------------------------;\r
; CommonInterruptEntry                  ;\r
;---------------------------------------;\r
; The follow algorithm is used for the common interrupt routine.\r
\r
CommonInterruptEntry PROC PUBLIC\r
    cli\r
    ;\r
    ; All interrupt handlers are invoked through interrupt gates, so\r
    ; IF flag automatically cleared at the entry point\r
    ;\r
\r
    ;\r
    ; Calculate vector number\r
    ;\r
    ; Get the return address of call, actually, it is the\r
    ; address of vector number.\r
    ;\r
    xchg    ecx, [esp]\r
    mov     cx, [ecx]\r
    and     ecx, 0FFFFh\r
    cmp     ecx, 32         ; Intel reserved vector for exceptions?\r
    jae     NoErrorCode\r
    bt      mErrorCodeFlag, ecx\r
    jc      HasErrorCode\r
\r
NoErrorCode:\r
\r
    ;\r
    ; Stack:\r
    ; +---------------------+\r
    ; +    EFlags           +\r
    ; +---------------------+\r
    ; +    CS               +\r
    ; +---------------------+\r
    ; +    EIP              +\r
    ; +---------------------+\r
    ; +    ECX              +\r
    ; +---------------------+ <-- ESP\r
    ;\r
    ; Registers:\r
    ;   ECX - Vector Number\r
    ;\r
\r
    ;\r
    ; Put Vector Number on stack\r
    ;\r
    push    ecx\r
\r
    ;\r
    ; Put 0 (dummy) error code on stack, and restore ECX\r
    ;\r
    xor     ecx, ecx  ; ECX = 0\r
    xchg    ecx, [esp+4]\r
\r
    jmp     ErrorCodeAndVectorOnStack\r
\r
HasErrorCode:\r
\r
    ;\r
    ; Stack:\r
    ; +---------------------+\r
    ; +    EFlags           +\r
    ; +---------------------+\r
    ; +    CS               +\r
    ; +---------------------+\r
    ; +    EIP              +\r
    ; +---------------------+\r
    ; +    Error Code       +\r
    ; +---------------------+\r
    ; +    ECX              +\r
    ; +---------------------+ <-- ESP\r
    ;\r
    ; Registers:\r
    ;   ECX - Vector Number\r
    ;\r
\r
    ;\r
    ; Put Vector Number on stack and restore ECX\r
    ;\r
    xchg    ecx, [esp]\r
\r
    ;\r
    ; Fall through to join main routine code\r
    ; at ErrorCodeAndVectorOnStack\r
    ;\r
@@:\r
    jmp @B\r
\r
ErrorCodeAndVectorOnStack:\r
    push    ebp\r
    mov     ebp, esp\r
\r
    ;\r
    ; Stack:\r
    ; +---------------------+\r
    ; +    EFlags           +\r
    ; +---------------------+\r
    ; +    CS               +\r
    ; +---------------------+\r
    ; +    EIP              +\r
    ; +---------------------+\r
    ; +    Error Code       +\r
    ; +---------------------+\r
    ; +    Vector Number    +\r
    ; +---------------------+\r
    ; +    EBP              +\r
    ; +---------------------+ <-- EBP\r
    ;\r
\r
    ;\r
    ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
    ; is 16-byte aligned\r
    ;\r
    and     esp, 0fffffff0h\r
    sub     esp, 12\r
\r
;; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
    push    eax\r
    push    ecx\r
    push    edx\r
    push    ebx\r
    lea     ecx, [ebp + 6 * 4]\r
    push    ecx                          ; ESP\r
    push    dword ptr [ebp]              ; EBP\r
    push    esi\r
    push    edi\r
\r
;; UINT32  Gs, Fs, Es, Ds, Cs, Ss;\r
    mov     eax, ss\r
    push    eax\r
    movzx   eax, word ptr [ebp + 4 * 4]\r
    push    eax\r
    mov     eax, ds\r
    push    eax\r
    mov     eax, es\r
    push    eax\r
    mov     eax, fs\r
    push    eax\r
    mov     eax, gs\r
    push    eax\r
\r
;; UINT32  Eip;\r
    mov     eax, [ebp + 3 * 4]\r
    push    eax\r
\r
;; UINT32  Gdtr[2], Idtr[2];\r
    sub     esp, 8\r
    sidt    [esp]\r
    mov     eax, [esp + 2]\r
    xchg    eax, [esp]\r
    and     eax, 0FFFFh\r
    mov     [esp+4], eax\r
\r
    sub     esp, 8\r
    sgdt    [esp]\r
    mov     eax, [esp + 2]\r
    xchg    eax, [esp]\r
    and     eax, 0FFFFh\r
    mov     [esp+4], eax\r
\r
;; UINT32  Ldtr, Tr;\r
    xor     eax, eax\r
    str     ax\r
    push    eax\r
    sldt    ax\r
    push    eax\r
\r
;; UINT32  EFlags;\r
    mov     eax, [ebp + 5 * 4]\r
    push    eax\r
\r
;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;\r
    mov     eax, cr4\r
    or      eax, 208h\r
    mov     cr4, eax\r
    push    eax\r
    mov     eax, cr3\r
    push    eax\r
    mov     eax, cr2\r
    push    eax\r
    xor     eax, eax\r
    push    eax\r
    mov     eax, cr0\r
    push    eax\r
\r
;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
    mov     eax, dr7\r
    push    eax\r
    mov     eax, dr6\r
    push    eax\r
    mov     eax, dr3\r
    push    eax\r
    mov     eax, dr2\r
    push    eax\r
    mov     eax, dr1\r
    push    eax\r
    mov     eax, dr0\r
    push    eax\r
\r
;; FX_SAVE_STATE_IA32 FxSaveState;\r
    sub     esp, 512\r
    mov     edi, esp\r
    db      0fh, 0aeh, 07h ;fxsave [edi]\r
\r
;; UINT32  ExceptionData;\r
    push    dword ptr [ebp + 2 * 4]\r
\r
;; call into exception handler\r
    mov     eax, ExternalVectorTablePtr  ; get the interrupt vectors base\r
    or      eax, eax                        ; NULL?\r
    jz      nullExternalExceptionHandler\r
\r
    mov     ecx, [ebp + 4]\r
    mov     eax, [eax + ecx * 4]\r
    or      eax, eax                        ; NULL?\r
    jz      nullExternalExceptionHandler\r
\r
;; Prepare parameter and call\r
    mov     edx, esp\r
    push    edx\r
    mov     edx, dword ptr [ebp + 1 * 4]\r
    push    edx\r
\r
    ;\r
    ; Call External Exception Handler\r
    ;\r
    call    eax\r
    add     esp, 8\r
\r
nullExternalExceptionHandler:\r
\r
    cli\r
;; UINT32  ExceptionData;\r
    add     esp, 4\r
\r
;; FX_SAVE_STATE_IA32 FxSaveState;\r
    mov     esi, esp\r
    db      0fh, 0aeh, 0eh ; fxrstor [esi]\r
    add     esp, 512\r
\r
;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
;; Skip restoration of DRx registers to support in-circuit emualators\r
;; or debuggers set breakpoint in interrupt/exception context\r
    add     esp, 4 * 6\r
\r
;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;\r
    pop     eax\r
    mov     cr0, eax\r
    add     esp, 4    ; not for Cr1\r
    pop     eax\r
    mov     cr2, eax\r
    pop     eax\r
    mov     cr3, eax\r
    pop     eax\r
    mov     cr4, eax\r
\r
;; UINT32  EFlags;\r
    pop     dword ptr [ebp + 5 * 4]\r
\r
;; UINT32  Ldtr, Tr;\r
;; UINT32  Gdtr[2], Idtr[2];\r
;; Best not let anyone mess with these particular registers...\r
    add     esp, 24\r
\r
;; UINT32  Eip;\r
    pop     dword ptr [ebp + 3 * 4]\r
\r
;; UINT32  Gs, Fs, Es, Ds, Cs, Ss;\r
;; NOTE - modified segment registers could hang the debugger...  We\r
;;        could attempt to insulate ourselves against this possibility,\r
;;        but that poses risks as well.\r
;;\r
    pop     gs\r
    pop     fs\r
    pop     es\r
    pop     ds\r
    pop     dword ptr [ebp + 4 * 4]\r
    pop     ss\r
\r
;; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
    pop     edi\r
    pop     esi\r
    add     esp, 4   ; not for ebp\r
    add     esp, 4   ; not for esp\r
    pop     ebx\r
    pop     edx\r
    pop     ecx\r
    pop     eax\r
\r
    mov     esp, ebp\r
    pop     ebp\r
    add     esp, 8\r
    iretd\r
\r
CommonInterruptEntry ENDP\r
\r
END\r
Commit	Line	Data
a47463f2	1	TITLE CpuAsm.asm:\r
	2	;------------------------------------------------------------------------------\r
	3	;*\r
61ece967	4	;* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
01a1c0fc	5	;* This program and the accompanying materials\r
a47463f2	6	;* are licensed and made available under the terms and conditions of the BSD License\r
	7	;* which accompanies this distribution. The full text of the license may be found at\r
	8	;* http://opensource.org/licenses/bsd-license.php\r
	9	;*\r
	10	;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	;*\r
	13	;* CpuAsm.asm\r
	14	;*\r
	15	;* Abstract:\r
	16	;*\r
	17	;------------------------------------------------------------------------------\r
	18	\r
	19	.686\r
	20	.model flat,C\r
	21	.code\r
	22	\r
	23	EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions\r
	24	\r
	25	;\r
	26	; point to the external interrupt vector table\r
	27	;\r
	28	ExternalVectorTablePtr DWORD 0\r
	29	\r
	30	InitializeExternalVectorTablePtr PROC PUBLIC\r
	31	mov eax, [esp+4]\r
	32	mov ExternalVectorTablePtr, eax\r
	33	ret\r
	34	InitializeExternalVectorTablePtr ENDP\r
	35	\r
	36	;------------------------------------------------------------------------------\r
	37	; VOID\r
	38	; SetCodeSelector (\r
	39	; UINT16 Selector\r
	40	; );\r
	41	;------------------------------------------------------------------------------\r
	42	SetCodeSelector PROC PUBLIC\r
	43	mov ecx, [esp+4]\r
	44	sub esp, 0x10\r
	45	lea eax, setCodeSelectorLongJump\r
	46	mov [esp], eax\r
	47	mov [esp+4], cx\r
	48	jmp fword ptr [esp]\r
	49	setCodeSelectorLongJump:\r
	50	add esp, 0x10\r
	51	ret\r
	52	SetCodeSelector ENDP\r
	53	\r
	54	;------------------------------------------------------------------------------\r
	55	; VOID\r
	56	; SetDataSelectors (\r
	57	; UINT16 Selector\r
	58	; );\r
	59	;------------------------------------------------------------------------------\r
	60	SetDataSelectors PROC PUBLIC\r
	61	mov ecx, [esp+4]\r
	62	mov ss, cx\r
	63	mov ds, cx\r
	64	mov es, cx\r
	65	mov fs, cx\r
	66	mov gs, cx\r
	67	ret\r
	68	SetDataSelectors ENDP\r
	69	\r
70	;---------------------------------------;\r
71	; CommonInterruptEntry ;\r
72	;---------------------------------------;\r
73	; The follow algorithm is used for the common interrupt routine.\r
74	\r
75	CommonInterruptEntry PROC PUBLIC\r
76	cli\r
77	;\r
78	; All interrupt handlers are invoked through interrupt gates, so\r
79	; IF flag automatically cleared at the entry point\r
80	;\r
81	\r
82	;\r
83	; Calculate vector number\r
84	;\r
85	; Get the return address of call, actually, it is the\r
86	; address of vector number.\r
87	;\r
88	xchg ecx, [esp]\r
89	mov cx, [ecx]\r
90	and ecx, 0FFFFh\r
91	cmp ecx, 32 ; Intel reserved vector for exceptions?\r
92	jae NoErrorCode\r
93	bt mErrorCodeFlag, ecx\r
94	jc HasErrorCode\r
95	\r
96	NoErrorCode:\r
97	\r
98	;\r
99	; Stack:\r
100	; +---------------------+\r
101	; + EFlags +\r
102	; +---------------------+\r
103	; + CS +\r
104	; +---------------------+\r
105	; + EIP +\r
106	; +---------------------+\r
107	; + ECX +\r
108	; +---------------------+ <-- ESP\r
109	;\r
110	; Registers:\r
111	; ECX - Vector Number\r
112	;\r
113	\r
114	;\r
115	; Put Vector Number on stack\r
116	;\r
117	push ecx\r
118	\r
119	;\r
120	; Put 0 (dummy) error code on stack, and restore ECX\r
121	;\r
122	xor ecx, ecx ; ECX = 0\r
123	xchg ecx, [esp+4]\r
124	\r
125	jmp ErrorCodeAndVectorOnStack\r
126	\r
127	HasErrorCode:\r
128	\r
129	;\r
130	; Stack:\r
131	; +---------------------+\r
132	; + EFlags +\r
133	; +---------------------+\r
134	; + CS +\r
135	; +---------------------+\r
136	; + EIP +\r
137	; +---------------------+\r
138	; + Error Code +\r
139	; +---------------------+\r
140	; + ECX +\r
141	; +---------------------+ <-- ESP\r
142	;\r
143	; Registers:\r
144	; ECX - Vector Number\r
145	;\r
146	\r
147	;\r
148	; Put Vector Number on stack and restore ECX\r
149	;\r
150	xchg ecx, [esp]\r
151	\r
152	;\r
153	; Fall through to join main routine code\r
154	; at ErrorCodeAndVectorOnStack\r
155	;\r
156	@@:\r
157	jmp @B\r
158	\r
159	ErrorCodeAndVectorOnStack:\r
160	push ebp\r
161	mov ebp, esp\r
162	\r
163	;\r
164	; Stack:\r
165	; +---------------------+\r
166	; + EFlags +\r
167	; +---------------------+\r
168	; + CS +\r
169	; +---------------------+\r
170	; + EIP +\r
171	; +---------------------+\r
172	; + Error Code +\r
173	; +---------------------+\r
174	; + Vector Number +\r
175	; +---------------------+\r
176	; + EBP +\r
177	; +---------------------+ <-- EBP\r
178	;\r
179	\r
180	;\r
181	; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
182	; is 16-byte aligned\r
183	;\r
184	and esp, 0fffffff0h\r
185	sub esp, 12\r
186	\r
187	;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
188	push eax\r
189	push ecx\r
190	push edx\r
191	push ebx\r
192	lea ecx, [ebp + 6 * 4]\r
193	push ecx ; ESP\r
194	push dword ptr [ebp] ; EBP\r
195	push esi\r
196	push edi\r
197	\r
198	;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
199	mov eax, ss\r
200	push eax\r
201	movzx eax, word ptr [ebp + 4 * 4]\r
202	push eax\r
203	mov eax, ds\r
204	push eax\r
205	mov eax, es\r
206	push eax\r
207	mov eax, fs\r
208	push eax\r
209	mov eax, gs\r
210	push eax\r
211	\r
212	;; UINT32 Eip;\r
213	mov eax, [ebp + 3 * 4]\r
214	push eax\r
215	\r
216	;; UINT32 Gdtr[2], Idtr[2];\r
217	sub esp, 8\r
218	sidt [esp]\r
219	mov eax, [esp + 2]\r
220	xchg eax, [esp]\r
221	and eax, 0FFFFh\r
222	mov [esp+4], eax\r
223	\r
224	sub esp, 8\r
225	sgdt [esp]\r
226	mov eax, [esp + 2]\r
227	xchg eax, [esp]\r
228	and eax, 0FFFFh\r
229	mov [esp+4], eax\r
230	\r
231	;; UINT32 Ldtr, Tr;\r
232	xor eax, eax\r
233	str ax\r
234	push eax\r
235	sldt ax\r
236	push eax\r
237	\r
238	;; UINT32 EFlags;\r
239	mov eax, [ebp + 5 * 4]\r
240	push eax\r
241	\r
242	;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
243	mov eax, cr4\r
244	or eax, 208h\r
245	mov cr4, eax\r
246	push eax\r
247	mov eax, cr3\r
248	push eax\r
249	mov eax, cr2\r
250	push eax\r
251	xor eax, eax\r
252	push eax\r
253	mov eax, cr0\r
254	push eax\r
255	\r
256	;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
257	mov eax, dr7\r
258	push eax\r
a47463f2	259	mov eax, dr6\r
a47463f2	260	push eax\r
a47463f2	261	mov eax, dr3\r
	262	push eax\r
	263	mov eax, dr2\r
	264	push eax\r
	265	mov eax, dr1\r
	266	push eax\r
	267	mov eax, dr0\r
	268	push eax\r
	269	\r
	270	;; FX_SAVE_STATE_IA32 FxSaveState;\r
	271	sub esp, 512\r
	272	mov edi, esp\r
	273	db 0fh, 0aeh, 07h ;fxsave [edi]\r
	274	\r
	275	;; UINT32 ExceptionData;\r
	276	push dword ptr [ebp + 2 * 4]\r
	277	\r
	278	;; call into exception handler\r
	279	mov eax, ExternalVectorTablePtr ; get the interrupt vectors base\r
	280	or eax, eax ; NULL?\r
	281	jz nullExternalExceptionHandler\r
	282	\r
	283	mov ecx, [ebp + 4]\r
	284	mov eax, [eax + ecx * 4]\r
	285	or eax, eax ; NULL?\r
	286	jz nullExternalExceptionHandler\r
	287	\r
	288	;; Prepare parameter and call\r
	289	mov edx, esp\r
	290	push edx\r
	291	mov edx, dword ptr [ebp + 1 * 4]\r
	292	push edx\r
	293	\r
	294	;\r
	295	; Call External Exception Handler\r
	296	;\r
	297	call eax\r
	298	add esp, 8\r
	299	\r
	300	nullExternalExceptionHandler:\r
	301	\r
	302	cli\r
	303	;; UINT32 ExceptionData;\r
	304	add esp, 4\r
	305	\r
	306	;; FX_SAVE_STATE_IA32 FxSaveState;\r
	307	mov esi, esp\r
	308	db 0fh, 0aeh, 0eh ; fxrstor [esi]\r
	309	add esp, 512\r
	310	\r
	311	;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
61ece967	312	;; Skip restoration of DRx registers to support in-circuit emualators\r
	313	;; or debuggers set breakpoint in interrupt/exception context\r
	314	add esp, 4 * 6\r
a47463f2	315	\r
	316	;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
	317	pop eax\r
	318	mov cr0, eax\r
	319	add esp, 4 ; not for Cr1\r
	320	pop eax\r
	321	mov cr2, eax\r
	322	pop eax\r
	323	mov cr3, eax\r
	324	pop eax\r
	325	mov cr4, eax\r
	326	\r
	327	;; UINT32 EFlags;\r
	328	pop dword ptr [ebp + 5 * 4]\r
	329	\r
	330	;; UINT32 Ldtr, Tr;\r
	331	;; UINT32 Gdtr[2], Idtr[2];\r
	332	;; Best not let anyone mess with these particular registers...\r
	333	add esp, 24\r
	334	\r
	335	;; UINT32 Eip;\r
	336	pop dword ptr [ebp + 3 * 4]\r
	337	\r
	338	;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
	339	;; NOTE - modified segment registers could hang the debugger... We\r
	340	;; could attempt to insulate ourselves against this possibility,\r
	341	;; but that poses risks as well.\r
	342	;;\r
	343	pop gs\r
	344	pop fs\r
	345	pop es\r
	346	pop ds\r
	347	pop dword ptr [ebp + 4 * 4]\r
	348	pop ss\r
	349	\r
	350	;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
	351	pop edi\r
	352	pop esi\r
	353	add esp, 4 ; not for ebp\r
	354	add esp, 4 ; not for esp\r
	355	pop ebx\r
	356	pop edx\r
	357	pop ecx\r
	358	pop eax\r
	359	\r
	360	mov esp, ebp\r
	361	pop ebp\r
	362	add esp, 8\r
	363	iretd\r
	364	\r
	365	CommonInterruptEntry ENDP\r
	366	\r
	367	END\r