UefiCpuPkg/CpuMpPei: Load microcode if found newer revision
[mirror_edk2.git] / UefiCpuPkg / CpuMpPei / CpuMpPei.c
CommitLineData
ea0f431c
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1/** @file\r
2 CPU PEI Module installs CPU Multiple Processor PPI.\r
3\r
4 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuMpPei.h"\r
16\r
17//\r
18// Global Descriptor Table (GDT)\r
19//\r
20GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r
21/* selector { Global Segment Descriptor } */\r
22/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor\r
23/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r
24/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r
25/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
26/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r
27/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
28/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
29/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r
30/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
31};\r
32\r
33//\r
34// IA32 Gdt register\r
35//\r
36GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {\r
37 sizeof (mGdtEntries) - 1,\r
38 (UINTN) mGdtEntries\r
39 };\r
40\r
41GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {\r
42 (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
43 &gEfiEndOfPeiSignalPpiGuid,\r
44 CpuMpEndOfPeiCallback\r
45};\r
46\r
47/**\r
48 Sort the APIC ID of all processors.\r
49\r
50 This function sorts the APIC ID of all processors so that processor number is\r
51 assigned in the ascending order of APIC ID which eases MP debugging.\r
52\r
53 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
54**/\r
55VOID\r
56SortApicId (\r
57 IN PEI_CPU_MP_DATA *PeiCpuMpData\r
58 )\r
59{\r
60 UINTN Index1;\r
61 UINTN Index2;\r
62 UINTN Index3;\r
63 UINT32 ApicId;\r
24930b56 64 PEI_CPU_DATA CpuData;\r
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65 UINT32 ApCount;\r
66\r
67 ApCount = PeiCpuMpData->CpuCount - 1;\r
68\r
69 if (ApCount != 0) {\r
70 for (Index1 = 0; Index1 < ApCount; Index1++) {\r
71 Index3 = Index1;\r
72 //\r
73 // Sort key is the hardware default APIC ID\r
74 //\r
75 ApicId = PeiCpuMpData->CpuData[Index1].ApicId;\r
76 for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {\r
77 if (ApicId > PeiCpuMpData->CpuData[Index2].ApicId) {\r
78 Index3 = Index2;\r
79 ApicId = PeiCpuMpData->CpuData[Index2].ApicId;\r
80 }\r
81 }\r
82 if (Index3 != Index1) {\r
24930b56
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83 CopyMem (&CpuData, &PeiCpuMpData->CpuData[Index3], sizeof (PEI_CPU_DATA));\r
84 CopyMem (\r
85 &PeiCpuMpData->CpuData[Index3],\r
86 &PeiCpuMpData->CpuData[Index1],\r
87 sizeof (PEI_CPU_DATA)\r
88 );\r
89 CopyMem (&PeiCpuMpData->CpuData[Index1], &CpuData, sizeof (PEI_CPU_DATA));\r
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90 }\r
91 }\r
92\r
93 //\r
94 // Get the processor number for the BSP\r
95 //\r
96 ApicId = GetInitialApicId ();\r
97 for (Index1 = 0; Index1 < PeiCpuMpData->CpuCount; Index1++) {\r
98 if (PeiCpuMpData->CpuData[Index1].ApicId == ApicId) {\r
99 PeiCpuMpData->BspNumber = (UINT32) Index1;\r
100 break;\r
101 }\r
102 }\r
103 }\r
104}\r
105\r
c7981a11
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106/**\r
107 Enable x2APIC mode on APs.\r
108\r
109 @param Buffer Pointer to private data buffer.\r
110**/\r
111VOID\r
112EFIAPI\r
113ApFuncEnableX2Apic (\r
114 IN OUT VOID *Buffer\r
115 )\r
116{\r
117 SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
118}\r
119\r
4de216c0
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120/**\r
121 Get AP loop mode.\r
122\r
123 @param MonitorFilterSize Returns the largest monitor-line size in bytes.\r
124\r
125 @return The AP loop mode.\r
126**/\r
127UINT8\r
128GetApLoopMode (\r
129 OUT UINT16 *MonitorFilterSize\r
130 )\r
131{\r
132 UINT8 ApLoopMode;\r
133 UINT32 RegEbx;\r
134 UINT32 RegEcx;\r
135 UINT32 RegEdx;\r
136\r
137 ASSERT (MonitorFilterSize != NULL);\r
138\r
139 ApLoopMode = PcdGet8 (PcdCpuApLoopMode);\r
140 ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);\r
141 if (ApLoopMode == ApInMwaitLoop) {\r
142 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx, NULL);\r
143 if ((RegEcx & BIT3) == 0) {\r
144 //\r
145 // If processor does not support MONITOR/MWAIT feature\r
146 // by CPUID.[EAX=01H]:ECX.BIT3, force AP in Hlt-loop mode\r
147 //\r
148 ApLoopMode = ApInHltLoop;\r
149 }\r
150 }\r
151\r
152 if (ApLoopMode == ApInHltLoop) {\r
153 *MonitorFilterSize = 0;\r
154 } else if (ApLoopMode == ApInRunLoop) {\r
155 *MonitorFilterSize = sizeof (UINT32);\r
156 } else if (ApLoopMode == ApInMwaitLoop) {\r
157 //\r
158 // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes\r
159 // CPUID.[EAX=05H].EDX: C-states supported using MWAIT\r
160 //\r
161 AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &RegEbx, NULL, &RegEdx);\r
162 *MonitorFilterSize = RegEbx & 0xFFFF;\r
163 }\r
164\r
165 return ApLoopMode;\r
166}\r
167\r
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168/**\r
169 Get CPU MP Data pointer from the Guided HOB.\r
170\r
171 @return Pointer to Pointer to PEI CPU MP Data\r
172**/\r
173PEI_CPU_MP_DATA *\r
174GetMpHobData (\r
175 VOID\r
176 )\r
177{\r
178 EFI_HOB_GUID_TYPE *GuidHob;\r
179 VOID *DataInHob;\r
180 PEI_CPU_MP_DATA *CpuMpData;\r
181\r
182 CpuMpData = NULL;\r
183 GuidHob = GetFirstGuidHob (&gEfiCallerIdGuid);\r
184 if (GuidHob != NULL) {\r
185 DataInHob = GET_GUID_HOB_DATA (GuidHob);\r
186 CpuMpData = (PEI_CPU_MP_DATA *)(*(UINTN *)DataInHob);\r
187 }\r
188 ASSERT (CpuMpData != NULL);\r
189 return CpuMpData;\r
190}\r
191\r
ef1fdb80 192/**\r
5ac96e3a 193 Save the volatile registers required to be restored following INIT IPI.\r
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194 \r
195 @param VolatileRegisters Returns buffer saved the volatile resisters\r
196**/\r
197VOID\r
198SaveVolatileRegisters (\r
199 OUT CPU_VOLATILE_REGISTERS *VolatileRegisters\r
200 )\r
201{\r
202 UINT32 RegEdx;\r
203\r
204 VolatileRegisters->Cr0 = AsmReadCr0 ();\r
205 VolatileRegisters->Cr3 = AsmReadCr3 ();\r
206 VolatileRegisters->Cr4 = AsmReadCr4 ();\r
207\r
208 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);\r
209 if ((RegEdx & BIT2) != 0) {\r
210 //\r
211 // If processor supports Debugging Extensions feature\r
212 // by CPUID.[EAX=01H]:EDX.BIT2\r
213 //\r
214 VolatileRegisters->Dr0 = AsmReadDr0 ();\r
215 VolatileRegisters->Dr1 = AsmReadDr1 ();\r
216 VolatileRegisters->Dr2 = AsmReadDr2 ();\r
217 VolatileRegisters->Dr3 = AsmReadDr3 ();\r
218 VolatileRegisters->Dr6 = AsmReadDr6 ();\r
219 VolatileRegisters->Dr7 = AsmReadDr7 ();\r
220 }\r
221}\r
222\r
223/**\r
5ac96e3a 224 Restore the volatile registers following INIT IPI.\r
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225 \r
226 @param VolatileRegisters Pointer to volatile resisters\r
227 @param IsRestoreDr TRUE: Restore DRx if supported\r
228 FALSE: Do not restore DRx\r
229**/\r
230VOID\r
231RestoreVolatileRegisters (\r
232 IN CPU_VOLATILE_REGISTERS *VolatileRegisters,\r
233 IN BOOLEAN IsRestoreDr\r
234 )\r
235{\r
236 UINT32 RegEdx;\r
237\r
238 AsmWriteCr0 (VolatileRegisters->Cr0);\r
239 AsmWriteCr3 (VolatileRegisters->Cr3);\r
240 AsmWriteCr4 (VolatileRegisters->Cr4);\r
241\r
242 if (IsRestoreDr) {\r
243 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);\r
244 if ((RegEdx & BIT2) != 0) {\r
245 //\r
246 // If processor supports Debugging Extensions feature\r
247 // by CPUID.[EAX=01H]:EDX.BIT2\r
248 //\r
249 AsmWriteDr0 (VolatileRegisters->Dr0);\r
250 AsmWriteDr1 (VolatileRegisters->Dr1);\r
251 AsmWriteDr2 (VolatileRegisters->Dr2);\r
252 AsmWriteDr3 (VolatileRegisters->Dr3);\r
253 AsmWriteDr6 (VolatileRegisters->Dr6);\r
254 AsmWriteDr7 (VolatileRegisters->Dr7);\r
255 }\r
256 }\r
257}\r
258\r
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259/**\r
260 This function will be called from AP reset code if BSP uses WakeUpAP.\r
261\r
262 @param ExchangeInfo Pointer to the MP exchange info buffer\r
c972495e 263 @param NumApsExecuting Number of current executing AP\r
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264**/\r
265VOID\r
266EFIAPI\r
267ApCFunction (\r
268 IN MP_CPU_EXCHANGE_INFO *ExchangeInfo,\r
269 IN UINTN NumApsExecuting\r
270 )\r
271{\r
272 PEI_CPU_MP_DATA *PeiCpuMpData;\r
273 UINTN ProcessorNumber;\r
274 EFI_AP_PROCEDURE Procedure;\r
275 UINTN BistData;\r
c87e41b4 276 volatile UINT32 *ApStartupSignalBuffer;\r
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277\r
278 PeiCpuMpData = ExchangeInfo->PeiCpuMpData;\r
c87e41b4
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279 while (TRUE) {\r
280 if (PeiCpuMpData->InitFlag) {\r
281 ProcessorNumber = NumApsExecuting;\r
282 //\r
283 // Sync BSP's Control registers to APs\r
284 //\r
285 RestoreVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters, FALSE);\r
286 //\r
287 // This is first time AP wakeup, get BIST information from AP stack\r
288 //\r
289 BistData = *(UINTN *) (PeiCpuMpData->Buffer + ProcessorNumber * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));\r
290 PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32 = (UINT32) BistData;\r
291 PeiCpuMpData->CpuData[ProcessorNumber].ApicId = GetInitialApicId ();\r
292 if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId >= 0xFF) {\r
293 //\r
294 // Set x2APIC mode if there are any logical processor reporting\r
295 // an APIC ID of 255 or greater.\r
296 //\r
297 AcquireSpinLock(&PeiCpuMpData->MpLock);\r
298 PeiCpuMpData->X2ApicEnable = TRUE;\r
299 ReleaseSpinLock(&PeiCpuMpData->MpLock);\r
300 }\r
301 //\r
302 // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r
303 //\r
304 MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);\r
305 MicrocodeDetect ();\r
306 PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
307 } else {\r
2f0261b7 308 //\r
c87e41b4 309 // Execute AP function if AP is not disabled\r
2f0261b7 310 //\r
c87e41b4
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311 GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r
312 if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r
313 //\r
314 // Restore AP's volatile registers saved\r
315 //\r
316 RestoreVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r
317 }\r
318\r
319 if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&\r
320 (PeiCpuMpData->ApFunction != 0)) {\r
321 PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;\r
322 Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;\r
323 //\r
324 // Invoke AP function here\r
325 //\r
326 Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);\r
327 //\r
328 // Re-get the processor number due to BSP/AP maybe exchange in AP function\r
329 //\r
330 GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r
331 PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
332 }\r
2f0261b7 333 }\r
c87e41b4 334\r
ea0f431c 335 //\r
c87e41b4 336 // AP finished executing C code\r
ea0f431c 337 //\r
c87e41b4
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338 InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);\r
339\r
ea0f431c 340 //\r
c87e41b4 341 // Place AP is specified loop mode\r
ea0f431c 342 //\r
c87e41b4
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343 if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r
344 //\r
345 // Save AP volatile registers\r
346 //\r
347 SaveVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters);\r
348 //\r
349 // Place AP in Hlt-loop\r
350 //\r
351 while (TRUE) {\r
352 DisableInterrupts ();\r
353 CpuSleep ();\r
354 CpuPause ();\r
355 }\r
356 }\r
357 ApStartupSignalBuffer = PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal;\r
f40a7de4 358 //\r
c87e41b4 359 // Clear AP start-up signal\r
f40a7de4 360 //\r
c87e41b4
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361 *ApStartupSignalBuffer = 0;\r
362 while (TRUE) {\r
363 DisableInterrupts ();\r
364 if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
365 //\r
366 // Place AP in Mwait-loop\r
367 //\r
368 AsmMonitor ((UINTN)ApStartupSignalBuffer, 0, 0);\r
369 if (*ApStartupSignalBuffer != WAKEUP_AP_SIGNAL) {\r
370 //\r
371 // If AP start-up signal is not set, place AP into\r
372 // the maximum C-state\r
373 //\r
374 AsmMwait (PeiCpuMpData->ApTargetCState << 4, 0);\r
375 }\r
376 } else if (PeiCpuMpData->ApLoopMode == ApInRunLoop) {\r
377 //\r
378 // Place AP in Run-loop\r
379 //\r
380 CpuPause ();\r
381 } else {\r
382 ASSERT (FALSE);\r
383 }\r
f40a7de4 384\r
c972495e 385 //\r
c87e41b4
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386 // If AP start-up signal is written, AP is waken up\r
387 // otherwise place AP in loop again\r
c972495e 388 //\r
c87e41b4
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389 if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {\r
390 break;\r
391 }\r
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392 }\r
393 }\r
ea0f431c
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394}\r
395\r
396/**\r
397 This function will be called by BSP to wakeup AP.\r
398\r
399 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
400 @param Broadcast TRUE: Send broadcast IPI to all APs\r
401 FALSE: Send IPI to AP by ApicId\r
a09647f3 402 @param ProcessorNumber The handle number of specified processor\r
ea0f431c
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403 @param Procedure The function to be invoked by AP\r
404 @param ProcedureArgument The argument to be passed into AP function\r
405**/\r
406VOID\r
407WakeUpAP (\r
408 IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
409 IN BOOLEAN Broadcast,\r
a09647f3 410 IN UINTN ProcessorNumber,\r
ea0f431c
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411 IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
412 IN VOID *ProcedureArgument OPTIONAL\r
413 )\r
414{\r
415 volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
a09647f3 416 UINTN Index;\r
ea0f431c
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417\r
418 PeiCpuMpData->ApFunction = (UINTN) Procedure;\r
419 PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
420 PeiCpuMpData->FinishedCount = 0;\r
421\r
422 ExchangeInfo = PeiCpuMpData->MpCpuExchangeInfo;\r
423 ExchangeInfo->Lock = 0;\r
424 ExchangeInfo->StackStart = PeiCpuMpData->Buffer;\r
425 ExchangeInfo->StackSize = PeiCpuMpData->CpuApStackSize;\r
426 ExchangeInfo->BufferStart = PeiCpuMpData->WakeupBuffer;\r
427 ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;\r
428 ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;\r
429 ExchangeInfo->Cr3 = AsmReadCr3 ();\r
430 ExchangeInfo->CFunction = (UINTN) ApCFunction;\r
431 ExchangeInfo->NumApsExecuting = 0;\r
432 ExchangeInfo->PeiCpuMpData = PeiCpuMpData;\r
433\r
434 //\r
435 // Get the BSP's data of GDT and IDT\r
436 //\r
437 CopyMem ((VOID *)&ExchangeInfo->GdtrProfile, &mGdt, sizeof(mGdt));\r
438 AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
439\r
a09647f3
JF
440 if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
441 //\r
442 // Get AP target C-state each time when waking up AP,\r
443 // for it maybe updated by platform again\r
444 //\r
445 PeiCpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r
ea0f431c
JF
446 }\r
447\r
a09647f3
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448 //\r
449 // Wakeup APs per AP loop state\r
450 //\r
451 if (PeiCpuMpData->ApLoopMode == ApInHltLoop || PeiCpuMpData->InitFlag) {\r
452 if (Broadcast) {\r
453 SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
454 } else {\r
455 SendInitSipiSipi (\r
456 PeiCpuMpData->CpuData[ProcessorNumber].ApicId,\r
457 (UINT32) ExchangeInfo->BufferStart\r
458 );\r
459 }\r
460 } else if ((PeiCpuMpData->ApLoopMode == ApInMwaitLoop) ||\r
461 (PeiCpuMpData->ApLoopMode == ApInRunLoop)) {\r
462 if (Broadcast) {\r
463 for (Index = 0; Index < PeiCpuMpData->CpuCount; Index++) {\r
464 if (Index != PeiCpuMpData->BspNumber) {\r
465 *(PeiCpuMpData->CpuData[Index].StartupApSignal) = WAKEUP_AP_SIGNAL;\r
466 }\r
467 }\r
468 } else {\r
469 *(PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal) = WAKEUP_AP_SIGNAL;\r
470 }\r
471 } else {\r
472 ASSERT (FALSE);\r
473 }\r
ea0f431c
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474 return ;\r
475}\r
476\r
477/**\r
478 Get available system memory below 1MB by specified size.\r
479\r
480 @param WakeupBufferSize Wakeup buffer size required\r
481\r
482 @retval other Return wakeup buffer address below 1MB.\r
483 @retval -1 Cannot find free memory below 1MB.\r
484**/\r
485UINTN\r
486GetWakeupBuffer (\r
487 IN UINTN WakeupBufferSize\r
488 )\r
489{\r
490 EFI_PEI_HOB_POINTERS Hob;\r
491 UINTN WakeupBufferStart;\r
492 UINTN WakeupBufferEnd;\r
493\r
494 //\r
495 // Get the HOB list for processing\r
496 //\r
497 Hob.Raw = GetHobList ();\r
498\r
499 //\r
500 // Collect memory ranges\r
501 //\r
502 while (!END_OF_HOB_LIST (Hob)) {\r
503 if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {\r
504 if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&\r
505 (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r
506 ((Hob.ResourceDescriptor->ResourceAttribute &\r
507 (EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |\r
508 EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |\r
509 EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED\r
510 )) == 0)\r
511 ) {\r
512 //\r
513 // Need memory under 1MB to be collected here\r
514 //\r
515 WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);\r
516 if (WakeupBufferEnd > BASE_1MB) {\r
517 //\r
518 // Wakeup buffer should be under 1MB\r
519 //\r
520 WakeupBufferEnd = BASE_1MB;\r
521 }\r
522 //\r
523 // Wakeup buffer should be aligned on 4KB\r
524 //\r
525 WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);\r
526 if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {\r
527 continue;\r
528 }\r
529 //\r
530 // Create a memory allocation HOB.\r
531 //\r
532 BuildMemoryAllocationHob (\r
533 WakeupBufferStart,\r
534 WakeupBufferSize,\r
535 EfiBootServicesData\r
536 );\r
537 return WakeupBufferStart;\r
538 }\r
539 }\r
540 //\r
541 // Find the next HOB\r
542 //\r
543 Hob.Raw = GET_NEXT_HOB (Hob);\r
544 }\r
545\r
546 return (UINTN) -1;\r
547}\r
548\r
549/**\r
550 Get available system memory below 1MB by specified size.\r
551\r
552 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
553**/\r
554VOID\r
555BackupAndPrepareWakeupBuffer(\r
556 IN PEI_CPU_MP_DATA *PeiCpuMpData\r
557 )\r
558{\r
559 CopyMem (\r
560 (VOID *) PeiCpuMpData->BackupBuffer,\r
561 (VOID *) PeiCpuMpData->WakeupBuffer,\r
562 PeiCpuMpData->BackupBufferSize\r
563 );\r
564 CopyMem (\r
565 (VOID *) PeiCpuMpData->WakeupBuffer,\r
566 (VOID *) PeiCpuMpData->AddressMap.RendezvousFunnelAddress,\r
567 PeiCpuMpData->AddressMap.RendezvousFunnelSize\r
568 );\r
569}\r
570\r
571/**\r
572 Restore wakeup buffer data.\r
573\r
574 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
575**/\r
576VOID\r
577RestoreWakeupBuffer(\r
578 IN PEI_CPU_MP_DATA *PeiCpuMpData\r
579 )\r
580{\r
581 CopyMem ((VOID *) PeiCpuMpData->WakeupBuffer, (VOID *) PeiCpuMpData->BackupBuffer, PeiCpuMpData->BackupBufferSize);\r
582}\r
583\r
584/**\r
585 This function will get CPU count in the system.\r
586\r
587 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
588\r
589 @return AP processor count\r
590**/\r
591UINT32\r
592CountProcessorNumber (\r
593 IN PEI_CPU_MP_DATA *PeiCpuMpData\r
594 )\r
595{\r
596 //\r
597 // Load Microcode on BSP\r
598 //\r
599 MicrocodeDetect ();\r
600 //\r
601 // Store BSP's MTRR setting\r
602 //\r
603 MtrrGetAllMtrrs (&PeiCpuMpData->MtrrTable);\r
944f45ae 604\r
ea0f431c 605 //\r
944f45ae 606 // Only perform AP detection if PcdCpuMaxLogicalProcessorNumber is greater than 1\r
ea0f431c 607 //\r
944f45ae
MK
608 if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {\r
609 //\r
2f0261b7 610 // Send 1st broadcast IPI to APs to wakeup APs\r
944f45ae 611 //\r
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JF
612 PeiCpuMpData->InitFlag = TRUE;\r
613 PeiCpuMpData->X2ApicEnable = FALSE;\r
944f45ae
MK
614 WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);\r
615 //\r
616 // Wait for AP task to complete and then exit.\r
617 //\r
618 MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));\r
2f0261b7 619 PeiCpuMpData->InitFlag = FALSE;\r
944f45ae
MK
620 PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;\r
621 ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r
622 //\r
c7981a11
JF
623 // Wait for all APs finished the initialization\r
624 //\r
625 while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {\r
626 CpuPause ();\r
627 }\r
628\r
629 if (PeiCpuMpData->X2ApicEnable) {\r
630 DEBUG ((EFI_D_INFO, "Force x2APIC mode!\n"));\r
631 //\r
a09647f3 632 // Wakeup all APs to enable x2APIC mode\r
c7981a11
JF
633 //\r
634 WakeUpAP (PeiCpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r
635 //\r
636 // Wait for all known APs finished\r
637 //\r
638 while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {\r
639 CpuPause ();\r
640 }\r
641 //\r
642 // Enable x2APIC on BSP\r
643 //\r
644 SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
645 }\r
646 DEBUG ((EFI_D_INFO, "APIC MODE is %d\n", GetApicMode ()));\r
647 //\r
944f45ae
MK
648 // Sort BSP/Aps by CPU APIC ID in ascending order\r
649 //\r
650 SortApicId (PeiCpuMpData);\r
651 }\r
ea0f431c
JF
652\r
653 DEBUG ((EFI_D_INFO, "CpuMpPei: Find %d processors in system.\n", PeiCpuMpData->CpuCount));\r
654 return PeiCpuMpData->CpuCount;\r
655}\r
656\r
657/**\r
658 Prepare for AP wakeup buffer and copy AP reset code into it.\r
659\r
660 Get wakeup buffer below 1MB. Allocate memory for CPU MP Data and APs Stack.\r
661\r
662 @return Pointer to PEI CPU MP Data\r
663**/\r
664PEI_CPU_MP_DATA *\r
665PrepareAPStartupVector (\r
666 VOID\r
667 )\r
668{\r
669 EFI_STATUS Status;\r
670 UINT32 MaxCpuCount;\r
671 PEI_CPU_MP_DATA *PeiCpuMpData;\r
672 EFI_PHYSICAL_ADDRESS Buffer;\r
673 UINTN BufferSize;\r
674 UINTN WakeupBuffer;\r
675 UINTN WakeupBufferSize;\r
676 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
e001e11f
JF
677 UINT8 ApLoopMode;\r
678 UINT16 MonitorFilterSize;\r
679 UINT8 *MonitorBuffer;\r
680 UINTN Index;\r
ea0f431c
JF
681\r
682 AsmGetAddressMap (&AddressMap);\r
683 WakeupBufferSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);\r
684 WakeupBuffer = GetWakeupBuffer ((WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1));\r
685 ASSERT (WakeupBuffer != (UINTN) -1);\r
686 DEBUG ((EFI_D_INFO, "CpuMpPei: WakeupBuffer = 0x%x\n", WakeupBuffer));\r
687\r
688 //\r
e001e11f
JF
689 // Allocate Pages for APs stack, CPU MP Data, backup buffer for wakeup buffer,\r
690 // and monitor buffer if required.\r
ea0f431c
JF
691 //\r
692 MaxCpuCount = PcdGet32(PcdCpuMaxLogicalProcessorNumber);\r
693 BufferSize = PcdGet32 (PcdCpuApStackSize) * MaxCpuCount + sizeof (PEI_CPU_MP_DATA)\r
694 + WakeupBufferSize + sizeof (PEI_CPU_DATA) * MaxCpuCount;\r
e001e11f
JF
695 ApLoopMode = GetApLoopMode (&MonitorFilterSize);\r
696 BufferSize += MonitorFilterSize * MaxCpuCount;\r
ea0f431c
JF
697 Status = PeiServicesAllocatePages (\r
698 EfiBootServicesData,\r
699 EFI_SIZE_TO_PAGES (BufferSize),\r
700 &Buffer\r
701 );\r
702 ASSERT_EFI_ERROR (Status);\r
703\r
704 PeiCpuMpData = (PEI_CPU_MP_DATA *) (UINTN) (Buffer + PcdGet32 (PcdCpuApStackSize) * MaxCpuCount);\r
705 PeiCpuMpData->Buffer = (UINTN) Buffer;\r
706 PeiCpuMpData->CpuApStackSize = PcdGet32 (PcdCpuApStackSize);\r
707 PeiCpuMpData->WakeupBuffer = WakeupBuffer;\r
708 PeiCpuMpData->BackupBuffer = (UINTN)PeiCpuMpData + sizeof (PEI_CPU_MP_DATA);\r
709 PeiCpuMpData->BackupBufferSize = WakeupBufferSize;\r
710 PeiCpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN) (WakeupBuffer + AddressMap.RendezvousFunnelSize);\r
711\r
712 PeiCpuMpData->CpuCount = 1;\r
713 PeiCpuMpData->BspNumber = 0;\r
28f27af6
JF
714 PeiCpuMpData->CpuData = (PEI_CPU_DATA *) (PeiCpuMpData->BackupBuffer +\r
715 PeiCpuMpData->BackupBufferSize);\r
ea0f431c
JF
716 PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();\r
717 PeiCpuMpData->CpuData[0].Health.Uint32 = 0;\r
718 PeiCpuMpData->EndOfPeiFlag = FALSE;\r
2f0261b7 719 InitializeSpinLock(&PeiCpuMpData->MpLock);\r
22cfe73a 720 SaveVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters);\r
ea0f431c 721 CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));\r
e001e11f
JF
722 //\r
723 // Initialize AP loop mode\r
724 //\r
725 PeiCpuMpData->ApLoopMode = ApLoopMode;\r
726 DEBUG ((EFI_D_INFO, "AP Loop Mode is %d\n", PeiCpuMpData->ApLoopMode));\r
727 MonitorBuffer = (UINT8 *)(PeiCpuMpData->CpuData + MaxCpuCount);\r
728 if (PeiCpuMpData->ApLoopMode != ApInHltLoop) {\r
729 //\r
730 // Set up APs wakeup signal buffer\r
731 //\r
732 for (Index = 0; Index < MaxCpuCount; Index++) {\r
733 PeiCpuMpData->CpuData[Index].StartupApSignal = \r
734 (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);\r
735 }\r
736 }\r
ea0f431c
JF
737 //\r
738 // Backup original data and copy AP reset code in it\r
739 //\r
740 BackupAndPrepareWakeupBuffer(PeiCpuMpData);\r
741\r
742 return PeiCpuMpData;\r
743}\r
744\r
745/**\r
746 Notify function on End Of Pei PPI.\r
747\r
748 On S3 boot, this function will restore wakeup buffer data.\r
749 On normal boot, this function will flag wakeup buffer to be un-used type.\r
750\r
751 @param PeiServices The pointer to the PEI Services Table.\r
752 @param NotifyDescriptor Address of the notification descriptor data structure.\r
753 @param Ppi Address of the PPI that was installed.\r
754\r
755 @retval EFI_SUCCESS When everything is OK.\r
756\r
757**/\r
758EFI_STATUS\r
759EFIAPI\r
760CpuMpEndOfPeiCallback (\r
761 IN EFI_PEI_SERVICES **PeiServices,\r
762 IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
763 IN VOID *Ppi\r
764 )\r
765{\r
766 EFI_STATUS Status;\r
767 EFI_BOOT_MODE BootMode;\r
768 PEI_CPU_MP_DATA *PeiCpuMpData;\r
769 EFI_PEI_HOB_POINTERS Hob;\r
770 EFI_HOB_MEMORY_ALLOCATION *MemoryHob;\r
771\r
c972495e 772 DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invoked\n"));\r
ea0f431c
JF
773\r
774 Status = PeiServicesGetBootMode (&BootMode);\r
775 ASSERT_EFI_ERROR (Status);\r
776\r
777 PeiCpuMpData = GetMpHobData ();\r
778 ASSERT (PeiCpuMpData != NULL);\r
779\r
780 if (BootMode != BOOT_ON_S3_RESUME) {\r
781 //\r
782 // Get the HOB list for processing\r
783 //\r
784 Hob.Raw = GetHobList ();\r
785 //\r
786 // Collect memory ranges\r
787 //\r
788 while (!END_OF_HOB_LIST (Hob)) {\r
789 if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {\r
790 MemoryHob = Hob.MemoryAllocation;\r
791 if(MemoryHob->AllocDescriptor.MemoryBaseAddress == PeiCpuMpData->WakeupBuffer) {\r
792 //\r
793 // Flag this HOB type to un-used\r
794 //\r
795 GET_HOB_TYPE (Hob) = EFI_HOB_TYPE_UNUSED;\r
796 break;\r
797 }\r
798 }\r
799 Hob.Raw = GET_NEXT_HOB (Hob);\r
800 }\r
801 } else {\r
802 RestoreWakeupBuffer (PeiCpuMpData);\r
803 PeiCpuMpData->EndOfPeiFlag = TRUE;\r
804 }\r
805 return EFI_SUCCESS;\r
806}\r
807\r
808/**\r
809 The Entry point of the MP CPU PEIM.\r
810\r
811 This function will wakeup APs and collect CPU AP count and install the\r
812 Mp Service Ppi.\r
813\r
814 @param FileHandle Handle of the file being invoked.\r
815 @param PeiServices Describes the list of possible PEI Services.\r
816\r
817 @retval EFI_SUCCESS MpServicePpi is installed successfully.\r
818\r
819**/\r
820EFI_STATUS\r
821EFIAPI\r
822CpuMpPeimInit (\r
823 IN EFI_PEI_FILE_HANDLE FileHandle,\r
824 IN CONST EFI_PEI_SERVICES **PeiServices\r
825 )\r
826{\r
827 EFI_STATUS Status;\r
828 PEI_CPU_MP_DATA *PeiCpuMpData;\r
829 UINT32 ProcessorCount;\r
830\r
831 //\r
832 // Load new GDT table on BSP\r
833 //\r
834 AsmInitializeGdt (&mGdt);\r
835 //\r
836 // Get wakeup buffer and copy AP reset code in it\r
837 //\r
838 PeiCpuMpData = PrepareAPStartupVector ();\r
839 //\r
840 // Count processor number and collect processor information\r
841 //\r
842 ProcessorCount = CountProcessorNumber (PeiCpuMpData);\r
843 //\r
844 // Build location of PEI CPU MP DATA buffer in HOB\r
845 //\r
846 BuildGuidDataHob (\r
847 &gEfiCallerIdGuid,\r
848 (VOID *)&PeiCpuMpData,\r
849 sizeof(UINT64)\r
850 );\r
851 //\r
852 // Update and publish CPU BIST information\r
853 //\r
854 CollectBistDataFromPpi (PeiServices, PeiCpuMpData);\r
855 //\r
856 // register an event for EndOfPei\r
857 //\r
858 Status = PeiServicesNotifyPpi (&mNotifyList);\r
859 ASSERT_EFI_ERROR (Status);\r
860 //\r
861 // Install CPU MP PPI\r
862 //\r
863 Status = PeiServicesInstallPpi(&mPeiCpuMpPpiDesc);\r
864 ASSERT_EFI_ERROR (Status);\r
865\r
866 return Status;\r
867}\r