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UefiCpuPkg/CpuMpPei: Load microcode on BSP and APs
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1/** @file
2 Definitions to install Multiple Processor PPI.
3
4 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13**/
14
15#ifndef _CPU_MP_PEI_H_
16#define _CPU_MP_PEI_H_
17
18#include <PiPei.h>
19
e66d675d 20#include <Ppi/SecPlatformInformation.h>
65e79f93 21
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22#include <Register/LocalApic.h>
23
65e79f93 24#include <Library/BaseLib.h>
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25#include <Library/BaseMemoryLib.h>
26#include <Library/DebugLib.h>
05e107f8 27#include <Library/HobLib.h>
e66d675d 28#include <Library/LocalApicLib.h>
b4cd9f78 29#include <Library/MtrrLib.h>
e66d675d 30#include <Library/PcdLib.h>
65e79f93 31#include <Library/PeimEntryPoint.h>
e66d675d 32#include <Library/PeiServicesLib.h>
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33#include <Library/SynchronizationLib.h>
34#include <Library/TimerLib.h>
46ba0f63 35#include <Library/UefiCpuLib.h>
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36
37#include "Microcode.h"
38
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39//
40// AP state
41//
42typedef enum {
43 CpuStateIdle,
44 CpuStateBusy,
45 CpuStateDisabled
46} CPU_STATE;
65e79f93 47
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48//
49// AP reset code information
50//
51typedef struct {
52 UINT8 *RendezvousFunnelAddress;
53 UINTN PModeEntryOffset;
54 UINTN LModeEntryOffset;
55 UINTN RendezvousFunnelSize;
56} MP_ASSEMBLY_ADDRESS_MAP;
57
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58typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;
59
60#pragma pack()
a56f6f45 61
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62typedef union {
63 struct {
64 UINT32 LimitLow : 16;
65 UINT32 BaseLow : 16;
66 UINT32 BaseMid : 8;
67 UINT32 Type : 4;
68 UINT32 System : 1;
69 UINT32 Dpl : 2;
70 UINT32 Present : 1;
71 UINT32 LimitHigh : 4;
72 UINT32 Software : 1;
73 UINT32 Reserved : 1;
74 UINT32 DefaultSize : 1;
75 UINT32 Granularity : 1;
76 UINT32 BaseHigh : 8;
77 } Bits;
78 UINT64 Uint64;
79} IA32_GDT;
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80
81//
82// MP CPU exchange information for AP reset code
83//
84typedef struct {
85 UINTN Lock;
86 UINTN StackStart;
87 UINTN StackSize;
88 UINTN CFunction;
89 IA32_DESCRIPTOR GdtrProfile;
90 IA32_DESCRIPTOR IdtrProfile;
91 UINTN BufferStart;
92 UINTN PmodeOffset;
93 UINTN NumApsExecuting;
94 UINTN LmodeOffset;
95 UINTN Cr3;
7d51bf5c 96 PEI_CPU_MP_DATA *PeiCpuMpData;
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97} MP_CPU_EXCHANGE_INFO;
98
f9d30595 99#pragma pack()
8018cb15 100
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101typedef struct {
102 UINT32 ApicId;
103 EFI_HEALTH_FLAGS Health;
104 CPU_STATE State;
105 BOOLEAN CpuHealthy;
106} PEI_CPU_DATA;
107
108//
109// PEI CPU MP Data save in memory
110//
111struct _PEI_CPU_MP_DATA {
112 UINT32 CpuCount;
113 UINT32 BspNumber;
114 UINTN Buffer;
115 UINTN CpuApStackSize;
116 MP_ASSEMBLY_ADDRESS_MAP AddressMap;
117 UINTN WakeupBuffer;
118 UINTN BackupBuffer;
119 UINTN BackupBufferSize;
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120 UINTN ApFunction;
121 UINTN ApFunctionArgument;
122 volatile UINT32 FinishedCount;
123 BOOLEAN InitFlag;
b4cd9f78 124 MTRR_SETTINGS MtrrTable;
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125 PEI_CPU_DATA *CpuData;
126 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;
127};
128
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129/**
130 Assembly code to get starting address and size of the rendezvous entry for APs.
131 Information for fixing a jump instruction in the code is also returned.
132
133 @param AddressMap Output buffer for address map information.
134**/
135VOID
136EFIAPI
137AsmGetAddressMap (
138 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap
139 );
140
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141/**
142 Assembly code to load GDT table and update segment accordingly.
143
144 @param Gdtr Pointer to GDT descriptor
145**/
146VOID
147EFIAPI
148AsmInitializeGdt (
149 IN IA32_DESCRIPTOR *Gdtr
150 );
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151
152
153#endif