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1/** @file\r
2 Definitions to install Multiple Processor PPI.\r
3\r
4 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#ifndef _CPU_MP_PEI_H_\r
16#define _CPU_MP_PEI_H_\r
17\r
18#include <PiPei.h>\r
19\r
20#include <Ppi/MpServices.h>\r
21#include <Ppi/SecPlatformInformation.h>\r
22#include <Ppi/SecPlatformInformation2.h>\r
23#include <Ppi/EndOfPeiPhase.h>\r
24\r
25#include <Register/LocalApic.h>\r
26\r
27#include <Library/BaseLib.h>\r
28#include <Library/BaseMemoryLib.h>\r
29#include <Library/DebugLib.h>\r
30#include <Library/HobLib.h>\r
31#include <Library/LocalApicLib.h>\r
32#include <Library/MtrrLib.h>\r
33#include <Library/PcdLib.h>\r
34#include <Library/PeimEntryPoint.h>\r
35#include <Library/PeiServicesLib.h>\r
36#include <Library/ReportStatusCodeLib.h>\r
37#include <Library/SynchronizationLib.h>\r
38#include <Library/TimerLib.h>\r
39#include <Library/UefiCpuLib.h>\r
40\r
41#include "Microcode.h"\r
42\r
43//\r
44// AP state\r
45//\r
46typedef enum {\r
47 CpuStateIdle,\r
48 CpuStateBusy,\r
49 CpuStateDisabled\r
50} CPU_STATE;\r
51\r
52//\r
53// AP reset code information\r
54//\r
55typedef struct {\r
56 UINT8 *RendezvousFunnelAddress;\r
57 UINTN PModeEntryOffset;\r
58 UINTN LModeEntryOffset;\r
59 UINTN RendezvousFunnelSize;\r
60} MP_ASSEMBLY_ADDRESS_MAP;\r
61\r
62//\r
63// CPU exchange information for switch BSP\r
64//\r
65typedef struct {\r
66 UINT8 State; // offset 0\r
67 UINTN StackPointer; // offset 4 / 8\r
68 IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
69 IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
70} CPU_EXCHANGE_ROLE_INFO;\r
71\r
72typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;\r
73\r
74#pragma pack()\r
75\r
76typedef union {\r
77 struct {\r
78 UINT32 LimitLow : 16;\r
79 UINT32 BaseLow : 16;\r
80 UINT32 BaseMid : 8;\r
81 UINT32 Type : 4;\r
82 UINT32 System : 1;\r
83 UINT32 Dpl : 2;\r
84 UINT32 Present : 1;\r
85 UINT32 LimitHigh : 4;\r
86 UINT32 Software : 1;\r
87 UINT32 Reserved : 1;\r
88 UINT32 DefaultSize : 1;\r
89 UINT32 Granularity : 1;\r
90 UINT32 BaseHigh : 8;\r
91 } Bits;\r
92 UINT64 Uint64;\r
93} IA32_GDT;\r
94\r
95//\r
96// MP CPU exchange information for AP reset code\r
97//\r
98typedef struct {\r
99 UINTN Lock;\r
100 UINTN StackStart;\r
101 UINTN StackSize;\r
102 UINTN CFunction;\r
103 IA32_DESCRIPTOR GdtrProfile;\r
104 IA32_DESCRIPTOR IdtrProfile;\r
105 UINTN BufferStart;\r
106 UINTN PmodeOffset;\r
107 UINTN NumApsExecuting;\r
108 UINTN LmodeOffset;\r
109 UINTN Cr3;\r
110 PEI_CPU_MP_DATA *PeiCpuMpData;\r
111} MP_CPU_EXCHANGE_INFO;\r
112\r
113#pragma pack()\r
114\r
115typedef struct {\r
116 UINT32 ApicId;\r
117 EFI_HEALTH_FLAGS Health;\r
118 CPU_STATE State;\r
119 BOOLEAN CpuHealthy;\r
120} PEI_CPU_DATA;\r
121\r
122//\r
123// PEI CPU MP Data save in memory\r
124//\r
125struct _PEI_CPU_MP_DATA {\r
126 UINT32 CpuCount;\r
127 UINT32 BspNumber;\r
128 UINTN Buffer;\r
129 UINTN CpuApStackSize;\r
130 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
131 UINTN WakeupBuffer;\r
132 UINTN BackupBuffer;\r
133 UINTN BackupBufferSize;\r
134 UINTN ApFunction;\r
135 UINTN ApFunctionArgument;\r
136 volatile UINT32 FinishedCount;\r
137 BOOLEAN EndOfPeiFlag;\r
138 BOOLEAN InitFlag;\r
139 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
140 CPU_EXCHANGE_ROLE_INFO APInfo;\r
141 MTRR_SETTINGS MtrrTable;\r
142 PEI_CPU_DATA *CpuData;\r
143 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
144};\r
145extern EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc;\r
146\r
147\r
148/**\r
149 Assembly code to get starting address and size of the rendezvous entry for APs.\r
150 Information for fixing a jump instruction in the code is also returned.\r
151\r
152 @param AddressMap Output buffer for address map information.\r
153**/\r
154VOID\r
155EFIAPI\r
156AsmGetAddressMap (\r
157 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
158 );\r
159\r
160/**\r
161 Assembly code to load GDT table and update segment accordingly.\r
162\r
163 @param Gdtr Pointer to GDT descriptor\r
164**/\r
165VOID\r
166EFIAPI\r
167AsmInitializeGdt (\r
168 IN IA32_DESCRIPTOR *Gdtr\r
169 );\r
170\r
171/**\r
172 Assembly code to do CLI-HALT loop.\r
173\r
174**/\r
175VOID\r
176EFIAPI\r
177AsmCliHltLoop (\r
178 VOID\r
179 );\r
180\r
181/**\r
182 Get available system memory below 1MB by specified size.\r
183\r
184 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
185**/\r
186VOID\r
187BackupAndPrepareWakeupBuffer(\r
188 IN PEI_CPU_MP_DATA *PeiCpuMpData\r
189 );\r
190\r
191/**\r
192 Restore wakeup buffer data.\r
193\r
194 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
195**/\r
196VOID\r
197RestoreWakeupBuffer(\r
198 IN PEI_CPU_MP_DATA *PeiCpuMpData\r
199 );\r
200\r
201/**\r
202 Notify function on End Of Pei PPI.\r
203\r
204 On S3 boot, this function will restore wakeup buffer data.\r
205 On normal boot, this function will flag wakeup buffer to be un-used type.\r
206\r
207 @param PeiServices The pointer to the PEI Services Table.\r
208 @param NotifyDescriptor Address of the notification descriptor data structure.\r
209 @param Ppi Address of the PPI that was installed.\r
210\r
211 @retval EFI_SUCCESS When everything is OK.\r
212\r
213**/\r
214EFI_STATUS\r
215EFIAPI\r
216CpuMpEndOfPeiCallback (\r
217 IN EFI_PEI_SERVICES **PeiServices,\r
218 IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
219 IN VOID *Ppi\r
220 );\r
221\r
222/**\r
223 This function will be called by BSP to wakeup AP.\r
224\r
225 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
226 @param Broadcast TRUE: Send broadcast IPI to all APs\r
227 FALSE: Send IPI to AP by ApicId\r
228 @param ApicId Apic ID for the processor to be waked\r
229 @param Procedure The function to be invoked by AP\r
230 @param ProcedureArgument The argument to be passed into AP function\r
231**/\r
232VOID\r
233WakeUpAP (\r
234 IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
235 IN BOOLEAN Broadcast,\r
236 IN UINT32 ApicId,\r
237 IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
238 IN VOID *ProcedureArgument OPTIONAL\r
239 );\r
240\r
241/**\r
242 Get CPU MP Data pointer from the Guided HOB.\r
243\r
244 @return Pointer to Pointer to PEI CPU MP Data\r
245**/\r
246PEI_CPU_MP_DATA *\r
247GetMpHobData (\r
248 VOID\r
249 );\r
250\r
251/**\r
252 Find the current Processor number by APIC ID.\r
253\r
254 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
255 @param ProcessorNumber Return the pocessor number found\r
256\r
257 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
258 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
259**/\r
260EFI_STATUS\r
261GetProcessorNumber (\r
262 IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
263 OUT UINTN *ProcessorNumber\r
264 );\r
265\r
266/**\r
267 Collects BIST data from PPI.\r
268\r
269 This function collects BIST data from Sec Platform Information2 PPI\r
270 or SEC Platform Information PPI.\r
271\r
272 @param PeiServices Pointer to PEI Services Table\r
273 @param PeiCpuMpData Pointer to PEI CPU MP Data\r
274\r
275**/\r
276VOID\r
277CollectBistDataFromPpi (\r
278 IN CONST EFI_PEI_SERVICES **PeiServices,\r
279 IN PEI_CPU_MP_DATA *PeiCpuMpData\r
280 );\r
281\r
282/**\r
283 Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.\r
284\r
285 @param PeiServices The pointer to the PEI Services Table.\r
286 @param StructureSize The pointer to the variable describing size of the input buffer.\r
287 @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.\r
288\r
289 @retval EFI_SUCCESS The data was successfully returned.\r
290 @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r
291 hold the record is returned in StructureSize.\r
292\r
293**/\r
294EFI_STATUS\r
295EFIAPI\r
296SecPlatformInformation2 (\r
297 IN CONST EFI_PEI_SERVICES **PeiServices,\r
298 IN OUT UINT64 *StructureSize,\r
299 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r
300 );\r
301\r
302#endif\r