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UefiCpuPkg/CpuMpPei: Skip microcode check/load if it has been loaded
[mirror_edk2.git] / UefiCpuPkg / CpuMpPei / Microcode.c
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1/** @file\r
2 Implementation of loading microcode on processors.\r
3\r
15dbb393 4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
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5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuMpPei.h"\r
16\r
17/**\r
18 Get microcode update signature of currently loaded microcode update.\r
19\r
20 @return Microcode signature.\r
21\r
22**/\r
23UINT32\r
24GetCurrentMicrocodeSignature (\r
25 VOID\r
26 )\r
27{\r
28 UINT64 Signature;\r
29\r
30 AsmWriteMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID, 0);\r
31 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
32 Signature = AsmReadMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID);\r
33 return (UINT32) RShiftU64 (Signature, 32);\r
34}\r
35\r
36/**\r
37 Detect whether specified processor can find matching microcode patch and load it.\r
38\r
39**/\r
40VOID\r
41MicrocodeDetect (\r
42 VOID\r
43 )\r
44{\r
45 UINT64 MicrocodePatchAddress;\r
46 UINT64 MicrocodePatchRegionSize;\r
47 UINT32 ExtendedTableLength;\r
48 UINT32 ExtendedTableCount;\r
49 EFI_CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;\r
50 EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;\r
51 EFI_CPU_MICROCODE_HEADER *MicrocodeEntryPoint;\r
52 UINTN MicrocodeEnd;\r
53 UINTN Index;\r
54 UINT8 PlatformId;\r
55 UINT32 RegEax;\r
46fd1182 56 UINT32 CurrentRevision;\r
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57 UINT32 LatestRevision;\r
58 UINTN TotalSize;\r
59 UINT32 CheckSum32;\r
60 BOOLEAN CorrectMicrocode;\r
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61 MICROCODE_INFO MicrocodeInfo;\r
62\r
63 ZeroMem (&MicrocodeInfo, sizeof (MICROCODE_INFO));\r
64 MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);\r
65 MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);\r
66 if (MicrocodePatchRegionSize == 0) {\r
67 //\r
68 // There is no microcode patches\r
69 //\r
70 return;\r
71 }\r
72\r
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73 CurrentRevision = GetCurrentMicrocodeSignature ();\r
74 if (CurrentRevision != 0) {\r
75 //\r
76 // Skip loading microcode if it has been loaded successfully\r
77 //\r
78 return;\r
79 }\r
80\r
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81 ExtendedTableLength = 0;\r
82 //\r
83 // Here data of CPUID leafs have not been collected into context buffer, so\r
84 // GetProcessorCpuid() cannot be used here to retrieve CPUID data.\r
85 //\r
86 AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);\r
87\r
88 //\r
89 // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID\r
90 //\r
91 PlatformId = (UINT8) AsmMsrBitFieldRead64 (EFI_MSR_IA32_PLATFORM_ID, 50, 52);\r
92\r
93 LatestRevision = 0;\r
94 MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);\r
95 MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;\r
96 do {\r
97 //\r
98 // Check if the microcode is for the Cpu and the version is newer\r
99 // and the update can be processed on the platform\r
100 //\r
101 CorrectMicrocode = FALSE;\r
102 if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
103 //\r
104 // It is the microcode header. It is not the padding data between microcode patches\r
8ed9ce80 105 // because the padding data should not include 0x00000001 and it should be the repeated\r
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106 // byte format (like 0xXYXYXYXY....).\r
107 //\r
108 if (MicrocodeEntryPoint->ProcessorId == RegEax &&\r
109 MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
110 (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
111 ) {\r
112 if (MicrocodeEntryPoint->DataSize == 0) {\r
113 CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, 2048);\r
114 } else {\r
115 CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, MicrocodeEntryPoint->DataSize + sizeof(EFI_CPU_MICROCODE_HEADER));\r
116 }\r
117 if (CheckSum32 == 0) {\r
118 CorrectMicrocode = TRUE;\r
119 }\r
120 } else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
121 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
122 ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));\r
123 if (ExtendedTableLength != 0) {\r
124 //\r
125 // Extended Table exist, check if the CPU in support list\r
126 //\r
127 ExtendedTableHeader = (EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *)((UINT8 *)(MicrocodeEntryPoint) + MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));\r
128 //\r
129 // Calculate Extended Checksum\r
130 //\r
131 if ((ExtendedTableLength % 4) == 0) {\r
132 CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTableHeader, ExtendedTableLength);\r
133 if (CheckSum32 == 0) {\r
134 //\r
135 // Checksum correct\r
136 //\r
137 ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
138 ExtendedTable = (EFI_CPU_MICROCODE_EXTENDED_TABLE *)(ExtendedTableHeader + 1);\r
139 for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
140 CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTable, sizeof(EFI_CPU_MICROCODE_EXTENDED_TABLE));\r
141 if (CheckSum32 == 0) {\r
142 //\r
143 // Verify Header\r
144 //\r
145 if ((ExtendedTable->ProcessorSignature == RegEax) &&\r
146 (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
147 //\r
148 // Find one\r
149 //\r
150 CorrectMicrocode = TRUE;\r
151 break;\r
152 }\r
153 }\r
154 ExtendedTable ++;\r
155 }\r
156 }\r
157 }\r
158 }\r
159 }\r
160 } else {\r
161 //\r
162 // It is the padding data between the microcode patches for microcode patches alignment.\r
163 // Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
164 // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
165 // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
166 // find the next possible microcode patch header.\r
167 //\r
168 MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
169 continue;\r
170 }\r
171 //\r
172 // Get the next patch.\r
173 //\r
174 if (MicrocodeEntryPoint->DataSize == 0) {\r
175 TotalSize = 2048;\r
176 } else {\r
177 TotalSize = MicrocodeEntryPoint->TotalSize;\r
178 }\r
179\r
180 if (CorrectMicrocode) {\r
181 LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
182 MicrocodeInfo.MicrocodeData = (VOID *)((UINTN)MicrocodeEntryPoint + sizeof (EFI_CPU_MICROCODE_HEADER));\r
183 MicrocodeInfo.MicrocodeSize = TotalSize;\r
184 MicrocodeInfo.ProcessorId = RegEax;\r
185 }\r
186\r
187 MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
188 } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
189\r
190 if (LatestRevision > 0) {\r
191 //\r
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192 // BIOS only authenticate updates that contain a numerically larger revision\r
193 // than the currently loaded revision, where Current Signature < New Update\r
194 // Revision. A processor with no loaded update is considered to have a\r
195 // revision equal to zero.\r
ea0f431c 196 //\r
15dbb393 197 if (LatestRevision > GetCurrentMicrocodeSignature ()) {\r
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198 AsmWriteMsr64 (\r
199 EFI_MSR_IA32_BIOS_UPDT_TRIG,\r
200 (UINT64) (UINTN) MicrocodeInfo.MicrocodeData\r
201 );\r
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202 //\r
203 // Get and verify new microcode signature\r
204 //\r
205 ASSERT (LatestRevision == GetCurrentMicrocodeSignature ());\r
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206 MicrocodeInfo.Load = TRUE;\r
207 } else {\r
208 MicrocodeInfo.Load = FALSE;\r
209 }\r
210 }\r
211}\r