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[mirror_edk2.git] / UefiCpuPkg / Library / BaseUefiCpuLib / X64 / InitializeFpu.asm

;------------------------------------------------------------------------------\r
;*\r
;*   Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
;*   This program and the accompanying materials\r
;*   are licensed and made available under the terms and conditions of the BSD License\r
;*   which accompanies this distribution.  The full text of the license may be found at\r
;*   http://opensource.org/licenses/bsd-license.php\r
;*\r
;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;*\r
;*\r
;------------------------------------------------------------------------------\r
\r
\r
.const\r
;\r
; Float control word initial value: \r
; all exceptions masked, double-precision, round-to-nearest\r
;\r
mFpuControlWord       DW      027Fh\r
;\r
; Multimedia-extensions control word:\r
; all exceptions masked, round-to-nearest, flush to zero for masked underflow\r
;\r
mMmxControlWord       DD      01F80h \r
\r
.code\r
\r
\r
;
; Initializes floating point units for requirement of UEFI specification.\r
;\r
; This function initializes floating-point control word to 0x027F (all exceptions\r
; masked,double-precision, round-to-nearest) and multimedia-extensions control word\r
; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero\r
; for masked underflow).
;\r
InitializeFloatingPointUnits PROC PUBLIC\r
\r
    ;\r
    ; Initialize floating point units\r
    ;\r
    ; The following opcodes stand for instruction 'finit' \r
    ; to be supported by some 64-bit assemblers\r
    ;\r
    DB      9Bh, 0DBh, 0E3h\r
    fldcw   mFpuControlWord\r
    \r
    ;\r
    ; Set OSFXSR bit 9 in CR4\r
    ;\r
    mov     rax, cr4\r
    or      rax, BIT9\r
    mov     cr4, rax\r
\r
    ldmxcsr mMmxControlWord\r
    \r
    ret\r
InitializeFloatingPointUnits ENDP\r
\r
END\r