projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 80c4b236 JF |
1 | /** @file\r |
| 2 | Execute Disable feature.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r | |
| 0acd8697 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 80c4b236 JF |
6 | \r |
| 7 | **/\r | |
| 8 | \r | |
| 9 | #include "CpuCommonFeatures.h"\r | |
| 10 | \r | |
| 11 | /**\r | |
| 12 | Detects if Execute Disable feature supported on current processor.\r | |
| 13 | \r | |
| 14 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
| 15 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
| 16 | structure for the CPU executing this function.\r | |
| 17 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
| 18 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
| 19 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
| 20 | RegisterCpuFeature().\r | |
| 21 | \r | |
| 22 | @retval TRUE Execute Disable feature is supported.\r | |
| 23 | @retval FALSE Execute Disable feature is not supported.\r | |
| 24 | \r | |
| 25 | @note This service could be called by BSP/APs.\r | |
| 26 | **/\r | |
| 27 | BOOLEAN\r | |
| 28 | EFIAPI\r | |
| 29 | ExecuteDisableSupport (\r | |
| 30 | IN UINTN ProcessorNumber,\r | |
| 31 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
| 32 | IN VOID *ConfigData OPTIONAL\r | |
| 33 | )\r | |
| 34 | {\r | |
| 35 | UINT32 Eax;\r | |
| 36 | CPUID_EXTENDED_CPU_SIG_EDX Edx;\r | |
| 37 | \r | |
| 38 | AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r | |
| 39 | if (Eax <= CPUID_EXTENDED_FUNCTION) {\r | |
| 40 | //\r | |
| 41 | // Extended CPUID functions are not supported on this processor.\r | |
| 42 | //\r | |
| 43 | return FALSE;\r | |
| 44 | }\r | |
| 45 | \r | |
| 46 | AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r | |
| 47 | return (Edx.Bits.NX != 0);\r | |
| 48 | }\r | |
| 49 | \r | |
| 50 | /**\r | |
| 51 | Initializes Execute Disable feature to specific state.\r | |
| 52 | \r | |
| 53 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
| 54 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
| 55 | structure for the CPU executing this function.\r | |
| 56 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
| 57 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
| 58 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
| 59 | RegisterCpuFeature().\r | |
| 60 | @param[in] State If TRUE, then the Execute Disable feature must be enabled.\r | |
| 61 | If FALSE, then the Execute Disable feature must be disabled.\r | |
| 62 | \r | |
| 63 | @retval RETURN_SUCCESS Execute Disable feature is initialized.\r | |
| 64 | \r | |
| 65 | @note This service could be called by BSP only.\r | |
| 66 | **/\r | |
| 67 | RETURN_STATUS\r | |
| 68 | EFIAPI\r | |
| 69 | ExecuteDisableInitialize (\r | |
| 70 | IN UINTN ProcessorNumber,\r | |
| 71 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
| 72 | IN VOID *ConfigData, OPTIONAL\r | |
| 73 | IN BOOLEAN State\r | |
| 74 | )\r | |
| 75 | {\r | |
| d28daadd ED |
76 | //\r |
| 77 | // The scope of the MSR_IA32_EFER is core for below processor type, only program\r | |
| 78 | // MSR_IA32_EFER for thread 0 in each core.\r | |
| 79 | //\r | |
| 80 | if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r | |
| 81 | if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r | |
| 82 | return RETURN_SUCCESS;\r | |
| 83 | }\r | |
| 84 | }\r | |
| 85 | \r | |
| 80c4b236 JF |
86 | CPU_REGISTER_TABLE_WRITE_FIELD (\r |
| 87 | ProcessorNumber,\r | |
| 88 | Msr,\r | |
| 89 | MSR_IA32_EFER,\r | |
| 90 | MSR_IA32_EFER_REGISTER,\r | |
| 91 | Bits.NXE,\r | |
| 92 | (State) ? 1 : 0\r | |
| 93 | );\r | |
| 94 | return RETURN_SUCCESS;\r | |
| 95 | }\r |