[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / Ia32 / ArchExceptionHandler.c

/** @file\r
  IA32 CPU Exception Handler functons.\r
\r
  Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "CpuExceptionCommon.h"\r
\r
/**\r
  Return address map of exception handler template so that C code can generate\r
  exception tables.\r
\r
  @param IdtEntry          Pointer to IDT entry to be updated.\r
  @param InterruptHandler  IDT handler value.\r
\r
**/\r
VOID\r
ArchUpdateIdtEntry (\r
  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry,\r
  IN UINTN                           InterruptHandler\r
  )\r
{\r
  IdtEntry->Bits.OffsetLow   = (UINT16)(UINTN)InterruptHandler;\r
  IdtEntry->Bits.OffsetHigh  = (UINT16)((UINTN)InterruptHandler >> 16);\r
  IdtEntry->Bits.GateType    = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
}\r
\r
/**\r
  Read IDT handler value from IDT entry.\r
\r
  @param IdtEntry          Pointer to IDT entry to be read.\r
\r
**/\r
UINTN\r
ArchGetIdtHandler (\r
  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry\r
  )\r
{\r
  return (UINTN)IdtEntry->Bits.OffsetLow + (((UINTN)IdtEntry->Bits.OffsetHigh) << 16);\r
}\r
\r
/**\r
  Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.\r
\r
  @param[in] ExceptionType        Exception type.\r
  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.\r
  @param[in] ExceptionHandlerData Pointer to exception handler data.\r
**/\r
VOID\r
ArchSaveExceptionContext (\r
  IN UINTN                        ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT           SystemContext,\r
  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData\r
  )\r
{\r
  IA32_EFLAGS32           Eflags;\r
  RESERVED_VECTORS_DATA   *ReservedVectors;\r
\r
  ReservedVectors = ExceptionHandlerData->ReservedVectors;\r
  //\r
  // Save Exception context in global variable\r
  //\r
  ReservedVectors[ExceptionType].OldFlags      = SystemContext.SystemContextIa32->Eflags;\r
  ReservedVectors[ExceptionType].OldCs         = SystemContext.SystemContextIa32->Cs;\r
  ReservedVectors[ExceptionType].OldIp         = SystemContext.SystemContextIa32->Eip;\r
  ReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextIa32->ExceptionData;\r
  //\r
  // Clear IF flag to avoid old IDT handler enable interrupt by IRET\r
  //\r
  Eflags.UintN = SystemContext.SystemContextIa32->Eflags;\r
  Eflags.Bits.IF = 0;\r
  SystemContext.SystemContextIa32->Eflags = Eflags.UintN;\r
  //\r
  // Modify the EIP in stack, then old IDT handler will return to the stub code\r
  //\r
  SystemContext.SystemContextIa32->Eip    = (UINTN) ReservedVectors[ExceptionType].HookAfterStubHeaderCode;\r
}\r
\r
/**\r
  Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.\r
\r
  @param[in] ExceptionType        Exception type.\r
  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.\r
  @param[in] ExceptionHandlerData Pointer to exception handler data.\r
**/\r
VOID\r
ArchRestoreExceptionContext (\r
  IN UINTN                        ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT           SystemContext,\r
  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData\r
  )\r
{\r
  RESERVED_VECTORS_DATA   *ReservedVectors;\r
\r
  ReservedVectors = ExceptionHandlerData->ReservedVectors;\r
  SystemContext.SystemContextIa32->Eflags        = ReservedVectors[ExceptionType].OldFlags;\r
  SystemContext.SystemContextIa32->Cs            = ReservedVectors[ExceptionType].OldCs;\r
  SystemContext.SystemContextIa32->Eip           = ReservedVectors[ExceptionType].OldIp;\r
  SystemContext.SystemContextIa32->ExceptionData = ReservedVectors[ExceptionType].ExceptionData;\r
}\r
\r
/**\r
  Setup separate stack for given exceptions.\r
\r
  @param[in] StackSwitchData      Pointer to data required for setuping up\r
                                  stack switch.\r
\r
  @retval EFI_SUCCESS             The exceptions have been successfully\r
                                  initialized with new stack.\r
  @retval EFI_INVALID_PARAMETER   StackSwitchData contains invalid content.\r
\r
**/\r
EFI_STATUS\r
ArchSetupExcpetionStack (\r
  IN CPU_EXCEPTION_INIT_DATA      *StackSwitchData\r
  )\r
{\r
  IA32_DESCRIPTOR                   Gdtr;\r
  IA32_DESCRIPTOR                   Idtr;\r
  IA32_IDT_GATE_DESCRIPTOR          *IdtTable;\r
  IA32_TSS_DESCRIPTOR               *TssDesc;\r
  IA32_TASK_STATE_SEGMENT           *Tss;\r
  UINTN                             StackTop;\r
  UINTN                             Index;\r
  UINTN                             Vector;\r
  UINTN                             TssBase;\r
  UINTN                             GdtSize;\r
  EXCEPTION_HANDLER_TEMPLATE_MAP    TemplateMap;\r
\r
  if (StackSwitchData == NULL ||\r
      StackSwitchData->Ia32.Revision != CPU_EXCEPTION_INIT_DATA_REV ||\r
      StackSwitchData->Ia32.KnownGoodStackTop == 0 ||\r
      StackSwitchData->Ia32.KnownGoodStackSize == 0 ||\r
      StackSwitchData->Ia32.StackSwitchExceptions == NULL ||\r
      StackSwitchData->Ia32.StackSwitchExceptionNumber == 0 ||\r
      StackSwitchData->Ia32.StackSwitchExceptionNumber > CPU_EXCEPTION_NUM ||\r
      StackSwitchData->Ia32.GdtTable == NULL ||\r
      StackSwitchData->Ia32.IdtTable == NULL ||\r
      StackSwitchData->Ia32.ExceptionTssDesc == NULL ||\r
      StackSwitchData->Ia32.ExceptionTss == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  //\r
  // The caller is responsible for that the GDT table, no matter the existing\r
  // one or newly allocated, has enough space to hold descriptors for exception\r
  // task-state segments.\r
  //\r
  if (((UINTN)StackSwitchData->Ia32.GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc < (UINTN)(StackSwitchData->Ia32.GdtTable)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc + StackSwitchData->Ia32.ExceptionTssDescSize >\r
      ((UINTN)(StackSwitchData->Ia32.GdtTable) + StackSwitchData->Ia32.GdtTableSize)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  //\r
  // We need one descriptor and one TSS for current task and every exception\r
  // specified.\r
  //\r
  if (StackSwitchData->Ia32.ExceptionTssDescSize <\r
      sizeof (IA32_TSS_DESCRIPTOR) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  if (StackSwitchData->Ia32.ExceptionTssSize <\r
      sizeof (IA32_TASK_STATE_SEGMENT) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  TssDesc = StackSwitchData->Ia32.ExceptionTssDesc;\r
  Tss     = StackSwitchData->Ia32.ExceptionTss;\r
\r
  //\r
  // Initialize new GDT table and/or IDT table, if any\r
  //\r
  AsmReadIdtr (&Idtr);\r
  AsmReadGdtr (&Gdtr);\r
\r
  GdtSize = (UINTN)TssDesc +\r
            sizeof (IA32_TSS_DESCRIPTOR) *\r
            (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1) -\r
            (UINTN)(StackSwitchData->Ia32.GdtTable);\r
  if ((UINTN)StackSwitchData->Ia32.GdtTable != Gdtr.Base) {\r
    CopyMem (StackSwitchData->Ia32.GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);\r
    Gdtr.Base = (UINTN)StackSwitchData->Ia32.GdtTable;\r
    Gdtr.Limit = (UINT16)GdtSize - 1;\r
  }\r
\r
  if ((UINTN)StackSwitchData->Ia32.IdtTable != Idtr.Base) {\r
    Idtr.Base = (UINTN)StackSwitchData->Ia32.IdtTable;\r
  }\r
  if (StackSwitchData->Ia32.IdtTableSize > 0) {\r
    Idtr.Limit = (UINT16)(StackSwitchData->Ia32.IdtTableSize - 1);\r
  }\r
\r
  //\r
  // Fixup current task descriptor. Task-state segment for current task will\r
  // be filled by processor during task switching.\r
  //\r
  TssBase = (UINTN)Tss;\r
\r
  TssDesc->Bits.LimitLow   = sizeof(IA32_TASK_STATE_SEGMENT) - 1;\r
  TssDesc->Bits.BaseLow    = (UINT16)TssBase;\r
  TssDesc->Bits.BaseMid    = (UINT8)(TssBase >> 16);\r
  TssDesc->Bits.Type       = IA32_GDT_TYPE_TSS;\r
  TssDesc->Bits.P          = 1;\r
  TssDesc->Bits.LimitHigh  = 0;\r
  TssDesc->Bits.BaseHigh   = (UINT8)(TssBase >> 24);\r
\r
  //\r
  // Fixup exception task descriptor and task-state segment\r
  //\r
  AsmGetTssTemplateMap (&TemplateMap);\r
  StackTop = StackSwitchData->Ia32.KnownGoodStackTop - CPU_STACK_ALIGNMENT;\r
  StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);\r
  IdtTable = StackSwitchData->Ia32.IdtTable;\r
  for (Index = 0; Index < StackSwitchData->Ia32.StackSwitchExceptionNumber; ++Index) {\r
    TssDesc += 1;\r
    Tss     += 1;\r
\r
    //\r
    // Fixup TSS descriptor\r
    //\r
    TssBase = (UINTN)Tss;\r
\r
    TssDesc->Bits.LimitLow  = sizeof(IA32_TASK_STATE_SEGMENT) - 1;\r
    TssDesc->Bits.BaseLow   = (UINT16)TssBase;\r
    TssDesc->Bits.BaseMid   = (UINT8)(TssBase >> 16);\r
    TssDesc->Bits.Type      = IA32_GDT_TYPE_TSS;\r
    TssDesc->Bits.P         = 1;\r
    TssDesc->Bits.LimitHigh = 0;\r
    TssDesc->Bits.BaseHigh  = (UINT8)(TssBase >> 24);\r
\r
    //\r
    // Fixup TSS\r
    //\r
    Vector = StackSwitchData->Ia32.StackSwitchExceptions[Index];\r
    if (Vector >= CPU_EXCEPTION_NUM ||\r
        Vector >= (Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR)) {\r
      continue;\r
    }\r
\r
    Tss->EIP    = (UINT32)(TemplateMap.ExceptionStart\r
                           + Vector * TemplateMap.ExceptionStubHeaderSize);\r
    Tss->EFLAGS = 0x2;\r
    Tss->ESP    = StackTop;\r
    Tss->CR3    = AsmReadCr3 ();\r
    Tss->ES     = AsmReadEs ();\r
    Tss->CS     = AsmReadCs ();\r
    Tss->SS     = AsmReadSs ();\r
    Tss->DS     = AsmReadDs ();\r
    Tss->FS     = AsmReadFs ();\r
    Tss->GS     = AsmReadGs ();\r
\r
    StackTop   -= StackSwitchData->Ia32.KnownGoodStackSize;\r
\r
    //\r
    // Update IDT to use Task Gate for given exception\r
    //\r
    IdtTable[Vector].Bits.OffsetLow  = 0;\r
    IdtTable[Vector].Bits.Selector   = (UINT16)((UINTN)TssDesc - Gdtr.Base);\r
    IdtTable[Vector].Bits.Reserved_0 = 0;\r
    IdtTable[Vector].Bits.GateType   = IA32_IDT_GATE_TYPE_TASK;\r
    IdtTable[Vector].Bits.OffsetHigh = 0;\r
  }\r
\r
  //\r
  // Publish GDT\r
  //\r
  AsmWriteGdtr (&Gdtr);\r
\r
  //\r
  // Load current task\r
  //\r
  AsmWriteTr ((UINT16)((UINTN)StackSwitchData->Ia32.ExceptionTssDesc - Gdtr.Base));\r
\r
  //\r
  // Publish IDT\r
  //\r
  AsmWriteIdtr (&Idtr);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Display processor context.\r
\r
  @param[in] ExceptionType  Exception type.\r
  @param[in] SystemContext  Processor context to be display.\r
**/\r
VOID\r
EFIAPI\r
DumpCpuContext (\r
  IN EFI_EXCEPTION_TYPE   ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT   SystemContext\r
  )\r
{\r
  InternalPrintMessage (\r
    "!!!! IA32 Exception Type - %02x(%a)  CPU Apic ID - %08x !!!!\n",\r
    ExceptionType,\r
    GetExceptionNameStr (ExceptionType),\r
    GetApicId ()\r
    );\r
  if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {\r
    InternalPrintMessage (\r
      "ExceptionData - %08x",\r
      SystemContext.SystemContextIa32->ExceptionData\r
      );\r
    if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {\r
      InternalPrintMessage (\r
        "  I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",\r
        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID)   != 0,\r
        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US)   != 0,\r
        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR)   != 0,\r
        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P)    != 0,\r
        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK)   != 0,\r
        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SGX)  != 0\r
        );\r
    }\r
    InternalPrintMessage ("\n");\r
  }\r
  InternalPrintMessage (\r
    "EIP  - %08x, CS  - %08x, EFLAGS - %08x\n",\r
    SystemContext.SystemContextIa32->Eip,\r
    SystemContext.SystemContextIa32->Cs,\r
    SystemContext.SystemContextIa32->Eflags\r
    );\r
  InternalPrintMessage (\r
    "EAX  - %08x, ECX - %08x, EDX - %08x, EBX - %08x\n",\r
    SystemContext.SystemContextIa32->Eax,\r
    SystemContext.SystemContextIa32->Ecx,\r
    SystemContext.SystemContextIa32->Edx,\r
    SystemContext.SystemContextIa32->Ebx\r
    );\r
  InternalPrintMessage (\r
    "ESP  - %08x, EBP - %08x, ESI - %08x, EDI - %08x\n",\r
    SystemContext.SystemContextIa32->Esp,\r
    SystemContext.SystemContextIa32->Ebp,\r
    SystemContext.SystemContextIa32->Esi,\r
    SystemContext.SystemContextIa32->Edi\r
    );\r
  InternalPrintMessage (\r
    "DS   - %08x, ES  - %08x, FS  - %08x, GS  - %08x, SS - %08x\n",\r
    SystemContext.SystemContextIa32->Ds,\r
    SystemContext.SystemContextIa32->Es,\r
    SystemContext.SystemContextIa32->Fs,\r
    SystemContext.SystemContextIa32->Gs,\r
    SystemContext.SystemContextIa32->Ss\r
    );\r
  InternalPrintMessage (\r
    "CR0  - %08x, CR2 - %08x, CR3 - %08x, CR4 - %08x\n",\r
    SystemContext.SystemContextIa32->Cr0,\r
    SystemContext.SystemContextIa32->Cr2,\r
    SystemContext.SystemContextIa32->Cr3,\r
    SystemContext.SystemContextIa32->Cr4\r
    );\r
  InternalPrintMessage (\r
    "DR0  - %08x, DR1 - %08x, DR2 - %08x, DR3 - %08x\n",\r
    SystemContext.SystemContextIa32->Dr0,\r
    SystemContext.SystemContextIa32->Dr1,\r
    SystemContext.SystemContextIa32->Dr2,\r
    SystemContext.SystemContextIa32->Dr3\r
    );\r
  InternalPrintMessage (\r
    "DR6  - %08x, DR7 - %08x\n",\r
    SystemContext.SystemContextIa32->Dr6,\r
    SystemContext.SystemContextIa32->Dr7\r
    );\r
  InternalPrintMessage (\r
    "GDTR - %08x %08x, IDTR - %08x %08x\n",\r
    SystemContext.SystemContextIa32->Gdtr[0],\r
    SystemContext.SystemContextIa32->Gdtr[1],\r
    SystemContext.SystemContextIa32->Idtr[0],\r
    SystemContext.SystemContextIa32->Idtr[1]\r
    );\r
  InternalPrintMessage (\r
    "LDTR - %08x, TR - %08x\n",\r
    SystemContext.SystemContextIa32->Ldtr,\r
    SystemContext.SystemContextIa32->Tr\r
    );\r
  InternalPrintMessage (\r
    "FXSAVE_STATE - %08x\n",\r
    &SystemContext.SystemContextIa32->FxSaveState\r
    );\r
}\r
\r
/**\r
  Display CPU information.\r
\r
  @param ExceptionType  Exception type.\r
  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.\r
**/\r
VOID\r
DumpImageAndCpuContent (\r
  IN EFI_EXCEPTION_TYPE   ExceptionType,\r
  IN EFI_SYSTEM_CONTEXT   SystemContext\r
  )\r
{\r
  DumpCpuContext (ExceptionType, SystemContext);\r
  //\r
  // Dump module image base and module entry point by EIP\r
  //\r
  DumpModuleImageInfo (SystemContext.SystemContextIa32->Eip);\r
}\r
Commit	Line	Data
8f07f895	1	/** @file\r
e3644786	2	IA32 CPU Exception Handler functons.\r
8f07f895	3	\r
1b2f7b3e	4	Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>\r
8f07f895	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include "CpuExceptionCommon.h"\r
	16	\r
	17	/**\r
e41aad15 JF	18	Return address map of exception handler template so that C code can generate\r
	19	exception tables.\r
	20	\r
	21	@param IdtEntry Pointer to IDT entry to be updated.\r
	22	@param InterruptHandler IDT handler value.\r
8f07f895	23	\r
	24	**/\r
	25	VOID\r
e41aad15 JF	26	ArchUpdateIdtEntry (\r
	27	IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry,\r
	28	IN UINTN InterruptHandler\r
	29	)\r
	30	{\r
	31	IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;\r
	32	IdtEntry->Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);\r
	33	IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
	34	}\r
	35	\r
	36	/**\r
	37	Read IDT handler value from IDT entry.\r
	38	\r
	39	@param IdtEntry Pointer to IDT entry to be read.\r
	40	\r
	41	**/\r
	42	UINTN\r
	43	ArchGetIdtHandler (\r
	44	IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry\r
8f07f895	45	)\r
8f07f895	46	{\r
e41aad15 JF	47	return (UINTN)IdtEntry->Bits.OffsetLow + (((UINTN)IdtEntry->Bits.OffsetHigh) << 16);\r
	48	}\r
	49	\r
	50	/**\r
	51	Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.\r
8f07f895	52	\r
81b21fc2 JF	53	@param[in] ExceptionType Exception type.\r
	54	@param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
	55	@param[in] ExceptionHandlerData Pointer to exception handler data.\r
e41aad15 JF	56	**/\r
	57	VOID\r
	58	ArchSaveExceptionContext (\r
81b21fc2 JF	59	IN UINTN ExceptionType,\r
	60	IN EFI_SYSTEM_CONTEXT SystemContext,\r
	61	IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData\r
e41aad15 JF	62	)\r
	63	{\r
	64	IA32_EFLAGS32 Eflags;\r
81b21fc2 JF	65	RESERVED_VECTORS_DATA *ReservedVectors;\r
	66	\r
	67	ReservedVectors = ExceptionHandlerData->ReservedVectors;\r
8f07f895	68	//\r
e41aad15	69	// Save Exception context in global variable\r
8f07f895	70	//\r
81b21fc2 JF	71	ReservedVectors[ExceptionType].OldFlags = SystemContext.SystemContextIa32->Eflags;\r
	72	ReservedVectors[ExceptionType].OldCs = SystemContext.SystemContextIa32->Cs;\r
	73	ReservedVectors[ExceptionType].OldIp = SystemContext.SystemContextIa32->Eip;\r
	74	ReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextIa32->ExceptionData;\r
e41aad15 JF	75	//\r
e41aad15 JF	76	// Clear IF flag to avoid old IDT handler enable interrupt by IRET\r
8f07f895	77	//\r
e41aad15	78	Eflags.UintN = SystemContext.SystemContextIa32->Eflags;\r
dd563742	79	Eflags.Bits.IF = 0;\r
e41aad15	80	SystemContext.SystemContextIa32->Eflags = Eflags.UintN;\r
8f07f895	81	//\r
e41aad15 JF	82	// Modify the EIP in stack, then old IDT handler will return to the stub code\r
e41aad15 JF	83	//\r
81b21fc2	84	SystemContext.SystemContextIa32->Eip = (UINTN) ReservedVectors[ExceptionType].HookAfterStubHeaderCode;\r
e41aad15	85	}\r
8f07f895	86	\r
e41aad15 JF	87	/**\r
e41aad15 JF	88	Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.\r
8f07f895	89	\r
368c54e7 JF	90	@param[in] ExceptionType Exception type.\r
	91	@param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
	92	@param[in] ExceptionHandlerData Pointer to exception handler data.\r
e41aad15 JF	93	**/\r
	94	VOID\r
	95	ArchRestoreExceptionContext (\r
368c54e7 JF	96	IN UINTN ExceptionType,\r
	97	IN EFI_SYSTEM_CONTEXT SystemContext,\r
	98	IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData\r
e41aad15 JF	99	)\r
e41aad15 JF	100	{\r
368c54e7 JF	101	RESERVED_VECTORS_DATA *ReservedVectors;\r
	102	\r
	103	ReservedVectors = ExceptionHandlerData->ReservedVectors;\r
	104	SystemContext.SystemContextIa32->Eflags = ReservedVectors[ExceptionType].OldFlags;\r
	105	SystemContext.SystemContextIa32->Cs = ReservedVectors[ExceptionType].OldCs;\r
	106	SystemContext.SystemContextIa32->Eip = ReservedVectors[ExceptionType].OldIp;\r
	107	SystemContext.SystemContextIa32->ExceptionData = ReservedVectors[ExceptionType].ExceptionData;\r
8f07f895	108	}\r
8f07f895	109	\r
0ff5aa9c JW	110	/**\r
	111	Setup separate stack for given exceptions.\r
	112	\r
	113	@param[in] StackSwitchData Pointer to data required for setuping up\r
	114	stack switch.\r
	115	\r
	116	@retval EFI_SUCCESS The exceptions have been successfully\r
	117	initialized with new stack.\r
	118	@retval EFI_INVALID_PARAMETER StackSwitchData contains invalid content.\r
	119	\r
	120	**/\r
	121	EFI_STATUS\r
	122	ArchSetupExcpetionStack (\r
	123	IN CPU_EXCEPTION_INIT_DATA *StackSwitchData\r
	124	)\r
	125	{\r
	126	IA32_DESCRIPTOR Gdtr;\r
	127	IA32_DESCRIPTOR Idtr;\r
	128	IA32_IDT_GATE_DESCRIPTOR *IdtTable;\r
	129	IA32_TSS_DESCRIPTOR *TssDesc;\r
	130	IA32_TASK_STATE_SEGMENT *Tss;\r
	131	UINTN StackTop;\r
	132	UINTN Index;\r
	133	UINTN Vector;\r
	134	UINTN TssBase;\r
	135	UINTN GdtSize;\r
	136	EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap;\r
	137	\r
	138	if (StackSwitchData == NULL \|\|\r
	139	StackSwitchData->Ia32.Revision != CPU_EXCEPTION_INIT_DATA_REV \|\|\r
	140	StackSwitchData->Ia32.KnownGoodStackTop == 0 \|\|\r
	141	StackSwitchData->Ia32.KnownGoodStackSize == 0 \|\|\r
	142	StackSwitchData->Ia32.StackSwitchExceptions == NULL \|\|\r
	143	StackSwitchData->Ia32.StackSwitchExceptionNumber == 0 \|\|\r
	144	StackSwitchData->Ia32.StackSwitchExceptionNumber > CPU_EXCEPTION_NUM \|\|\r
	145	StackSwitchData->Ia32.GdtTable == NULL \|\|\r
	146	StackSwitchData->Ia32.IdtTable == NULL \|\|\r
	147	StackSwitchData->Ia32.ExceptionTssDesc == NULL \|\|\r
	148	StackSwitchData->Ia32.ExceptionTss == NULL) {\r
	149	return EFI_INVALID_PARAMETER;\r
	150	}\r
	151	\r
	152	//\r
	153	// The caller is responsible for that the GDT table, no matter the existing\r
	154	// one or newly allocated, has enough space to hold descriptors for exception\r
	155	// task-state segments.\r
	156	//\r
	157	if (((UINTN)StackSwitchData->Ia32.GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {\r
	158	return EFI_INVALID_PARAMETER;\r
	159	}\r
	160	\r
	161	if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc < (UINTN)(StackSwitchData->Ia32.GdtTable)) {\r
	162	return EFI_INVALID_PARAMETER;\r
	163	}\r
	164	\r
	165	if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc + StackSwitchData->Ia32.ExceptionTssDescSize >\r
	166	((UINTN)(StackSwitchData->Ia32.GdtTable) + StackSwitchData->Ia32.GdtTableSize)) {\r
	167	return EFI_INVALID_PARAMETER;\r
	168	}\r
	169	\r
	170	//\r
	171	// We need one descriptor and one TSS for current task and every exception\r
	172	// specified.\r
	173	//\r
174	if (StackSwitchData->Ia32.ExceptionTssDescSize <\r
175	sizeof (IA32_TSS_DESCRIPTOR) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1)) {\r
176	return EFI_INVALID_PARAMETER;\r
177	}\r
178	if (StackSwitchData->Ia32.ExceptionTssSize <\r
179	sizeof (IA32_TASK_STATE_SEGMENT) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1)) {\r
180	return EFI_INVALID_PARAMETER;\r
181	}\r
182	\r
183	TssDesc = StackSwitchData->Ia32.ExceptionTssDesc;\r
184	Tss = StackSwitchData->Ia32.ExceptionTss;\r
185	\r
186	//\r
187	// Initialize new GDT table and/or IDT table, if any\r
188	//\r
189	AsmReadIdtr (&Idtr);\r
190	AsmReadGdtr (&Gdtr);\r
191	\r
192	GdtSize = (UINTN)TssDesc +\r
193	sizeof (IA32_TSS_DESCRIPTOR) *\r
194	(StackSwitchData->Ia32.StackSwitchExceptionNumber + 1) -\r
195	(UINTN)(StackSwitchData->Ia32.GdtTable);\r
196	if ((UINTN)StackSwitchData->Ia32.GdtTable != Gdtr.Base) {\r
197	CopyMem (StackSwitchData->Ia32.GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);\r
198	Gdtr.Base = (UINTN)StackSwitchData->Ia32.GdtTable;\r
199	Gdtr.Limit = (UINT16)GdtSize - 1;\r
200	}\r
201	\r
202	if ((UINTN)StackSwitchData->Ia32.IdtTable != Idtr.Base) {\r
203	Idtr.Base = (UINTN)StackSwitchData->Ia32.IdtTable;\r
204	}\r
205	if (StackSwitchData->Ia32.IdtTableSize > 0) {\r
206	Idtr.Limit = (UINT16)(StackSwitchData->Ia32.IdtTableSize - 1);\r
207	}\r
208	\r
209	//\r
210	// Fixup current task descriptor. Task-state segment for current task will\r
211	// be filled by processor during task switching.\r
212	//\r
213	TssBase = (UINTN)Tss;\r
214	\r
215	TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1;\r
216	TssDesc->Bits.BaseLow = (UINT16)TssBase;\r
217	TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);\r
218	TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;\r
219	TssDesc->Bits.P = 1;\r
220	TssDesc->Bits.LimitHigh = 0;\r
221	TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);\r
222	\r
223	//\r
224	// Fixup exception task descriptor and task-state segment\r
225	//\r
226	AsmGetTssTemplateMap (&TemplateMap);\r
227	StackTop = StackSwitchData->Ia32.KnownGoodStackTop - CPU_STACK_ALIGNMENT;\r
228	StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);\r
229	IdtTable = StackSwitchData->Ia32.IdtTable;\r
230	for (Index = 0; Index < StackSwitchData->Ia32.StackSwitchExceptionNumber; ++Index) {\r
231	TssDesc += 1;\r
232	Tss += 1;\r
233	\r
234	//\r
235	// Fixup TSS descriptor\r
236	//\r
237	TssBase = (UINTN)Tss;\r
238	\r
239	TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1;\r
240	TssDesc->Bits.BaseLow = (UINT16)TssBase;\r
241	TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);\r
242	TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;\r
243	TssDesc->Bits.P = 1;\r
244	TssDesc->Bits.LimitHigh = 0;\r
245	TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);\r
246	\r
247	//\r
248	// Fixup TSS\r
249	//\r
250	Vector = StackSwitchData->Ia32.StackSwitchExceptions[Index];\r
251	if (Vector >= CPU_EXCEPTION_NUM \|\|\r
252	Vector >= (Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR)) {\r
253	continue;\r
254	}\r
255	\r
256	Tss->EIP = (UINT32)(TemplateMap.ExceptionStart\r
257	+ Vector * TemplateMap.ExceptionStubHeaderSize);\r
258	Tss->EFLAGS = 0x2;\r
259	Tss->ESP = StackTop;\r
260	Tss->CR3 = AsmReadCr3 ();\r
261	Tss->ES = AsmReadEs ();\r
262	Tss->CS = AsmReadCs ();\r
263	Tss->SS = AsmReadSs ();\r
264	Tss->DS = AsmReadDs ();\r
265	Tss->FS = AsmReadFs ();\r
266	Tss->GS = AsmReadGs ();\r
267	\r
268	StackTop -= StackSwitchData->Ia32.KnownGoodStackSize;\r
269	\r
270	//\r
271	// Update IDT to use Task Gate for given exception\r
272	//\r
273	IdtTable[Vector].Bits.OffsetLow = 0;\r
274	IdtTable[Vector].Bits.Selector = (UINT16)((UINTN)TssDesc - Gdtr.Base);\r
275	IdtTable[Vector].Bits.Reserved_0 = 0;\r
276	IdtTable[Vector].Bits.GateType = IA32_IDT_GATE_TYPE_TASK;\r
277	IdtTable[Vector].Bits.OffsetHigh = 0;\r
278	}\r
279	\r
280	//\r
281	// Publish GDT\r
282	//\r
283	AsmWriteGdtr (&Gdtr);\r
284	\r
285	//\r
286	// Load current task\r
287	//\r
288	AsmWriteTr ((UINT16)((UINTN)StackSwitchData->Ia32.ExceptionTssDesc - Gdtr.Base));\r
289	\r
290	//\r
291	// Publish IDT\r
292	//\r
293	AsmWriteIdtr (&Idtr);\r
294	\r
295	return EFI_SUCCESS;\r
296	}\r
297	\r
8f07f895	298	/**\r
1b2f7b3e	299	Display processor context.\r
8f07f895	300	\r
1b2f7b3e JF	301	@param[in] ExceptionType Exception type.\r
1b2f7b3e JF	302	@param[in] SystemContext Processor context to be display.\r
8f07f895	303	**/\r
8f07f895	304	VOID\r
1b2f7b3e JF	305	EFIAPI\r
1b2f7b3e JF	306	DumpCpuContext (\r
e41aad15	307	IN EFI_EXCEPTION_TYPE ExceptionType,\r
8f07f895	308	IN EFI_SYSTEM_CONTEXT SystemContext\r
	309	)\r
	310	{\r
8f07f895	311	InternalPrintMessage (\r
a51ee144	312	"!!!! IA32 Exception Type - %02x(%a) CPU Apic ID - %08x !!!!\n",\r
8f07f895	313	ExceptionType,\r
a51ee144	314	GetExceptionNameStr (ExceptionType),\r
8f07f895	315	GetApicId ()\r
8f07f895	316	);\r
1b2f7b3e JF	317	if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {\r
	318	InternalPrintMessage (\r
	319	"ExceptionData - %08x",\r
	320	SystemContext.SystemContextIa32->ExceptionData\r
	321	);\r
	322	if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {\r
	323	InternalPrintMessage (\r
	324	" I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",\r
	325	(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0,\r
	326	(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
	327	(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != 0,\r
	328	(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != 0,\r
	329	(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != 0,\r
	330	(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK) != 0,\r
	331	(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SGX) != 0\r
	332	);\r
	333	}\r
	334	InternalPrintMessage ("\n");\r
	335	}\r
8f07f895	336	InternalPrintMessage (\r
	337	"EIP - %08x, CS - %08x, EFLAGS - %08x\n",\r
	338	SystemContext.SystemContextIa32->Eip,\r
	339	SystemContext.SystemContextIa32->Cs,\r
	340	SystemContext.SystemContextIa32->Eflags\r
	341	);\r
8f07f895	342	InternalPrintMessage (\r
	343	"EAX - %08x, ECX - %08x, EDX - %08x, EBX - %08x\n",\r
	344	SystemContext.SystemContextIa32->Eax,\r
	345	SystemContext.SystemContextIa32->Ecx,\r
	346	SystemContext.SystemContextIa32->Edx,\r
	347	SystemContext.SystemContextIa32->Ebx\r
	348	);\r
	349	InternalPrintMessage (\r
	350	"ESP - %08x, EBP - %08x, ESI - %08x, EDI - %08x\n",\r
	351	SystemContext.SystemContextIa32->Esp,\r
	352	SystemContext.SystemContextIa32->Ebp,\r
	353	SystemContext.SystemContextIa32->Esi,\r
	354	SystemContext.SystemContextIa32->Edi\r
	355	);\r
	356	InternalPrintMessage (\r
	357	"DS - %08x, ES - %08x, FS - %08x, GS - %08x, SS - %08x\n",\r
	358	SystemContext.SystemContextIa32->Ds,\r
	359	SystemContext.SystemContextIa32->Es,\r
	360	SystemContext.SystemContextIa32->Fs,\r
	361	SystemContext.SystemContextIa32->Gs,\r
	362	SystemContext.SystemContextIa32->Ss\r
	363	);\r
	364	InternalPrintMessage (\r
	365	"CR0 - %08x, CR2 - %08x, CR3 - %08x, CR4 - %08x\n",\r
	366	SystemContext.SystemContextIa32->Cr0,\r
	367	SystemContext.SystemContextIa32->Cr2,\r
	368	SystemContext.SystemContextIa32->Cr3,\r
	369	SystemContext.SystemContextIa32->Cr4\r
	370	);\r
	371	InternalPrintMessage (\r
	372	"DR0 - %08x, DR1 - %08x, DR2 - %08x, DR3 - %08x\n",\r
	373	SystemContext.SystemContextIa32->Dr0,\r
	374	SystemContext.SystemContextIa32->Dr1,\r
	375	SystemContext.SystemContextIa32->Dr2,\r
	376	SystemContext.SystemContextIa32->Dr3\r
	377	);\r
	378	InternalPrintMessage (\r
	379	"DR6 - %08x, DR7 - %08x\n",\r
	380	SystemContext.SystemContextIa32->Dr6,\r
	381	SystemContext.SystemContextIa32->Dr7\r
	382	);\r
	383	InternalPrintMessage (\r
	384	"GDTR - %08x %08x, IDTR - %08x %08x\n",\r
	385	SystemContext.SystemContextIa32->Gdtr[0],\r
	386	SystemContext.SystemContextIa32->Gdtr[1],\r
	387	SystemContext.SystemContextIa32->Idtr[0],\r
	388	SystemContext.SystemContextIa32->Idtr[1]\r
	389	);\r
	390	InternalPrintMessage (\r
	391	"LDTR - %08x, TR - %08x\n",\r
	392	SystemContext.SystemContextIa32->Ldtr,\r
	393	SystemContext.SystemContextIa32->Tr\r
	394	);\r
	395	InternalPrintMessage (\r
	396	"FXSAVE_STATE - %08x\n",\r
	397	&SystemContext.SystemContextIa32->FxSaveState\r
	398	);\r
1b2f7b3e JF	399	}\r
	400	\r
	401	/**\r
	402	Display CPU information.\r
8f07f895	403	\r
1b2f7b3e JF	404	@param ExceptionType Exception type.\r
	405	@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
	406	**/\r
	407	VOID\r
	408	DumpImageAndCpuContent (\r
	409	IN EFI_EXCEPTION_TYPE ExceptionType,\r
	410	IN EFI_SYSTEM_CONTEXT SystemContext\r
	411	)\r
	412	{\r
	413	DumpCpuContext (ExceptionType, SystemContext);\r
8f07f895	414	//\r
1b2f7b3e	415	// Dump module image base and module entry point by EIP\r
8f07f895	416	//\r
1b2f7b3e	417	DumpModuleImageInfo (SystemContext.SystemContextIa32->Eip);\r
8f07f895	418	}\r