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e41aad15 JF |
1 | /** @file\r |
2 | X64 arch definition for CPU Exception Handler Library.\r | |
3 | \r | |
4 | Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r | |
0acd8697 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
e41aad15 JF |
6 | \r |
7 | **/\r | |
8 | \r | |
9 | #ifndef _ARCH_CPU_INTERRUPT_DEFS_H_\r | |
10 | #define _ARCH_CPU_INTERRUPT_DEFS_H_\r | |
11 | \r | |
12 | typedef struct {\r | |
13 | EFI_SYSTEM_CONTEXT_X64 SystemContext;\r | |
14 | BOOLEAN ExceptionDataFlag;\r | |
15 | UINTN OldIdtHandler;\r | |
16 | } EXCEPTION_HANDLER_CONTEXT;\r | |
17 | \r | |
18 | //\r | |
19 | // Register Structure Definitions\r | |
20 | //\r | |
21 | typedef struct {\r | |
22 | EFI_STATUS_CODE_DATA Header;\r | |
23 | EFI_SYSTEM_CONTEXT_X64 SystemContext;\r | |
24 | } CPU_STATUS_CODE_TEMPLATE;\r | |
25 | \r | |
26 | typedef struct {\r | |
27 | SPIN_LOCK SpinLock;\r | |
28 | UINT32 ApicId;\r | |
29 | UINT32 Attribute;\r | |
30 | UINTN ExceptonHandler;\r | |
31 | UINTN OldSs;\r | |
32 | UINTN OldSp;\r | |
33 | UINTN OldFlags;\r | |
34 | UINTN OldCs;\r | |
35 | UINTN OldIp;\r | |
36 | UINTN ExceptionData;\r | |
37 | UINT8 HookAfterStubHeaderCode[HOOKAFTER_STUB_SIZE];\r | |
38 | } RESERVED_VECTORS_DATA;\r | |
39 | \r | |
0ff5aa9c JW |
40 | #define CPU_TSS_DESC_SIZE sizeof (IA32_TSS_DESCRIPTOR)\r |
41 | #define CPU_TSS_SIZE sizeof (IA32_TASK_STATE_SEGMENT)\r | |
42 | \r | |
e41aad15 | 43 | #endif\r |