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Fix bug when reserve stack space to fill exception context.
[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / X64 / ExceptionHandlerAsm.S
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8f07f895 1#------------------------------------------------------------------------------ ;\r
554dddfc 2# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>\r
8f07f895 3# This program and the accompanying materials\r
4# are licensed and made available under the terms and conditions of the BSD License\r
5# which accompanies this distribution. The full text of the license may be found at\r
6# http://opensource.org/licenses/bsd-license.php.\r
7#\r
8# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
9# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
10#\r
11# Module Name:\r
12#\r
13# ExceptionHandlerAsm.S\r
14#\r
15# Abstract:\r
16#\r
17# x64 CPU Exception Handler\r
18#\r
19# Notes:\r
20#\r
21#------------------------------------------------------------------------------\r
22\r
23\r
8f07f895 24\r
25ASM_GLOBAL ASM_PFX(CommonExceptionHandler)\r
26ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
e41aad15 27ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
8f07f895 28\r
e41aad15
JF		 29#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions\r
30#EXTRN ASM_PFX(mDoFarReturnFlag):QWORD # Do far return flag\r
8f07f895 31.text\r
32\r
33#\r
e41aad15 34# exception handler stub table\r
8f07f895 35#\r
36Exception0Handle:\r
e41aad15
JF		 37 .byte 0x6a # push #VectorNum\r
38 .byte 0\r
39 pushq %rax\r
40 .byte 0x48, 0xB8\r
41 .quad ASM_PFX(CommonInterruptEntry)\r
42 jmp *%rax\r
8f07f895 43Exception1Handle:\r
e41aad15
JF		 44 .byte 0x6a # push #VectorNum\r
45 .byte 1\r
46 pushq %rax\r
47 .byte 0x48, 0xB8\r
48 .quad ASM_PFX(CommonInterruptEntry)\r
49 jmp *%rax\r
8f07f895 50Exception2Handle:\r
e41aad15
JF		 51 .byte 0x6a # push #VectorNum\r
52 .byte 2\r
53 pushq %rax\r
54 .byte 0x48, 0xB8\r
55 .quad ASM_PFX(CommonInterruptEntry)\r
56 jmp *%rax\r
8f07f895 57Exception3Handle:\r
e41aad15
JF		 58 .byte 0x6a # push #VectorNum\r
59 .byte 3\r
60 pushq %rax\r
61 .byte 0x48, 0xB8\r
62 .quad ASM_PFX(CommonInterruptEntry)\r
63 jmp *%rax\r
8f07f895 64Exception4Handle:\r
e41aad15
JF		 65 .byte 0x6a # push #VectorNum\r
66 .byte 4\r
67 pushq %rax\r
68 .byte 0x48, 0xB8\r
69 .quad ASM_PFX(CommonInterruptEntry)\r
70 jmp *%rax\r
8f07f895 71Exception5Handle:\r
e41aad15
JF		 72 .byte 0x6a # push #VectorNum\r
73 .byte 5\r
74 pushq %rax\r
75 .byte 0x48, 0xB8\r
76 .quad ASM_PFX(CommonInterruptEntry)\r
77 jmp *%rax\r
8f07f895 78Exception6Handle:\r
e41aad15
JF		 79 .byte 0x6a # push #VectorNum\r
80 .byte 6\r
81 pushq %rax\r
82 .byte 0x48, 0xB8\r
83 .quad ASM_PFX(CommonInterruptEntry)\r
84 jmp *%rax\r
8f07f895 85Exception7Handle:\r
e41aad15
JF		 86 .byte 0x6a # push #VectorNum\r
87 .byte 7\r
88 pushq %rax\r
89 .byte 0x48, 0xB8\r
90 .quad ASM_PFX(CommonInterruptEntry)\r
91 jmp *%rax\r
8f07f895 92Exception8Handle:\r
e41aad15
JF		 93 .byte 0x6a # push #VectorNum\r
94 .byte 8\r
95 pushq %rax\r
96 .byte 0x48, 0xB8\r
97 .quad ASM_PFX(CommonInterruptEntry)\r
98 jmp *%rax\r
8f07f895 99Exception9Handle:\r
e41aad15
JF		 100 .byte 0x6a # push #VectorNum\r
101 .byte 9\r
102 pushq %rax\r
103 .byte 0x48, 0xB8\r
104 .quad ASM_PFX(CommonInterruptEntry)\r
105 jmp *%rax\r
8f07f895 106Exception10Handle:\r
e41aad15
JF		 107 .byte 0x6a # push #VectorNum\r
108 .byte 10\r
109 pushq %rax\r
110 .byte 0x48, 0xB8\r
111 .quad ASM_PFX(CommonInterruptEntry)\r
112 jmp *%rax\r
8f07f895 113Exception11Handle:\r
e41aad15
JF		 114 .byte 0x6a # push #VectorNum\r
115 .byte 11\r
116 pushq %rax\r
117 .byte 0x48, 0xB8\r
118 .quad ASM_PFX(CommonInterruptEntry)\r
119 jmp *%rax\r
8f07f895 120Exception12Handle:\r
e41aad15
JF		 121 .byte 0x6a # push #VectorNum\r
122 .byte 12\r
123 pushq %rax\r
124 .byte 0x48, 0xB8\r
125 .quad ASM_PFX(CommonInterruptEntry)\r
126 jmp *%rax\r
8f07f895 127Exception13Handle:\r
e41aad15
JF		 128 .byte 0x6a # push #VectorNum\r
129 .byte 13\r
130 pushq %rax\r
131 .byte 0x48, 0xB8\r
132 .quad ASM_PFX(CommonInterruptEntry)\r
133 jmp *%rax\r
8f07f895 134Exception14Handle:\r
e41aad15
JF		 135 .byte 0x6a # push #VectorNum\r
136 .byte 14\r
137 pushq %rax\r
138 .byte 0x48, 0xB8\r
139 .quad ASM_PFX(CommonInterruptEntry)\r
140 jmp *%rax\r
8f07f895 141Exception15Handle:\r
e41aad15
JF		 142 .byte 0x6a # push #VectorNum\r
143 .byte 15\r
144 pushq %rax\r
145 .byte 0x48, 0xB8\r
146 .quad ASM_PFX(CommonInterruptEntry)\r
147 jmp *%rax\r
8f07f895 148Exception16Handle:\r
e41aad15
JF		 149 .byte 0x6a # push #VectorNum\r
150 .byte 16\r
151 pushq %rax\r
152 .byte 0x48, 0xB8\r
153 .quad ASM_PFX(CommonInterruptEntry)\r
154 jmp *%rax\r
8f07f895 155Exception17Handle:\r
e41aad15
JF		 156 .byte 0x6a # push #VectorNum\r
157 .byte 17\r
158 pushq %rax\r
159 .byte 0x48, 0xB8\r
160 .quad ASM_PFX(CommonInterruptEntry)\r
161 jmp *%rax\r
8f07f895 162Exception18Handle:\r
e41aad15
JF		 163 .byte 0x6a # push #VectorNum\r
164 .byte 18\r
165 pushq %rax\r
166 .byte 0x48, 0xB8\r
167 .quad ASM_PFX(CommonInterruptEntry)\r
168 jmp *%rax\r
8f07f895 169Exception19Handle:\r
e41aad15
JF		 170 .byte 0x6a # push #VectorNum\r
171 .byte 19\r
172 pushq %rax\r
173 .byte 0x48, 0xB8\r
174 .quad ASM_PFX(CommonInterruptEntry)\r
175 jmp *%rax\r
8f07f895 176Exception20Handle:\r
e41aad15
JF		 177 .byte 0x6a # push #VectorNum\r
178 .byte 20\r
179 pushq %rax\r
180 .byte 0x48, 0xB8\r
181 .quad ASM_PFX(CommonInterruptEntry)\r
182 jmp *%rax\r
8f07f895 183Exception21Handle:\r
e41aad15
JF		 184 .byte 0x6a # push #VectorNum\r
185 .byte 21\r
186 pushq %rax\r
187 .byte 0x48, 0xB8\r
188 .quad ASM_PFX(CommonInterruptEntry)\r
189 jmp *%rax\r
8f07f895 190Exception22Handle:\r
e41aad15
JF		 191 .byte 0x6a # push #VectorNum\r
192 .byte 22\r
193 pushq %rax\r
194 .byte 0x48, 0xB8\r
195 .quad ASM_PFX(CommonInterruptEntry)\r
196 jmp *%rax\r
8f07f895 197Exception23Handle:\r
e41aad15
JF		 198 .byte 0x6a # push #VectorNum\r
199 .byte 23\r
200 pushq %rax\r
201 .byte 0x48, 0xB8\r
202 .quad ASM_PFX(CommonInterruptEntry)\r
203 jmp *%rax\r
8f07f895 204Exception24Handle:\r
e41aad15
JF		 205 .byte 0x6a # push #VectorNum\r
206 .byte 24\r
207 pushq %rax\r
208 .byte 0x48, 0xB8\r
209 .quad ASM_PFX(CommonInterruptEntry)\r
210 jmp *%rax\r
8f07f895 211Exception25Handle:\r
e41aad15
JF		 212 .byte 0x6a # push #VectorNum\r
213 .byte 25\r
214 pushq %rax\r
215 .byte 0x48, 0xB8\r
216 .quad ASM_PFX(CommonInterruptEntry)\r
217 jmp *%rax\r
8f07f895 218Exception26Handle:\r
e41aad15
JF		 219 .byte 0x6a # push #VectorNum\r
220 .byte 26\r
221 pushq %rax\r
222 .byte 0x48, 0xB8\r
223 .quad ASM_PFX(CommonInterruptEntry)\r
224 jmp *%rax\r
8f07f895 225Exception27Handle:\r
e41aad15
JF		 226 .byte 0x6a # push #VectorNum\r
227 .byte 27\r
228 pushq %rax\r
229 .byte 0x48, 0xB8\r
230 .quad ASM_PFX(CommonInterruptEntry)\r
231 jmp *%rax\r
8f07f895 232Exception28Handle:\r
e41aad15
JF		 233 .byte 0x6a # push #VectorNum\r
234 .byte 28\r
235 pushq %rax\r
236 .byte 0x48, 0xB8\r
237 .quad ASM_PFX(CommonInterruptEntry)\r
238 jmp *%rax\r
8f07f895 239Exception29Handle:\r
e41aad15
JF		 240 .byte 0x6a # push #VectorNum\r
241 .byte 29\r
242 pushq %rax\r
243 .byte 0x48, 0xB8\r
244 .quad ASM_PFX(CommonInterruptEntry)\r
245 jmp *%rax\r
8f07f895 246Exception30Handle:\r
e41aad15
JF		 247 .byte 0x6a # push #VectorNum\r
248 .byte 30\r
249 pushq %rax\r
250 .byte 0x48, 0xB8\r
251 .quad ASM_PFX(CommonInterruptEntry)\r
252 jmp *%rax\r
8f07f895 253Exception31Handle:\r
e41aad15
JF		 254 .byte 0x6a # push #VectorNum\r
255 .byte 31\r
256 pushq %rax\r
257 .byte 0x48, 0xB8\r
258 .quad ASM_PFX(CommonInterruptEntry)\r
259 jmp *%rax\r
260 \r
261HookAfterStubHeaderBegin:\r
262 .byte 0x6a # push\r
263VectorNum:\r
264 .byte 0 # 0 will be fixed \r
265 pushq %rax\r
266 .byte 0x48, 0xB8 # movq ASM_PFX(HookAfterStubHeaderEnd), %rax\r
267 .quad ASM_PFX(HookAfterStubHeaderEnd)\r
268 jmp *%rax\r
269ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
270ASM_PFX(HookAfterStubHeaderEnd):\r
271 movq %rsp, %rax\r
554dddfc
JF		 272 andl $0x0fffffff0, %esp # make sure 16-byte aligned for exception context\r
273 subq $0x18, %rsp # reserve room for filling exception data later\r
e41aad15
JF		 274 pushq %rcx\r
275 movq 8(%rax), %rcx\r
eac8082e
LE		 276 pushq %rax\r
277 movabsl ASM_PFX(mErrorCodeFlag), %eax\r
278 bt %ecx, %eax\r
279 popq %rax\r
554dddfc 280 jnc NoErrorData\r
e41aad15
JF		 281 pushq (%rsp) # push additional rcx to make stack alignment\r
282NoErrorData:\r
283 xchgq (%rsp), %rcx # restore rcx, save Exception Number in stack\r
284 pushq (%rax) # push rax into stack to keep code consistence\r
8f07f895 285\r
286#---------------------------------------;\r
287# CommonInterruptEntry ;\r
288#---------------------------------------;\r
289# The follow algorithm is used for the common interrupt routine.\r
290\r
291ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
292ASM_PFX(CommonInterruptEntry):\r
293 cli\r
e41aad15 294 popq %rax\r
8f07f895 295 #\r
296 # All interrupt handlers are invoked through interrupt gates, so\r
297 # IF flag automatically cleared at the entry point\r
298 #\r
299 #\r
300 # Calculate vector number\r
301 #\r
e41aad15
JF		 302 xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.\r
303 andq $0x0FF, %rcx\r
8f07f895 304 cmp $32, %ecx # Intel reserved vector for exceptions?\r
305 jae NoErrorCode\r
306 pushq %rax\r
eac8082e
LE		 307 movabsl ASM_PFX(mErrorCodeFlag), %eax\r
308 bt %ecx, %eax\r
8f07f895 309 popq %rax\r
310 jc CommonInterruptEntry_al_0000\r
311\r
312NoErrorCode:\r
313\r
314 #\r
315 # Push a dummy error code on the stack\r
316 # to maintain coherent stack map\r
317 #\r
318 pushq (%rsp)\r
319 movq $0, 8(%rsp)\r
320CommonInterruptEntry_al_0000:\r
321 pushq %rbp\r
322 movq %rsp, %rbp\r
e41aad15
JF		 323 pushq $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
324 pushq $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
8f07f895 325\r
326 #\r
327 # Stack:\r
328 # +---------------------+ <-- 16-byte aligned ensured by processor\r
329 # + Old SS +\r
330 # +---------------------+\r
331 # + Old RSP +\r
332 # +---------------------+\r
333 # + RFlags +\r
334 # +---------------------+\r
335 # + CS +\r
336 # +---------------------+\r
337 # + RIP +\r
338 # +---------------------+\r
339 # + Error Code +\r
340 # +---------------------+\r
341 # + RCX / Vector Number +\r
342 # +---------------------+\r
343 # + RBP +\r
344 # +---------------------+ <-- RBP, 16-byte aligned\r
345 #\r
346\r
347\r
348 #\r
349 # Since here the stack pointer is 16-byte aligned, so\r
350 # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64\r
351 # is 16-byte aligned\r
352 #\r
353\r
354#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
355#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
356 pushq %r15\r
357 pushq %r14\r
358 pushq %r13\r
359 pushq %r12\r
360 pushq %r11\r
361 pushq %r10\r
362 pushq %r9\r
363 pushq %r8\r
364 pushq %rax\r
365 pushq 8(%rbp) # RCX\r
366 pushq %rdx\r
367 pushq %rbx\r
368 pushq 48(%rbp) # RSP\r
369 pushq (%rbp) # RBP\r
370 pushq %rsi\r
371 pushq %rdi\r
372\r
373#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
374 movzwq 56(%rbp), %rax\r
375 pushq %rax # for ss\r
376 movzwq 32(%rbp), %rax\r
377 pushq %rax # for cs\r
378 movl %ds, %eax\r
379 pushq %rax\r
380 movl %es, %eax\r
381 pushq %rax\r
382 movl %fs, %eax\r
383 pushq %rax\r
384 movl %gs, %eax\r
385 pushq %rax\r
386\r
387 movq %rcx, 8(%rbp) # save vector number\r
388\r
389#; UINT64 Rip;\r
390 pushq 24(%rbp)\r
391\r
392#; UINT64 Gdtr[2], Idtr[2];\r
393 xorq %rax, %rax\r
394 pushq %rax\r
395 pushq %rax\r
396 sidt (%rsp)\r
397 xchgq 2(%rsp), %rax\r
398 xchgq (%rsp), %rax\r
399 xchgq 8(%rsp), %rax\r
400\r
401 xorq %rax, %rax\r
402 pushq %rax\r
403 pushq %rax\r
404 sgdt (%rsp)\r
405 xchgq 2(%rsp), %rax\r
406 xchgq (%rsp), %rax\r
407 xchgq 8(%rsp), %rax\r
408\r
409#; UINT64 Ldtr, Tr;\r
410 xorq %rax, %rax\r
411 str %ax\r
412 pushq %rax\r
413 sldt %ax\r
414 pushq %rax\r
415\r
416#; UINT64 RFlags;\r
417 pushq 40(%rbp)\r
418\r
419#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
420 movq %cr8, %rax\r
421 pushq %rax\r
422 movq %cr4, %rax\r
423 orq $0x208, %rax \r
424 movq %rax, %cr4 \r
425 pushq %rax\r
426 mov %cr3, %rax \r
427 pushq %rax\r
428 mov %cr2, %rax \r
429 pushq %rax\r
430 xorq %rax, %rax\r
431 pushq %rax\r
432 mov %cr0, %rax \r
433 pushq %rax\r
434\r
435#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
436 movq %dr7, %rax\r
437 pushq %rax\r
438 movq %dr6, %rax\r
439 pushq %rax\r
440 movq %dr3, %rax\r
441 pushq %rax\r
442 movq %dr2, %rax\r
443 pushq %rax\r
444 movq %dr1, %rax\r
445 pushq %rax\r
446 movq %dr0, %rax\r
447 pushq %rax\r
448\r
449#; FX_SAVE_STATE_X64 FxSaveState;\r
450 subq $512, %rsp\r
451 movq %rsp, %rdi\r
452 .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]\r
453\r
454#; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear\r
455 cld\r
456\r
457#; UINT32 ExceptionData;\r
458 pushq 16(%rbp)\r
459\r
460#; Prepare parameter and call\r
461 mov 8(%rbp), %rcx\r
462 mov %rsp, %rdx\r
463 #\r
464 # Per X64 calling convention, allocate maximum parameter stack space\r
465 # and make sure RSP is 16-byte aligned\r
466 #\r
467 subq $40, %rsp \r
468 call ASM_PFX(CommonExceptionHandler)\r
469 addq $40, %rsp\r
470\r
471 cli\r
472#; UINT64 ExceptionData;\r
473 addq $8, %rsp\r
474\r
475#; FX_SAVE_STATE_X64 FxSaveState;\r
476\r
477 movq %rsp, %rsi\r
478 .byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]\r
479 addq $512, %rsp\r
480\r
481#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
482#; Skip restoration of DRx registers to support in-circuit emualators\r
483#; or debuggers set breakpoint in interrupt/exception context\r
484 addq $48, %rsp\r
485\r
486#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
487 popq %rax\r
488 movq %rax, %cr0\r
489 addq $8, %rsp # not for Cr1\r
490 popq %rax\r
491 movq %rax, %cr2\r
492 popq %rax\r
493 movq %rax, %cr3\r
494 popq %rax\r
495 movq %rax, %cr4\r
496 popq %rax\r
497 movq %rax, %cr8\r
498\r
499#; UINT64 RFlags;\r
500 popq 40(%rbp)\r
501\r
502#; UINT64 Ldtr, Tr;\r
503#; UINT64 Gdtr[2], Idtr[2];\r
504#; Best not let anyone mess with these particular registers...\r
505 addq $48, %rsp\r
506\r
507#; UINT64 Rip;\r
508 popq 24(%rbp)\r
509\r
510#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
511 popq %rax\r
512 # mov %rax, %gs ; not for gs\r
513 popq %rax\r
514 # mov %rax, %fs ; not for fs\r
515 # (X64 will not use fs and gs, so we do not restore it)\r
516 popq %rax\r
517 movl %eax, %es\r
518 popq %rax\r
519 movl %eax, %ds\r
520 popq 32(%rbp) # for cs\r
521 popq 56(%rbp) # for ss\r
522\r
523#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
524#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
525 popq %rdi\r
526 popq %rsi\r
527 addq $8, %rsp # not for rbp\r
528 popq 48(%rbp) # for rsp\r
529 popq %rbx\r
530 popq %rdx\r
531 popq %rcx\r
532 popq %rax\r
533 popq %r8\r
534 popq %r9\r
535 popq %r10\r
536 popq %r11\r
537 popq %r12\r
538 popq %r13\r
539 popq %r14\r
540 popq %r15\r
541\r
542 movq %rbp, %rsp\r
543 popq %rbp\r
544 addq $16, %rsp\r
e41aad15
JF		 545 cmpq $0, -32(%rsp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
546 jz DoReturn # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
547 cmpb $1, -40(%rsp)\r
548 jz ErrorCode\r
549 jmp *-32(%rsp)\r
550ErrorCode:\r
551 subq $8, %rsp\r
552 jmp *-24(%rsp)\r
553\r
554DoReturn:\r
eac8082e
LE		 555 pushq %rax\r
556 movabsq ASM_PFX(mDoFarReturnFlag), %rax\r
557 cmpq $0, %rax # Check if need to do far return instead of IRET\r
558 popq %rax\r
e41aad15
JF		 559 jz DoIret\r
560 pushq %rax\r
561 movq %rsp, %rax # save old RSP to rax\r
562 movq 0x20(%rsp), %rsp\r
563 pushq 0x10(%rax) # save CS in new location\r
564 pushq 0x8(%rax) # save EIP in new location\r
565 pushq 0x18(%rax) # save EFLAGS in new location\r
566 movq (%rax), %rax # restore rax\r
567 popfq # restore EFLAGS\r
568 .byte 0x48 # prefix to composite "retq" with next "retf"\r
569 retf # far return\r
570DoIret:\r
8f07f895 571 iretq\r
572\r
573\r
574#-------------------------------------------------------------------------------------\r
e41aad15 575# AsmGetTemplateAddressMap (&AddressMap);\r
8f07f895 576#-------------------------------------------------------------------------------------\r
577# comments here for definition of address map\r
e41aad15
JF		 578ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)\r
579ASM_PFX(AsmGetTemplateAddressMap):\r
8f07f895 580\r
581 movabsq $Exception0Handle, %rax\r
582 movq %rax, (%rcx)\r
583 movq $(Exception1Handle - Exception0Handle), 0x08(%rcx)\r
e41aad15
JF		 584 movabsq $HookAfterStubHeaderBegin, %rax\r
585 movq %rax, 0x10(%rcx)\r
586 ret\r
8f07f895 587\r
e41aad15
JF		 588#-------------------------------------------------------------------------------------\r
589# AsmVectorNumFixup (*VectorBase, VectorNum);\r
590#-------------------------------------------------------------------------------------\r
591ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)\r
592ASM_PFX(AsmVectorNumFixup):\r
593 movq %rdx, %rax\r
594 movb %al, (VectorNum - HookAfterStubHeaderBegin)(%rcx)\r
8f07f895 595 ret\r
596\r
597#END\r
598\r
599\r
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