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1. Separated DxeSmmCpuExceptionHandlerLib.inf into 2 instance DxeCpuExceptionHandlerL...
[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / X64 / ExceptionHandlerAsm.S
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8f07f895 1#------------------------------------------------------------------------------ ;\r
e41aad15 2# Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>\r
8f07f895 3# This program and the accompanying materials\r
4# are licensed and made available under the terms and conditions of the BSD License\r
5# which accompanies this distribution. The full text of the license may be found at\r
6# http://opensource.org/licenses/bsd-license.php.\r
7#\r
8# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
9# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
10#\r
11# Module Name:\r
12#\r
13# ExceptionHandlerAsm.S\r
14#\r
15# Abstract:\r
16#\r
17# x64 CPU Exception Handler\r
18#\r
19# Notes:\r
20#\r
21#------------------------------------------------------------------------------\r
22\r
23\r
8f07f895 24\r
25ASM_GLOBAL ASM_PFX(CommonExceptionHandler)\r
26ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
e41aad15 27ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
8f07f895 28\r
e41aad15
JF		 29#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions\r
30#EXTRN ASM_PFX(mDoFarReturnFlag):QWORD # Do far return flag\r
8f07f895 31.text\r
32\r
33#\r
e41aad15 34# exception handler stub table\r
8f07f895 35#\r
36Exception0Handle:\r
e41aad15
JF		 37 .byte 0x6a # push #VectorNum\r
38 .byte 0\r
39 pushq %rax\r
40 .byte 0x48, 0xB8\r
41 .quad ASM_PFX(CommonInterruptEntry)\r
42 jmp *%rax\r
8f07f895 43Exception1Handle:\r
e41aad15
JF		 44 .byte 0x6a # push #VectorNum\r
45 .byte 1\r
46 pushq %rax\r
47 .byte 0x48, 0xB8\r
48 .quad ASM_PFX(CommonInterruptEntry)\r
49 jmp *%rax\r
8f07f895 50Exception2Handle:\r
e41aad15
JF		 51 .byte 0x6a # push #VectorNum\r
52 .byte 2\r
53 pushq %rax\r
54 .byte 0x48, 0xB8\r
55 .quad ASM_PFX(CommonInterruptEntry)\r
56 jmp *%rax\r
8f07f895 57Exception3Handle:\r
e41aad15
JF		 58 .byte 0x6a # push #VectorNum\r
59 .byte 3\r
60 pushq %rax\r
61 .byte 0x48, 0xB8\r
62 .quad ASM_PFX(CommonInterruptEntry)\r
63 jmp *%rax\r
8f07f895 64Exception4Handle:\r
e41aad15
JF		 65 .byte 0x6a # push #VectorNum\r
66 .byte 4\r
67 pushq %rax\r
68 .byte 0x48, 0xB8\r
69 .quad ASM_PFX(CommonInterruptEntry)\r
70 jmp *%rax\r
8f07f895 71Exception5Handle:\r
e41aad15
JF		 72 .byte 0x6a # push #VectorNum\r
73 .byte 5\r
74 pushq %rax\r
75 .byte 0x48, 0xB8\r
76 .quad ASM_PFX(CommonInterruptEntry)\r
77 jmp *%rax\r
8f07f895 78Exception6Handle:\r
e41aad15
JF		 79 .byte 0x6a # push #VectorNum\r
80 .byte 6\r
81 pushq %rax\r
82 .byte 0x48, 0xB8\r
83 .quad ASM_PFX(CommonInterruptEntry)\r
84 jmp *%rax\r
8f07f895 85Exception7Handle:\r
e41aad15
JF		 86 .byte 0x6a # push #VectorNum\r
87 .byte 7\r
88 pushq %rax\r
89 .byte 0x48, 0xB8\r
90 .quad ASM_PFX(CommonInterruptEntry)\r
91 jmp *%rax\r
8f07f895 92Exception8Handle:\r
e41aad15
JF		 93 .byte 0x6a # push #VectorNum\r
94 .byte 8\r
95 pushq %rax\r
96 .byte 0x48, 0xB8\r
97 .quad ASM_PFX(CommonInterruptEntry)\r
98 jmp *%rax\r
8f07f895 99Exception9Handle:\r
e41aad15
JF		 100 .byte 0x6a # push #VectorNum\r
101 .byte 9\r
102 pushq %rax\r
103 .byte 0x48, 0xB8\r
104 .quad ASM_PFX(CommonInterruptEntry)\r
105 jmp *%rax\r
8f07f895 106Exception10Handle:\r
e41aad15
JF		 107 .byte 0x6a # push #VectorNum\r
108 .byte 10\r
109 pushq %rax\r
110 .byte 0x48, 0xB8\r
111 .quad ASM_PFX(CommonInterruptEntry)\r
112 jmp *%rax\r
8f07f895 113Exception11Handle:\r
e41aad15
JF		 114 .byte 0x6a # push #VectorNum\r
115 .byte 11\r
116 pushq %rax\r
117 .byte 0x48, 0xB8\r
118 .quad ASM_PFX(CommonInterruptEntry)\r
119 jmp *%rax\r
8f07f895 120Exception12Handle:\r
e41aad15
JF		 121 .byte 0x6a # push #VectorNum\r
122 .byte 12\r
123 pushq %rax\r
124 .byte 0x48, 0xB8\r
125 .quad ASM_PFX(CommonInterruptEntry)\r
126 jmp *%rax\r
8f07f895 127Exception13Handle:\r
e41aad15
JF		 128 .byte 0x6a # push #VectorNum\r
129 .byte 13\r
130 pushq %rax\r
131 .byte 0x48, 0xB8\r
132 .quad ASM_PFX(CommonInterruptEntry)\r
133 jmp *%rax\r
8f07f895 134Exception14Handle:\r
e41aad15
JF		 135 .byte 0x6a # push #VectorNum\r
136 .byte 14\r
137 pushq %rax\r
138 .byte 0x48, 0xB8\r
139 .quad ASM_PFX(CommonInterruptEntry)\r
140 jmp *%rax\r
8f07f895 141Exception15Handle:\r
e41aad15
JF		 142 .byte 0x6a # push #VectorNum\r
143 .byte 15\r
144 pushq %rax\r
145 .byte 0x48, 0xB8\r
146 .quad ASM_PFX(CommonInterruptEntry)\r
147 jmp *%rax\r
8f07f895 148Exception16Handle:\r
e41aad15
JF		 149 .byte 0x6a # push #VectorNum\r
150 .byte 16\r
151 pushq %rax\r
152 .byte 0x48, 0xB8\r
153 .quad ASM_PFX(CommonInterruptEntry)\r
154 jmp *%rax\r
8f07f895 155Exception17Handle:\r
e41aad15
JF		 156 .byte 0x6a # push #VectorNum\r
157 .byte 17\r
158 pushq %rax\r
159 .byte 0x48, 0xB8\r
160 .quad ASM_PFX(CommonInterruptEntry)\r
161 jmp *%rax\r
8f07f895 162Exception18Handle:\r
e41aad15
JF		 163 .byte 0x6a # push #VectorNum\r
164 .byte 18\r
165 pushq %rax\r
166 .byte 0x48, 0xB8\r
167 .quad ASM_PFX(CommonInterruptEntry)\r
168 jmp *%rax\r
8f07f895 169Exception19Handle:\r
e41aad15
JF		 170 .byte 0x6a # push #VectorNum\r
171 .byte 19\r
172 pushq %rax\r
173 .byte 0x48, 0xB8\r
174 .quad ASM_PFX(CommonInterruptEntry)\r
175 jmp *%rax\r
8f07f895 176Exception20Handle:\r
e41aad15
JF		 177 .byte 0x6a # push #VectorNum\r
178 .byte 20\r
179 pushq %rax\r
180 .byte 0x48, 0xB8\r
181 .quad ASM_PFX(CommonInterruptEntry)\r
182 jmp *%rax\r
8f07f895 183Exception21Handle:\r
e41aad15
JF		 184 .byte 0x6a # push #VectorNum\r
185 .byte 21\r
186 pushq %rax\r
187 .byte 0x48, 0xB8\r
188 .quad ASM_PFX(CommonInterruptEntry)\r
189 jmp *%rax\r
8f07f895 190Exception22Handle:\r
e41aad15
JF		 191 .byte 0x6a # push #VectorNum\r
192 .byte 22\r
193 pushq %rax\r
194 .byte 0x48, 0xB8\r
195 .quad ASM_PFX(CommonInterruptEntry)\r
196 jmp *%rax\r
8f07f895 197Exception23Handle:\r
e41aad15
JF		 198 .byte 0x6a # push #VectorNum\r
199 .byte 23\r
200 pushq %rax\r
201 .byte 0x48, 0xB8\r
202 .quad ASM_PFX(CommonInterruptEntry)\r
203 jmp *%rax\r
8f07f895 204Exception24Handle:\r
e41aad15
JF		 205 .byte 0x6a # push #VectorNum\r
206 .byte 24\r
207 pushq %rax\r
208 .byte 0x48, 0xB8\r
209 .quad ASM_PFX(CommonInterruptEntry)\r
210 jmp *%rax\r
8f07f895 211Exception25Handle:\r
e41aad15
JF		 212 .byte 0x6a # push #VectorNum\r
213 .byte 25\r
214 pushq %rax\r
215 .byte 0x48, 0xB8\r
216 .quad ASM_PFX(CommonInterruptEntry)\r
217 jmp *%rax\r
8f07f895 218Exception26Handle:\r
e41aad15
JF		 219 .byte 0x6a # push #VectorNum\r
220 .byte 26\r
221 pushq %rax\r
222 .byte 0x48, 0xB8\r
223 .quad ASM_PFX(CommonInterruptEntry)\r
224 jmp *%rax\r
8f07f895 225Exception27Handle:\r
e41aad15
JF		 226 .byte 0x6a # push #VectorNum\r
227 .byte 27\r
228 pushq %rax\r
229 .byte 0x48, 0xB8\r
230 .quad ASM_PFX(CommonInterruptEntry)\r
231 jmp *%rax\r
8f07f895 232Exception28Handle:\r
e41aad15
JF		 233 .byte 0x6a # push #VectorNum\r
234 .byte 28\r
235 pushq %rax\r
236 .byte 0x48, 0xB8\r
237 .quad ASM_PFX(CommonInterruptEntry)\r
238 jmp *%rax\r
8f07f895 239Exception29Handle:\r
e41aad15
JF		 240 .byte 0x6a # push #VectorNum\r
241 .byte 29\r
242 pushq %rax\r
243 .byte 0x48, 0xB8\r
244 .quad ASM_PFX(CommonInterruptEntry)\r
245 jmp *%rax\r
8f07f895 246Exception30Handle:\r
e41aad15
JF		 247 .byte 0x6a # push #VectorNum\r
248 .byte 30\r
249 pushq %rax\r
250 .byte 0x48, 0xB8\r
251 .quad ASM_PFX(CommonInterruptEntry)\r
252 jmp *%rax\r
8f07f895 253Exception31Handle:\r
e41aad15
JF		 254 .byte 0x6a # push #VectorNum\r
255 .byte 31\r
256 pushq %rax\r
257 .byte 0x48, 0xB8\r
258 .quad ASM_PFX(CommonInterruptEntry)\r
259 jmp *%rax\r
260 \r
261HookAfterStubHeaderBegin:\r
262 .byte 0x6a # push\r
263VectorNum:\r
264 .byte 0 # 0 will be fixed \r
265 pushq %rax\r
266 .byte 0x48, 0xB8 # movq ASM_PFX(HookAfterStubHeaderEnd), %rax\r
267 .quad ASM_PFX(HookAfterStubHeaderEnd)\r
268 jmp *%rax\r
269ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)\r
270ASM_PFX(HookAfterStubHeaderEnd):\r
271 movq %rsp, %rax\r
272 subq $8, %rsp\r
273 andl $0x0fffffff0, %esp\r
274 pushq %rcx\r
275 movq 8(%rax), %rcx\r
276 bt %ecx, ASM_PFX(mErrorCodeFlag)\r
277 jc NoErrorData\r
278 pushq (%rsp) # push additional rcx to make stack alignment\r
279NoErrorData:\r
280 xchgq (%rsp), %rcx # restore rcx, save Exception Number in stack\r
281 pushq (%rax) # push rax into stack to keep code consistence\r
8f07f895 282\r
283#---------------------------------------;\r
284# CommonInterruptEntry ;\r
285#---------------------------------------;\r
286# The follow algorithm is used for the common interrupt routine.\r
287\r
288ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
289ASM_PFX(CommonInterruptEntry):\r
290 cli\r
e41aad15 291 popq %rax\r
8f07f895 292 #\r
293 # All interrupt handlers are invoked through interrupt gates, so\r
294 # IF flag automatically cleared at the entry point\r
295 #\r
296 #\r
297 # Calculate vector number\r
298 #\r
e41aad15
JF		 299 xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.\r
300 andq $0x0FF, %rcx\r
8f07f895 301 cmp $32, %ecx # Intel reserved vector for exceptions?\r
302 jae NoErrorCode\r
303 pushq %rax\r
304 leaq ASM_PFX(mErrorCodeFlag)(%rip), %rax\r
305 bt %ecx, (%rax) \r
306 popq %rax\r
307 jc CommonInterruptEntry_al_0000\r
308\r
309NoErrorCode:\r
310\r
311 #\r
312 # Push a dummy error code on the stack\r
313 # to maintain coherent stack map\r
314 #\r
315 pushq (%rsp)\r
316 movq $0, 8(%rsp)\r
317CommonInterruptEntry_al_0000:\r
318 pushq %rbp\r
319 movq %rsp, %rbp\r
e41aad15
JF		 320 pushq $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
321 pushq $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
8f07f895 322\r
323 #\r
324 # Stack:\r
325 # +---------------------+ <-- 16-byte aligned ensured by processor\r
326 # + Old SS +\r
327 # +---------------------+\r
328 # + Old RSP +\r
329 # +---------------------+\r
330 # + RFlags +\r
331 # +---------------------+\r
332 # + CS +\r
333 # +---------------------+\r
334 # + RIP +\r
335 # +---------------------+\r
336 # + Error Code +\r
337 # +---------------------+\r
338 # + RCX / Vector Number +\r
339 # +---------------------+\r
340 # + RBP +\r
341 # +---------------------+ <-- RBP, 16-byte aligned\r
342 #\r
343\r
344\r
345 #\r
346 # Since here the stack pointer is 16-byte aligned, so\r
347 # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64\r
348 # is 16-byte aligned\r
349 #\r
350\r
351#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
352#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
353 pushq %r15\r
354 pushq %r14\r
355 pushq %r13\r
356 pushq %r12\r
357 pushq %r11\r
358 pushq %r10\r
359 pushq %r9\r
360 pushq %r8\r
361 pushq %rax\r
362 pushq 8(%rbp) # RCX\r
363 pushq %rdx\r
364 pushq %rbx\r
365 pushq 48(%rbp) # RSP\r
366 pushq (%rbp) # RBP\r
367 pushq %rsi\r
368 pushq %rdi\r
369\r
370#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
371 movzwq 56(%rbp), %rax\r
372 pushq %rax # for ss\r
373 movzwq 32(%rbp), %rax\r
374 pushq %rax # for cs\r
375 movl %ds, %eax\r
376 pushq %rax\r
377 movl %es, %eax\r
378 pushq %rax\r
379 movl %fs, %eax\r
380 pushq %rax\r
381 movl %gs, %eax\r
382 pushq %rax\r
383\r
384 movq %rcx, 8(%rbp) # save vector number\r
385\r
386#; UINT64 Rip;\r
387 pushq 24(%rbp)\r
388\r
389#; UINT64 Gdtr[2], Idtr[2];\r
390 xorq %rax, %rax\r
391 pushq %rax\r
392 pushq %rax\r
393 sidt (%rsp)\r
394 xchgq 2(%rsp), %rax\r
395 xchgq (%rsp), %rax\r
396 xchgq 8(%rsp), %rax\r
397\r
398 xorq %rax, %rax\r
399 pushq %rax\r
400 pushq %rax\r
401 sgdt (%rsp)\r
402 xchgq 2(%rsp), %rax\r
403 xchgq (%rsp), %rax\r
404 xchgq 8(%rsp), %rax\r
405\r
406#; UINT64 Ldtr, Tr;\r
407 xorq %rax, %rax\r
408 str %ax\r
409 pushq %rax\r
410 sldt %ax\r
411 pushq %rax\r
412\r
413#; UINT64 RFlags;\r
414 pushq 40(%rbp)\r
415\r
416#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
417 movq %cr8, %rax\r
418 pushq %rax\r
419 movq %cr4, %rax\r
420 orq $0x208, %rax \r
421 movq %rax, %cr4 \r
422 pushq %rax\r
423 mov %cr3, %rax \r
424 pushq %rax\r
425 mov %cr2, %rax \r
426 pushq %rax\r
427 xorq %rax, %rax\r
428 pushq %rax\r
429 mov %cr0, %rax \r
430 pushq %rax\r
431\r
432#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
433 movq %dr7, %rax\r
434 pushq %rax\r
435 movq %dr6, %rax\r
436 pushq %rax\r
437 movq %dr3, %rax\r
438 pushq %rax\r
439 movq %dr2, %rax\r
440 pushq %rax\r
441 movq %dr1, %rax\r
442 pushq %rax\r
443 movq %dr0, %rax\r
444 pushq %rax\r
445\r
446#; FX_SAVE_STATE_X64 FxSaveState;\r
447 subq $512, %rsp\r
448 movq %rsp, %rdi\r
449 .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]\r
450\r
451#; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear\r
452 cld\r
453\r
454#; UINT32 ExceptionData;\r
455 pushq 16(%rbp)\r
456\r
457#; Prepare parameter and call\r
458 mov 8(%rbp), %rcx\r
459 mov %rsp, %rdx\r
460 #\r
461 # Per X64 calling convention, allocate maximum parameter stack space\r
462 # and make sure RSP is 16-byte aligned\r
463 #\r
464 subq $40, %rsp \r
465 call ASM_PFX(CommonExceptionHandler)\r
466 addq $40, %rsp\r
467\r
468 cli\r
469#; UINT64 ExceptionData;\r
470 addq $8, %rsp\r
471\r
472#; FX_SAVE_STATE_X64 FxSaveState;\r
473\r
474 movq %rsp, %rsi\r
475 .byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]\r
476 addq $512, %rsp\r
477\r
478#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
479#; Skip restoration of DRx registers to support in-circuit emualators\r
480#; or debuggers set breakpoint in interrupt/exception context\r
481 addq $48, %rsp\r
482\r
483#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
484 popq %rax\r
485 movq %rax, %cr0\r
486 addq $8, %rsp # not for Cr1\r
487 popq %rax\r
488 movq %rax, %cr2\r
489 popq %rax\r
490 movq %rax, %cr3\r
491 popq %rax\r
492 movq %rax, %cr4\r
493 popq %rax\r
494 movq %rax, %cr8\r
495\r
496#; UINT64 RFlags;\r
497 popq 40(%rbp)\r
498\r
499#; UINT64 Ldtr, Tr;\r
500#; UINT64 Gdtr[2], Idtr[2];\r
501#; Best not let anyone mess with these particular registers...\r
502 addq $48, %rsp\r
503\r
504#; UINT64 Rip;\r
505 popq 24(%rbp)\r
506\r
507#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
508 popq %rax\r
509 # mov %rax, %gs ; not for gs\r
510 popq %rax\r
511 # mov %rax, %fs ; not for fs\r
512 # (X64 will not use fs and gs, so we do not restore it)\r
513 popq %rax\r
514 movl %eax, %es\r
515 popq %rax\r
516 movl %eax, %ds\r
517 popq 32(%rbp) # for cs\r
518 popq 56(%rbp) # for ss\r
519\r
520#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
521#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
522 popq %rdi\r
523 popq %rsi\r
524 addq $8, %rsp # not for rbp\r
525 popq 48(%rbp) # for rsp\r
526 popq %rbx\r
527 popq %rdx\r
528 popq %rcx\r
529 popq %rax\r
530 popq %r8\r
531 popq %r9\r
532 popq %r10\r
533 popq %r11\r
534 popq %r12\r
535 popq %r13\r
536 popq %r14\r
537 popq %r15\r
538\r
539 movq %rbp, %rsp\r
540 popq %rbp\r
541 addq $16, %rsp\r
e41aad15
JF		 542 cmpq $0, -32(%rsp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
543 jz DoReturn # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
544 cmpb $1, -40(%rsp)\r
545 jz ErrorCode\r
546 jmp *-32(%rsp)\r
547ErrorCode:\r
548 subq $8, %rsp\r
549 jmp *-24(%rsp)\r
550\r
551DoReturn:\r
552 cmpq $0, ASM_PFX(mDoFarReturnFlag) # Check if need to do far return instead of IRET\r
553 jz DoIret\r
554 pushq %rax\r
555 movq %rsp, %rax # save old RSP to rax\r
556 movq 0x20(%rsp), %rsp\r
557 pushq 0x10(%rax) # save CS in new location\r
558 pushq 0x8(%rax) # save EIP in new location\r
559 pushq 0x18(%rax) # save EFLAGS in new location\r
560 movq (%rax), %rax # restore rax\r
561 popfq # restore EFLAGS\r
562 .byte 0x48 # prefix to composite "retq" with next "retf"\r
563 retf # far return\r
564DoIret:\r
8f07f895 565 iretq\r
566\r
567\r
568#-------------------------------------------------------------------------------------\r
e41aad15 569# AsmGetTemplateAddressMap (&AddressMap);\r
8f07f895 570#-------------------------------------------------------------------------------------\r
571# comments here for definition of address map\r
e41aad15
JF		 572ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)\r
573ASM_PFX(AsmGetTemplateAddressMap):\r
8f07f895 574\r
575 movabsq $Exception0Handle, %rax\r
576 movq %rax, (%rcx)\r
577 movq $(Exception1Handle - Exception0Handle), 0x08(%rcx)\r
e41aad15
JF		 578 movabsq $HookAfterStubHeaderBegin, %rax\r
579 movq %rax, 0x10(%rcx)\r
580 ret\r
8f07f895 581\r
e41aad15
JF		 582#-------------------------------------------------------------------------------------\r
583# AsmVectorNumFixup (*VectorBase, VectorNum);\r
584#-------------------------------------------------------------------------------------\r
585ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)\r
586ASM_PFX(AsmVectorNumFixup):\r
587 movq %rdx, %rax\r
588 movb %al, (VectorNum - HookAfterStubHeaderBegin)(%rcx)\r
8f07f895 589 ret\r
590\r
591#END\r
592\r
593\r
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