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UefiCpuPkg/MpInitLib: Add MicrocodeDetect() and load microcode on BSP
[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / Microcode.c
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1/** @file\r
2 Implementation of loading microcode on processors.\r
3\r
4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "MpLib.h"\r
16\r
17/**\r
18 Get microcode update signature of currently loaded microcode update.\r
19\r
20 @return Microcode signature.\r
21**/\r
22UINT32\r
23GetCurrentMicrocodeSignature (\r
24 VOID\r
25 )\r
26{\r
27 MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;\r
28\r
29 AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);\r
30 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
31 BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);\r
32 return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;\r
33}\r
34\r
35/**\r
36 Detect whether specified processor can find matching microcode patch and load it.\r
37\r
38 @param[in] PeiCpuMpData Pointer to PEI CPU MP Data\r
39**/\r
40VOID\r
41MicrocodeDetect (\r
42 IN CPU_MP_DATA *CpuMpData\r
43 )\r
44{\r
45 UINT64 MicrocodePatchAddress;\r
46 UINT64 MicrocodePatchRegionSize;\r
47 UINT32 ExtendedTableLength;\r
48 UINT32 ExtendedTableCount;\r
49 CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;\r
50 CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;\r
51 CPU_MICROCODE_HEADER *MicrocodeEntryPoint;\r
52 UINTN MicrocodeEnd;\r
53 UINTN Index;\r
54 UINT8 PlatformId;\r
55 CPUID_VERSION_INFO_EAX Eax;\r
56 UINT32 CurrentRevision;\r
57 UINT32 LatestRevision;\r
58 UINTN TotalSize;\r
59 UINT32 CheckSum32;\r
60 BOOLEAN CorrectMicrocode;\r
61 VOID *MicrocodeData;\r
62 MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;\r
63\r
64 MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);\r
65 MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);\r
66 if (MicrocodePatchRegionSize == 0) {\r
67 //\r
68 // There is no microcode patches\r
69 //\r
70 return;\r
71 }\r
72\r
73 CurrentRevision = GetCurrentMicrocodeSignature ();\r
74 if (CurrentRevision != 0) {\r
75 //\r
76 // Skip loading microcode if it has been loaded successfully\r
77 //\r
78 return;\r
79 }\r
80\r
81 ExtendedTableLength = 0;\r
82 //\r
83 // Here data of CPUID leafs have not been collected into context buffer, so\r
84 // GetProcessorCpuid() cannot be used here to retrieve sCPUID data.\r
85 //\r
86 AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);\r
87\r
88 //\r
89 // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID\r
90 //\r
91 PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
92 PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;\r
93\r
94 LatestRevision = 0;\r
95 MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);\r
96 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;\r
97 do {\r
98 //\r
99 // Check if the microcode is for the Cpu and the version is newer\r
100 // and the update can be processed on the platform\r
101 //\r
102 CorrectMicrocode = FALSE;\r
103 if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
104 //\r
105 // It is the microcode header. It is not the padding data between microcode patches\r
106 // because the padding data should not include 0x00000001 and it should be the repeated\r
107 // byte format (like 0xXYXYXYXY....).\r
108 //\r
109 if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&\r
110 MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
111 (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
112 ) {\r
113 if (MicrocodeEntryPoint->DataSize == 0) {\r
114 CheckSum32 = CalculateSum32 ((UINT32 *) MicrocodeEntryPoint, 2048);\r
115 } else {\r
116 CheckSum32 = CalculateSum32 (\r
117 (UINT32 *) MicrocodeEntryPoint,\r
118 MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER)\r
119 );\r
120 }\r
121 if (CheckSum32 == 0) {\r
122 CorrectMicrocode = TRUE;\r
123 }\r
124 } else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
125 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
126 ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +\r
127 sizeof (CPU_MICROCODE_HEADER));\r
128 if (ExtendedTableLength != 0) {\r
129 //\r
130 // Extended Table exist, check if the CPU in support list\r
131 //\r
132 ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)\r
133 + MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));\r
134 //\r
135 // Calculate Extended Checksum\r
136 //\r
137 if ((ExtendedTableLength % 4) == 0) {\r
138 CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);\r
139 if (CheckSum32 == 0) {\r
140 //\r
141 // Checksum correct\r
142 //\r
143 ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
144 ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);\r
145 for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
146 CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTable, sizeof(CPU_MICROCODE_EXTENDED_TABLE));\r
147 if (CheckSum32 == 0) {\r
148 //\r
149 // Verify Header\r
150 //\r
151 if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&\r
152 (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
153 //\r
154 // Find one\r
155 //\r
156 CorrectMicrocode = TRUE;\r
157 break;\r
158 }\r
159 }\r
160 ExtendedTable ++;\r
161 }\r
162 }\r
163 }\r
164 }\r
165 }\r
166 } else {\r
167 //\r
168 // It is the padding data between the microcode patches for microcode patches alignment.\r
169 // Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
170 // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
171 // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
172 // find the next possible microcode patch header.\r
173 //\r
174 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
175 continue;\r
176 }\r
177 //\r
178 // Get the next patch.\r
179 //\r
180 if (MicrocodeEntryPoint->DataSize == 0) {\r
181 TotalSize = 2048;\r
182 } else {\r
183 TotalSize = MicrocodeEntryPoint->TotalSize;\r
184 }\r
185\r
186 if (CorrectMicrocode) {\r
187 LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
188 MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));\r
189 }\r
190\r
191 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
192 } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
193\r
194 if (LatestRevision > CurrentRevision) {\r
195 //\r
196 // BIOS only authenticate updates that contain a numerically larger revision\r
197 // than the currently loaded revision, where Current Signature < New Update\r
198 // Revision. A processor with no loaded update is considered to have a\r
199 // revision equal to zero.\r
200 //\r
201 AsmWriteMsr64 (\r
202 MSR_IA32_BIOS_UPDT_TRIG,\r
203 (UINT64) (UINTN) MicrocodeData\r
204 );\r
205 //\r
206 // Get and check new microcode signature\r
207 //\r
208 CurrentRevision = GetCurrentMicrocodeSignature ();\r
209 if (CurrentRevision != LatestRevision) {\r
210 AcquireSpinLock(&CpuMpData->MpLock);\r
211 DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \\r
212 loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));\r
213 ReleaseSpinLock(&CpuMpData->MpLock);\r
214 }\r
215 }\r
216}\r