[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / Microcode.c

/** @file\r
  Implementation of loading microcode on processors.\r
\r
  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "MpLib.h"\r
\r
/**\r
  Get microcode update signature of currently loaded microcode update.\r
\r
  @return  Microcode signature.\r
**/\r
UINT32\r
GetCurrentMicrocodeSignature (\r
  VOID\r
  )\r
{\r
  MSR_IA32_BIOS_SIGN_ID_REGISTER   BiosSignIdMsr;\r
\r
  AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);\r
  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
  BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);\r
  return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;\r
}\r
\r
/**\r
  Detect whether specified processor can find matching microcode patch and load it.\r
\r
  Microcode Payload as the following format:\r
  +----------------------------------------+------------------+\r
  |          CPU_MICROCODE_HEADER          |                  |\r
  +----------------------------------------+  CheckSum Part1  |\r
  |            Microcode Binary            |                  |\r
  +----------------------------------------+------------------+\r
  |  CPU_MICROCODE_EXTENDED_TABLE_HEADER   |                  |\r
  +----------------------------------------+  CheckSum Part2  |\r
  |      CPU_MICROCODE_EXTENDED_TABLE      |                  |\r
  |                   ...                  |                  |\r
  +----------------------------------------+------------------+\r
\r
  There may by multiple CPU_MICROCODE_EXTENDED_TABLE in this format.\r
  The count of CPU_MICROCODE_EXTENDED_TABLE is indicated by ExtendedSignatureCount\r
  of CPU_MICROCODE_EXTENDED_TABLE_HEADER structure.\r
\r
  When we are trying to verify the CheckSum32 with extended table.\r
  We should use the fields of exnteded table to replace the corresponding\r
  fields in CPU_MICROCODE_HEADER structure, and recalculate the\r
  CheckSum32 with CPU_MICROCODE_HEADER + Microcode Binary. We named\r
  it as CheckSum Part3.\r
\r
  The CheckSum Part2 is used to verify the CPU_MICROCODE_EXTENDED_TABLE_HEADER\r
  and CPU_MICROCODE_EXTENDED_TABLE parts. We should make sure CheckSum Part2\r
  is correct before we are going to verify each CPU_MICROCODE_EXTENDED_TABLE.\r
\r
  Only ProcessorSignature, ProcessorFlag and CheckSum are different between\r
  CheckSum Part1 and CheckSum Part3. To avoid multiple computing CheckSum Part3.\r
  Save an in-complete CheckSum32 from CheckSum Part1 for common parts.\r
  When we are going to calculate CheckSum32, just should use the corresponding part\r
  of the ProcessorSignature, ProcessorFlag and CheckSum with in-complete CheckSum32.\r
\r
  Notes: CheckSum32 is not a strong verification.\r
         It does not guarantee that the data has not been modified.\r
         CPU has its own mechanism to verify Microcode Binary part.\r
\r
  @param[in]  CpuMpData    The pointer to CPU MP Data structure.\r
  @param[in]  IsBspCallIn  Indicate whether the caller is BSP or not.\r
**/\r
VOID\r
MicrocodeDetect (\r
  IN CPU_MP_DATA             *CpuMpData,\r
  IN BOOLEAN                 IsBspCallIn\r
  )\r
{\r
  UINT32                                  ExtendedTableLength;\r
  UINT32                                  ExtendedTableCount;\r
  CPU_MICROCODE_EXTENDED_TABLE            *ExtendedTable;\r
  CPU_MICROCODE_EXTENDED_TABLE_HEADER     *ExtendedTableHeader;\r
  CPU_MICROCODE_HEADER                    *MicrocodeEntryPoint;\r
  UINTN                                   MicrocodeEnd;\r
  UINTN                                   Index;\r
  UINT8                                   PlatformId;\r
  CPUID_VERSION_INFO_EAX                  Eax;\r
  UINT32                                  CurrentRevision;\r
  UINT32                                  LatestRevision;\r
  UINTN                                   TotalSize;\r
  UINT32                                  CheckSum32;\r
  UINT32                                  InCompleteCheckSum32;\r
  BOOLEAN                                 CorrectMicrocode;\r
  VOID                                    *MicrocodeData;\r
  MSR_IA32_PLATFORM_ID_REGISTER           PlatformIdMsr;\r
  UINT32                                  ProcessorFlags;\r
  UINT32                                  ThreadId;\r
\r
  //\r
  // set ProcessorFlags to suppress incorrect compiler/analyzer warnings\r
  //\r
  ProcessorFlags = 0;\r
\r
  if (CpuMpData->MicrocodePatchRegionSize == 0) {\r
    //\r
    // There is no microcode patches\r
    //\r
    return;\r
  }\r
\r
  CurrentRevision = GetCurrentMicrocodeSignature ();\r
  if (CurrentRevision != 0 && !IsBspCallIn) {\r
    //\r
    // Skip loading microcode if it has been loaded successfully\r
    //\r
    return;\r
  }\r
\r
  GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId);\r
  if (ThreadId != 0) {\r
    //\r
    // Skip loading microcode if it is not the first thread in one core.\r
    //\r
    return;\r
  }\r
\r
  ExtendedTableLength = 0;\r
  //\r
  // Here data of CPUID leafs have not been collected into context buffer, so\r
  // GetProcessorCpuid() cannot be used here to retrieve CPUID data.\r
  //\r
  AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);\r
\r
  //\r
  // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID\r
  //\r
  PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
  PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;\r
\r
  //\r
  // Check whether AP has same processor with BSP.\r
  // If yes, direct use microcode info saved by BSP.\r
  //\r
  if (!IsBspCallIn) {\r
    if ((CpuMpData->ProcessorSignature == Eax.Uint32) &&\r
        (CpuMpData->ProcessorFlags & (1 << PlatformId)) != 0) {\r
        MicrocodeData = (VOID *)(UINTN) CpuMpData->MicrocodeDataAddress;\r
        LatestRevision = CpuMpData->MicrocodeRevision;\r
        goto Done;\r
    }\r
  }\r
\r
  LatestRevision = 0;\r
  MicrocodeData  = NULL;\r
  MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize);\r
  MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;\r
\r
  //\r
  // Save an in-complete CheckSum32 from CheckSum Part1 for common parts.\r
  //\r
  if (MicrocodeEntryPoint->DataSize == 0) {\r
    InCompleteCheckSum32 = CalculateSum32 (\r
                             (UINT32 *) MicrocodeEntryPoint,\r
                             sizeof (CPU_MICROCODE_HEADER) + 2000\r
                             );\r
  } else {\r
    InCompleteCheckSum32 = CalculateSum32 (\r
                             (UINT32 *) MicrocodeEntryPoint,\r
                             sizeof (CPU_MICROCODE_HEADER) + MicrocodeEntryPoint->DataSize\r
                             );\r
  }\r
  InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorSignature.Uint32;\r
  InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorFlags;\r
  InCompleteCheckSum32 -= MicrocodeEntryPoint->Checksum;\r
\r
  do {\r
    //\r
    // Check if the microcode is for the Cpu and the version is newer\r
    // and the update can be processed on the platform\r
    //\r
    CorrectMicrocode = FALSE;\r
    if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
      //\r
      // It is the microcode header. It is not the padding data between microcode patches\r
      // because the padding data should not include 0x00000001 and it should be the repeated\r
      // byte format (like 0xXYXYXYXY....).\r
      //\r
      if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&\r
          MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
          (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
          ) {\r
        //\r
        // Calculate CheckSum Part1.\r
        //\r
        CheckSum32 = InCompleteCheckSum32;\r
        CheckSum32 += MicrocodeEntryPoint->ProcessorSignature.Uint32;\r
        CheckSum32 += MicrocodeEntryPoint->ProcessorFlags;\r
        CheckSum32 += MicrocodeEntryPoint->Checksum;\r
        if (CheckSum32 == 0) {\r
          CorrectMicrocode = TRUE;\r
          ProcessorFlags = MicrocodeEntryPoint->ProcessorFlags;\r
        }\r
      } else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
                 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
        ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +\r
                                sizeof (CPU_MICROCODE_HEADER));\r
        if (ExtendedTableLength != 0) {\r
          //\r
          // Extended Table exist, check if the CPU in support list\r
          //\r
          ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)\r
                                  + MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));\r
          //\r
          // Calculate Extended Checksum\r
          //\r
          if ((ExtendedTableLength % 4) == 0) {\r
            //\r
            // Calculate CheckSum Part2.\r
            //\r
            CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);\r
            if (CheckSum32 == 0) {\r
              //\r
              // Checksum correct\r
              //\r
              ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
              ExtendedTable      = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);\r
              for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
                //\r
                // Calculate CheckSum Part3.\r
                //\r
                CheckSum32 = InCompleteCheckSum32;\r
                CheckSum32 += ExtendedTable->ProcessorSignature.Uint32;\r
                CheckSum32 += ExtendedTable->ProcessorFlag;\r
                CheckSum32 += ExtendedTable->Checksum;\r
                if (CheckSum32 == 0) {\r
                  //\r
                  // Verify Header\r
                  //\r
                  if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&\r
                      (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
                    //\r
                    // Find one\r
                    //\r
                    CorrectMicrocode = TRUE;\r
                    ProcessorFlags = ExtendedTable->ProcessorFlag;\r
                    break;\r
                  }\r
                }\r
                ExtendedTable ++;\r
              }\r
            }\r
          }\r
        }\r
      }\r
    } else {\r
      //\r
      // It is the padding data between the microcode patches for microcode patches alignment.\r
      // Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
      // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
      // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
      // find the next possible microcode patch header.\r
      //\r
      MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
      continue;\r
    }\r
    //\r
    // Get the next patch.\r
    //\r
    if (MicrocodeEntryPoint->DataSize == 0) {\r
      TotalSize = 2048;\r
    } else {\r
      TotalSize = MicrocodeEntryPoint->TotalSize;\r
    }\r
\r
    if (CorrectMicrocode) {\r
      LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
      MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));\r
    }\r
\r
    MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
  } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
\r
Done:\r
  if (LatestRevision > CurrentRevision) {\r
    //\r
    // BIOS only authenticate updates that contain a numerically larger revision\r
    // than the currently loaded revision, where Current Signature < New Update\r
    // Revision. A processor with no loaded update is considered to have a\r
    // revision equal to zero.\r
    //\r
    ASSERT (MicrocodeData != NULL);\r
    AsmWriteMsr64 (\r
        MSR_IA32_BIOS_UPDT_TRIG,\r
        (UINT64) (UINTN) MicrocodeData\r
        );\r
    //\r
    // Get and check new microcode signature\r
    //\r
    CurrentRevision = GetCurrentMicrocodeSignature ();\r
    if (CurrentRevision != LatestRevision) {\r
      AcquireSpinLock(&CpuMpData->MpLock);\r
      DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \\r
                loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));\r
      ReleaseSpinLock(&CpuMpData->MpLock);\r
    }\r
  }\r
\r
  if (IsBspCallIn && (LatestRevision != 0)) {\r
    //\r
    // Save BSP processor info and microcode info for later AP use.\r
    //\r
    CpuMpData->ProcessorSignature   = Eax.Uint32;\r
    CpuMpData->ProcessorFlags       = ProcessorFlags;\r
    CpuMpData->MicrocodeDataAddress = (UINTN) MicrocodeData;\r
    CpuMpData->MicrocodeRevision    = LatestRevision;\r
    DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], ProcessorFlags [0x%08x], \\r
       MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, ProcessorFlags, (UINTN) MicrocodeData, LatestRevision));\r
  }\r
}\r
Commit	Line	Data
94f63c76 JF	1	/** @file\r
	2	Implementation of loading microcode on processors.\r
	3	\r
3e5c6c07	4	Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
94f63c76 JF	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include "MpLib.h"\r
	16	\r
	17	/**\r
	18	Get microcode update signature of currently loaded microcode update.\r
	19	\r
	20	@return Microcode signature.\r
	21	**/\r
	22	UINT32\r
	23	GetCurrentMicrocodeSignature (\r
	24	VOID\r
	25	)\r
	26	{\r
	27	MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;\r
	28	\r
	29	AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);\r
	30	AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);\r
	31	BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);\r
	32	return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;\r
	33	}\r
	34	\r
	35	/**\r
	36	Detect whether specified processor can find matching microcode patch and load it.\r
	37	\r
b6f67b4d CC	38	Microcode Payload as the following format:\r
	39	+----------------------------------------+------------------+\r
	40	\| CPU_MICROCODE_HEADER \| \|\r
	41	+----------------------------------------+ CheckSum Part1 \|\r
	42	\| Microcode Binary \| \|\r
	43	+----------------------------------------+------------------+\r
	44	\| CPU_MICROCODE_EXTENDED_TABLE_HEADER \| \|\r
	45	+----------------------------------------+ CheckSum Part2 \|\r
	46	\| CPU_MICROCODE_EXTENDED_TABLE \| \|\r
	47	\| ... \| \|\r
	48	+----------------------------------------+------------------+\r
	49	\r
	50	There may by multiple CPU_MICROCODE_EXTENDED_TABLE in this format.\r
	51	The count of CPU_MICROCODE_EXTENDED_TABLE is indicated by ExtendedSignatureCount\r
	52	of CPU_MICROCODE_EXTENDED_TABLE_HEADER structure.\r
	53	\r
	54	When we are trying to verify the CheckSum32 with extended table.\r
	55	We should use the fields of exnteded table to replace the corresponding\r
	56	fields in CPU_MICROCODE_HEADER structure, and recalculate the\r
	57	CheckSum32 with CPU_MICROCODE_HEADER + Microcode Binary. We named\r
	58	it as CheckSum Part3.\r
	59	\r
	60	The CheckSum Part2 is used to verify the CPU_MICROCODE_EXTENDED_TABLE_HEADER\r
	61	and CPU_MICROCODE_EXTENDED_TABLE parts. We should make sure CheckSum Part2\r
	62	is correct before we are going to verify each CPU_MICROCODE_EXTENDED_TABLE.\r
	63	\r
	64	Only ProcessorSignature, ProcessorFlag and CheckSum are different between\r
	65	CheckSum Part1 and CheckSum Part3. To avoid multiple computing CheckSum Part3.\r
	66	Save an in-complete CheckSum32 from CheckSum Part1 for common parts.\r
	67	When we are going to calculate CheckSum32, just should use the corresponding part\r
	68	of the ProcessorSignature, ProcessorFlag and CheckSum with in-complete CheckSum32.\r
	69	\r
	70	Notes: CheckSum32 is not a strong verification.\r
	71	It does not guarantee that the data has not been modified.\r
	72	CPU has its own mechanism to verify Microcode Binary part.\r
	73	\r
2a089134 ED	74	@param[in] CpuMpData The pointer to CPU MP Data structure.\r
2a089134 ED	75	@param[in] IsBspCallIn Indicate whether the caller is BSP or not.\r
94f63c76 JF	76	**/\r
	77	VOID\r
	78	MicrocodeDetect (\r
2a089134 ED	79	IN CPU_MP_DATA *CpuMpData,\r
2a089134 ED	80	IN BOOLEAN IsBspCallIn\r
94f63c76 JF	81	)\r
94f63c76 JF	82	{\r
94f63c76 JF	83	UINT32 ExtendedTableLength;\r
	84	UINT32 ExtendedTableCount;\r
	85	CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;\r
	86	CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;\r
	87	CPU_MICROCODE_HEADER *MicrocodeEntryPoint;\r
	88	UINTN MicrocodeEnd;\r
	89	UINTN Index;\r
	90	UINT8 PlatformId;\r
	91	CPUID_VERSION_INFO_EAX Eax;\r
	92	UINT32 CurrentRevision;\r
	93	UINT32 LatestRevision;\r
	94	UINTN TotalSize;\r
	95	UINT32 CheckSum32;\r
b6f67b4d	96	UINT32 InCompleteCheckSum32;\r
94f63c76 JF	97	BOOLEAN CorrectMicrocode;\r
	98	VOID *MicrocodeData;\r
	99	MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;\r
2a089134	100	UINT32 ProcessorFlags;\r
f63a3e28	101	UINT32 ThreadId;\r
94f63c76	102	\r
9b7242f5 ED	103	//\r
	104	// set ProcessorFlags to suppress incorrect compiler/analyzer warnings\r
	105	//\r
	106	ProcessorFlags = 0;\r
	107	\r
1e3f7a37	108	if (CpuMpData->MicrocodePatchRegionSize == 0) {\r
94f63c76 JF	109	//\r
	110	// There is no microcode patches\r
	111	//\r
	112	return;\r
	113	}\r
	114	\r
	115	CurrentRevision = GetCurrentMicrocodeSignature ();\r
2a089134	116	if (CurrentRevision != 0 && !IsBspCallIn) {\r
94f63c76 JF	117	//\r
	118	// Skip loading microcode if it has been loaded successfully\r
	119	//\r
	120	return;\r
	121	}\r
	122	\r
f63a3e28 ED	123	GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId);\r
	124	if (ThreadId != 0) {\r
	125	//\r
	126	// Skip loading microcode if it is not the first thread in one core.\r
	127	//\r
	128	return;\r
	129	}\r
	130	\r
94f63c76 JF	131	ExtendedTableLength = 0;\r
	132	//\r
	133	// Here data of CPUID leafs have not been collected into context buffer, so\r
3e5c6c07	134	// GetProcessorCpuid() cannot be used here to retrieve CPUID data.\r
94f63c76 JF	135	//\r
	136	AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);\r
	137	\r
	138	//\r
	139	// The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID\r
	140	//\r
	141	PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
	142	PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;\r
	143	\r
2a089134 ED	144	//\r
	145	// Check whether AP has same processor with BSP.\r
	146	// If yes, direct use microcode info saved by BSP.\r
	147	//\r
	148	if (!IsBspCallIn) {\r
	149	if ((CpuMpData->ProcessorSignature == Eax.Uint32) &&\r
	150	(CpuMpData->ProcessorFlags & (1 << PlatformId)) != 0) {\r
	151	MicrocodeData = (VOID *)(UINTN) CpuMpData->MicrocodeDataAddress;\r
	152	LatestRevision = CpuMpData->MicrocodeRevision;\r
	153	goto Done;\r
	154	}\r
	155	}\r
	156	\r
94f63c76	157	LatestRevision = 0;\r
8cce3c9a	158	MicrocodeData = NULL;\r
1e3f7a37 ED	159	MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize);\r
1e3f7a37 ED	160	MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;\r
b6f67b4d CC	161	\r
	162	//\r
	163	// Save an in-complete CheckSum32 from CheckSum Part1 for common parts.\r
	164	//\r
	165	if (MicrocodeEntryPoint->DataSize == 0) {\r
	166	InCompleteCheckSum32 = CalculateSum32 (\r
	167	(UINT32 *) MicrocodeEntryPoint,\r
	168	sizeof (CPU_MICROCODE_HEADER) + 2000\r
	169	);\r
	170	} else {\r
	171	InCompleteCheckSum32 = CalculateSum32 (\r
	172	(UINT32 *) MicrocodeEntryPoint,\r
	173	sizeof (CPU_MICROCODE_HEADER) + MicrocodeEntryPoint->DataSize\r
	174	);\r
	175	}\r
	176	InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorSignature.Uint32;\r
	177	InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorFlags;\r
	178	InCompleteCheckSum32 -= MicrocodeEntryPoint->Checksum;\r
	179	\r
94f63c76 JF	180	do {\r
	181	//\r
	182	// Check if the microcode is for the Cpu and the version is newer\r
	183	// and the update can be processed on the platform\r
	184	//\r
	185	CorrectMicrocode = FALSE;\r
	186	if (MicrocodeEntryPoint->HeaderVersion == 0x1) {\r
	187	//\r
	188	// It is the microcode header. It is not the padding data between microcode patches\r
	189	// because the padding data should not include 0x00000001 and it should be the repeated\r
	190	// byte format (like 0xXYXYXYXY....).\r
	191	//\r
	192	if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&\r
	193	MicrocodeEntryPoint->UpdateRevision > LatestRevision &&\r
	194	(MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))\r
	195	) {\r
b6f67b4d CC	196	//\r
	197	// Calculate CheckSum Part1.\r
	198	//\r
	199	CheckSum32 = InCompleteCheckSum32;\r
	200	CheckSum32 += MicrocodeEntryPoint->ProcessorSignature.Uint32;\r
	201	CheckSum32 += MicrocodeEntryPoint->ProcessorFlags;\r
	202	CheckSum32 += MicrocodeEntryPoint->Checksum;\r
94f63c76 JF	203	if (CheckSum32 == 0) {\r
94f63c76 JF	204	CorrectMicrocode = TRUE;\r
2a089134	205	ProcessorFlags = MicrocodeEntryPoint->ProcessorFlags;\r
94f63c76 JF	206	}\r
	207	} else if ((MicrocodeEntryPoint->DataSize != 0) &&\r
	208	(MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {\r
	209	ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +\r
	210	sizeof (CPU_MICROCODE_HEADER));\r
	211	if (ExtendedTableLength != 0) {\r
	212	//\r
	213	// Extended Table exist, check if the CPU in support list\r
	214	//\r
	215	ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER ) ((UINT8 ) (MicrocodeEntryPoint)\r
	216	+ MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));\r
	217	//\r
	218	// Calculate Extended Checksum\r
	219	//\r
	220	if ((ExtendedTableLength % 4) == 0) {\r
b6f67b4d CC	221	//\r
	222	// Calculate CheckSum Part2.\r
	223	//\r
94f63c76 JF	224	CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);\r
	225	if (CheckSum32 == 0) {\r
	226	//\r
	227	// Checksum correct\r
	228	//\r
	229	ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;\r
	230	ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);\r
	231	for (Index = 0; Index < ExtendedTableCount; Index ++) {\r
b6f67b4d CC	232	//\r
	233	// Calculate CheckSum Part3.\r
	234	//\r
	235	CheckSum32 = InCompleteCheckSum32;\r
	236	CheckSum32 += ExtendedTable->ProcessorSignature.Uint32;\r
	237	CheckSum32 += ExtendedTable->ProcessorFlag;\r
	238	CheckSum32 += ExtendedTable->Checksum;\r
94f63c76 JF	239	if (CheckSum32 == 0) {\r
	240	//\r
	241	// Verify Header\r
	242	//\r
	243	if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&\r
	244	(ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {\r
	245	//\r
	246	// Find one\r
	247	//\r
	248	CorrectMicrocode = TRUE;\r
2a089134	249	ProcessorFlags = ExtendedTable->ProcessorFlag;\r
94f63c76 JF	250	break;\r
	251	}\r
	252	}\r
	253	ExtendedTable ++;\r
	254	}\r
	255	}\r
	256	}\r
	257	}\r
	258	}\r
	259	} else {\r
	260	//\r
	261	// It is the padding data between the microcode patches for microcode patches alignment.\r
	262	// Because the microcode patch is the multiple of 1-KByte, the padding data should not\r
	263	// exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode\r
	264	// alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to\r
	265	// find the next possible microcode patch header.\r
	266	//\r
	267	MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);\r
	268	continue;\r
	269	}\r
	270	//\r
	271	// Get the next patch.\r
	272	//\r
	273	if (MicrocodeEntryPoint->DataSize == 0) {\r
	274	TotalSize = 2048;\r
	275	} else {\r
	276	TotalSize = MicrocodeEntryPoint->TotalSize;\r
	277	}\r
	278	\r
	279	if (CorrectMicrocode) {\r
	280	LatestRevision = MicrocodeEntryPoint->UpdateRevision;\r
	281	MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));\r
	282	}\r
	283	\r
	284	MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);\r
	285	} while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));\r
	286	\r
2a089134	287	Done:\r
94f63c76 JF	288	if (LatestRevision > CurrentRevision) {\r
	289	//\r
	290	// BIOS only authenticate updates that contain a numerically larger revision\r
	291	// than the currently loaded revision, where Current Signature < New Update\r
	292	// Revision. A processor with no loaded update is considered to have a\r
	293	// revision equal to zero.\r
	294	//\r
8cce3c9a	295	ASSERT (MicrocodeData != NULL);\r
94f63c76 JF	296	AsmWriteMsr64 (\r
	297	MSR_IA32_BIOS_UPDT_TRIG,\r
	298	(UINT64) (UINTN) MicrocodeData\r
	299	);\r
	300	//\r
	301	// Get and check new microcode signature\r
	302	//\r
	303	CurrentRevision = GetCurrentMicrocodeSignature ();\r
	304	if (CurrentRevision != LatestRevision) {\r
	305	AcquireSpinLock(&CpuMpData->MpLock);\r
	306	DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \\r
	307	loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));\r
	308	ReleaseSpinLock(&CpuMpData->MpLock);\r
	309	}\r
	310	}\r
2a089134 ED	311	\r
	312	if (IsBspCallIn && (LatestRevision != 0)) {\r
	313	//\r
	314	// Save BSP processor info and microcode info for later AP use.\r
	315	//\r
	316	CpuMpData->ProcessorSignature = Eax.Uint32;\r
	317	CpuMpData->ProcessorFlags = ProcessorFlags;\r
	318	CpuMpData->MicrocodeDataAddress = (UINTN) MicrocodeData;\r
	319	CpuMpData->MicrocodeRevision = LatestRevision;\r
	320	DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], ProcessorFlags [0x%08x], \\r
	321	MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, ProcessorFlags, (UINTN) MicrocodeData, LatestRevision));\r
	322	}\r
94f63c76	323	}\r