]> git.proxmox.com Git - mirror_edk2.git/blame - UefiCpuPkg/Library/MpInitLib/MpLib.h
UefiCpuPkg/MpInitLib: Fill MP_CPU_EXCHANGE_INFO fields
[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h
CommitLineData
3e8ad6bd
JF
1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
4 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#ifndef _MP_LIB_H_\r
16#define _MP_LIB_H_\r
17\r
18#include <PiPei.h>\r
19\r
20#include <Register/Cpuid.h>\r
21#include <Register/Msr.h>\r
22#include <Register/LocalApic.h>\r
23#include <Register/Microcode.h>\r
24\r
25#include <Library/MpInitLib.h>\r
26#include <Library/BaseLib.h>\r
27#include <Library/BaseMemoryLib.h>\r
28#include <Library/MemoryAllocationLib.h>\r
29#include <Library/DebugLib.h>\r
30#include <Library/LocalApicLib.h>\r
31#include <Library/CpuLib.h>\r
32#include <Library/UefiCpuLib.h>\r
33#include <Library/TimerLib.h>\r
34#include <Library/SynchronizationLib.h>\r
35#include <Library/MtrrLib.h>\r
36#include <Library/HobLib.h>\r
37\r
b8b04307
JF
38#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
39\r
93ca4c0f
JF
40#define CPU_INIT_MP_LIB_HOB_GUID \\r
41 { \\r
42 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
43 }\r
44\r
9ebcf0f4
JF
45//\r
46// AP loop state when APs are in idle state\r
47// It's value is the same with PcdCpuApLoopMode\r
48//\r
49typedef enum {\r
50 ApInHltLoop = 1,\r
51 ApInMwaitLoop = 2,\r
52 ApInRunLoop = 3\r
53} AP_LOOP_MODE;\r
54\r
e59f8f6b
JF
55//\r
56// AP initialization state during APs wakeup\r
57//\r
58typedef enum {\r
59 ApInitConfig = 1,\r
60 ApInitReconfig = 2,\r
61 ApInitDone = 3\r
62} AP_INIT_STATE;\r
63\r
03a1a925
JF
64//\r
65// AP state\r
66//\r
67typedef enum {\r
68 CpuStateIdle,\r
69 CpuStateReady,\r
70 CpuStateBusy,\r
71 CpuStateFinished,\r
72 CpuStateDisabled\r
73} CPU_STATE;\r
74\r
68cb9330
JF
75//\r
76// CPU volatile registers around INIT-SIPI-SIPI\r
77//\r
78typedef struct {\r
79 UINTN Cr0;\r
80 UINTN Cr3;\r
81 UINTN Cr4;\r
82 UINTN Dr0;\r
83 UINTN Dr1;\r
84 UINTN Dr2;\r
85 UINTN Dr3;\r
86 UINTN Dr6;\r
87 UINTN Dr7;\r
88} CPU_VOLATILE_REGISTERS;\r
89\r
e59f8f6b
JF
90//\r
91// AP related data\r
92//\r
93typedef struct {\r
94 SPIN_LOCK ApLock;\r
95 volatile UINT32 *StartupApSignal;\r
96 volatile UINTN ApFunction;\r
97 volatile UINTN ApFunctionArgument;\r
98 UINT32 InitialApicId;\r
99 UINT32 ApicId;\r
100 UINT32 Health;\r
101 BOOLEAN CpuHealthy;\r
03a1a925 102 volatile CPU_STATE State;\r
68cb9330 103 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
e59f8f6b
JF
104 BOOLEAN Waiting;\r
105 BOOLEAN *Finished;\r
106 UINT64 ExpectedTime;\r
107 UINT64 CurrentTime;\r
108 UINT64 TotalTime;\r
109 EFI_EVENT WaitEvent;\r
110} CPU_AP_DATA;\r
111\r
112//\r
113// Basic CPU information saved in Guided HOB.\r
114// Because the contents will be shard between PEI and DXE,\r
115// we need to make sure the each fields offset same in different\r
116// architecture.\r
117//\r
118typedef struct {\r
119 UINT32 InitialApicId;\r
120 UINT32 ApicId;\r
121 UINT32 Health;\r
122} CPU_INFO_IN_HOB;\r
123\r
f7f85d83
JF
124//\r
125// AP reset code information including code address and size,\r
126// this structure will be shared be C code and assembly code.\r
127// It is natural aligned by design.\r
128//\r
129typedef struct {\r
130 UINT8 *RendezvousFunnelAddress;\r
131 UINTN ModeEntryOffset;\r
132 UINTN RendezvousFunnelSize;\r
133 UINT8 *RelocateApLoopFuncAddress;\r
134 UINTN RelocateApLoopFuncSize;\r
135} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 136\r
e59f8f6b
JF
137typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
138\r
d94e5f67
JF
139#pragma pack(1)\r
140\r
141//\r
142// MP CPU exchange information for AP reset code\r
143// This structure is required to be packed because fixed field offsets\r
144// into this structure are used in assembly code in this module\r
145//\r
146typedef struct {\r
147 UINTN Lock;\r
148 UINTN StackStart;\r
149 UINTN StackSize;\r
150 UINTN CFunction;\r
151 IA32_DESCRIPTOR GdtrProfile;\r
152 IA32_DESCRIPTOR IdtrProfile;\r
153 UINTN BufferStart;\r
154 UINTN ModeOffset;\r
155 UINTN NumApsExecuting;\r
156 UINTN CodeSegment;\r
157 UINTN DataSegment;\r
5c66d125 158 UINTN EnableExecuteDisable;\r
d94e5f67 159 UINTN Cr3;\r
e59f8f6b 160 CPU_MP_DATA *CpuMpData;\r
d94e5f67
JF
161} MP_CPU_EXCHANGE_INFO;\r
162\r
163#pragma pack()\r
e59f8f6b
JF
164\r
165//\r
166// CPU MP Data save in memory\r
167//\r
168struct _CPU_MP_DATA {\r
169 UINT64 CpuInfoInHob;\r
170 UINT32 CpuCount;\r
171 UINT32 BspNumber;\r
172 //\r
173 // The above fields data will be passed from PEI to DXE\r
174 // Please make sure the fields offset same in the different\r
175 // architecture.\r
176 //\r
177 SPIN_LOCK MpLock;\r
178 UINTN Buffer;\r
179 UINTN CpuApStackSize;\r
180 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
181 UINTN WakeupBuffer;\r
182 UINTN BackupBuffer;\r
183 UINTN BackupBufferSize;\r
184 BOOLEAN EndOfPeiFlag;\r
185\r
186 volatile UINT32 StartCount;\r
187 volatile UINT32 FinishedCount;\r
188 volatile UINT32 RunningCount;\r
189 BOOLEAN SingleThread;\r
190 EFI_AP_PROCEDURE Procedure;\r
191 VOID *ProcArguments;\r
192 BOOLEAN *Finished;\r
193 UINT64 ExpectedTime;\r
194 UINT64 CurrentTime;\r
195 UINT64 TotalTime;\r
196 EFI_EVENT WaitEvent;\r
197 UINTN **FailedCpuList;\r
198\r
199 AP_INIT_STATE InitFlag;\r
200 BOOLEAN X2ApicEnable;\r
201 MTRR_SETTINGS MtrrTable;\r
202 UINT8 ApLoopMode;\r
203 UINT8 ApTargetCState;\r
204 UINT16 PmCodeSegment;\r
205 CPU_AP_DATA *CpuData;\r
206 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
207};\r
93ca4c0f
JF
208\r
209extern EFI_GUID mCpuInitMpLibHobGuid;\r
210\r
76157021
JF
211/**\r
212 Assembly code to place AP into safe loop mode.\r
213\r
214 Place AP into targeted C-State if MONITOR is supported, otherwise\r
215 place AP into hlt state.\r
216 Place AP in protected mode if the current is long mode. Due to AP maybe\r
217 wakeup by some hardware event. It could avoid accessing page table that\r
218 may not available during booting to OS.\r
219\r
220 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
221 FALSE indicates MONITOR is not supported.\r
222 @param[in] ApTargetCState Target C-State value.\r
223 @param[in] PmCodeSegment Protected mode code segment value.\r
224**/\r
225typedef\r
226VOID\r
227(EFIAPI * ASM_RELOCATE_AP_LOOP) (\r
228 IN BOOLEAN MwaitSupport,\r
229 IN UINTN ApTargetCState,\r
230 IN UINTN PmCodeSegment\r
231 );\r
f7f85d83
JF
232\r
233/**\r
234 Assembly code to get starting address and size of the rendezvous entry for APs.\r
235 Information for fixing a jump instruction in the code is also returned.\r
236\r
237 @param[out] AddressMap Output buffer for address map information.\r
238**/\r
239VOID\r
240EFIAPI\r
241AsmGetAddressMap (\r
242 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
243 );\r
244\r
93ca4c0f
JF
245/**\r
246 Get the pointer to CPU MP Data structure.\r
247\r
248 @return The pointer to CPU MP Data structure.\r
249**/\r
250CPU_MP_DATA *\r
251GetCpuMpData (\r
252 VOID\r
253 );\r
254\r
255/**\r
256 Save the pointer to CPU MP Data structure.\r
257\r
258 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
259**/\r
260VOID\r
261SaveCpuMpData (\r
262 IN CPU_MP_DATA *CpuMpData\r
263 );\r
264\r
ed66e0e3
JF
265/**\r
266 Allocate reset vector buffer.\r
267\r
268 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
269**/\r
270VOID\r
271AllocateResetVector (\r
272 IN OUT CPU_MP_DATA *CpuMpData\r
273 );\r
274\r
275/**\r
276 Free AP reset vector buffer.\r
277\r
278 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
279**/\r
280VOID\r
281FreeResetVector (\r
282 IN CPU_MP_DATA *CpuMpData\r
283 );\r
284\r
93ca4c0f
JF
285/**\r
286 Initialize global data for MP support.\r
287\r
288 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
289**/\r
290VOID\r
291InitMpGlobalData (\r
292 IN CPU_MP_DATA *CpuMpData\r
293 );\r
294\r
295/**\r
296 Get pointer to CPU MP Data structure from GUIDed HOB.\r
297\r
298 @return The pointer to CPU MP Data structure.\r
299**/\r
300CPU_MP_DATA *\r
301GetCpuMpDataFromGuidedHob (\r
302 VOID\r
303 );\r
304 \r
94f63c76
JF
305/**\r
306 Detect whether specified processor can find matching microcode patch and load it.\r
307\r
308 @param[in] PeiCpuMpData Pointer to PEI CPU MP Data\r
309**/\r
310VOID\r
311MicrocodeDetect (\r
312 IN CPU_MP_DATA *CpuMpData\r
313 );\r
314\r
6dc05093
JF
315/**\r
316 Notify function on End Of PEI PPI.\r
317\r
318 On S3 boot, this function will restore wakeup buffer data.\r
319 On normal boot, this function will flag wakeup buffer to be un-used type.\r
320\r
321 @param[in] PeiServices The pointer to the PEI Services Table.\r
322 @param[in] NotifyDescriptor Address of the notification descriptor data structure.\r
323 @param[in] Ppi Address of the PPI that was installed.\r
324\r
325 @retval EFI_SUCCESS When everything is OK.\r
326**/\r
327EFI_STATUS\r
328EFIAPI\r
329CpuMpEndOfPeiCallback (\r
330 IN EFI_PEI_SERVICES **PeiServices,\r
331 IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
332 IN VOID *Ppi\r
333 );\r
334\r
3e8ad6bd
JF
335#endif\r
336\r