UefiCpuPkg/MpInitLib: Remove Executable attribute from MpLib.h
[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h
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1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
08a475df 4 Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>\r
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5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
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18#include <Register/Intel/Msr.h>\r
19#include <Register/Intel/LocalApic.h>\r
20#include <Register/Intel/Microcode.h>\r
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21\r
22#include <Library/MpInitLib.h>\r
23#include <Library/BaseLib.h>\r
24#include <Library/BaseMemoryLib.h>\r
25#include <Library/MemoryAllocationLib.h>\r
26#include <Library/DebugLib.h>\r
27#include <Library/LocalApicLib.h>\r
28#include <Library/CpuLib.h>\r
29#include <Library/UefiCpuLib.h>\r
30#include <Library/TimerLib.h>\r
31#include <Library/SynchronizationLib.h>\r
32#include <Library/MtrrLib.h>\r
33#include <Library/HobLib.h>\r
d5339c04 34#include <Library/PcdLib.h>\r
3e8ad6bd 35\r
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36#include <Guid/MicrocodePatchHob.h>\r
37\r
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38#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
39\r
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40#define CPU_INIT_MP_LIB_HOB_GUID \\r
41 { \\r
42 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
43 }\r
44\r
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45//\r
46// The MP data for switch BSP\r
47//\r
48#define CPU_SWITCH_STATE_IDLE 0\r
49#define CPU_SWITCH_STATE_STORED 1\r
50#define CPU_SWITCH_STATE_LOADED 2\r
51\r
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52//\r
53// Default maximum number of entries to store the microcode patches information\r
54//\r
55#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
56\r
57//\r
58// Data structure for microcode patch information\r
59//\r
60typedef struct {\r
61 UINTN Address;\r
62 UINTN Size;\r
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63} MICROCODE_PATCH_INFO;\r
64\r
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65//\r
66// CPU exchange information for switch BSP\r
67//\r
68typedef struct {\r
69 UINT8 State; // offset 0\r
70 UINTN StackPointer; // offset 4 / 8\r
71 IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
72 IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
73} CPU_EXCHANGE_ROLE_INFO;\r
74\r
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75//\r
76// AP loop state when APs are in idle state\r
77// It's value is the same with PcdCpuApLoopMode\r
78//\r
79typedef enum {\r
80 ApInHltLoop = 1,\r
81 ApInMwaitLoop = 2,\r
82 ApInRunLoop = 3\r
83} AP_LOOP_MODE;\r
84\r
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85//\r
86// AP initialization state during APs wakeup\r
87//\r
88typedef enum {\r
89 ApInitConfig = 1,\r
90 ApInitReconfig = 2,\r
91 ApInitDone = 3\r
92} AP_INIT_STATE;\r
93\r
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94//\r
95// AP state\r
96//\r
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97// The state transitions for an AP when it process a procedure are:\r
98// Idle ----> Ready ----> Busy ----> Idle\r
99// [BSP] [AP] [AP]\r
100//\r
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101typedef enum {\r
102 CpuStateIdle,\r
103 CpuStateReady,\r
104 CpuStateBusy,\r
e048ce88 105 CpuStateFinished,\r
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106 CpuStateDisabled\r
107} CPU_STATE;\r
108\r
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109//\r
110// CPU volatile registers around INIT-SIPI-SIPI\r
111//\r
112typedef struct {\r
113 UINTN Cr0;\r
114 UINTN Cr3;\r
115 UINTN Cr4;\r
116 UINTN Dr0;\r
117 UINTN Dr1;\r
118 UINTN Dr2;\r
119 UINTN Dr3;\r
120 UINTN Dr6;\r
121 UINTN Dr7;\r
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122 IA32_DESCRIPTOR Gdtr;\r
123 IA32_DESCRIPTOR Idtr;\r
124 UINT16 Tr;\r
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125} CPU_VOLATILE_REGISTERS;\r
126\r
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127//\r
128// AP related data\r
129//\r
130typedef struct {\r
131 SPIN_LOCK ApLock;\r
132 volatile UINT32 *StartupApSignal;\r
133 volatile UINTN ApFunction;\r
134 volatile UINTN ApFunctionArgument;\r
e59f8f6b 135 BOOLEAN CpuHealthy;\r
03a1a925 136 volatile CPU_STATE State;\r
68cb9330 137 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
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138 BOOLEAN Waiting;\r
139 BOOLEAN *Finished;\r
140 UINT64 ExpectedTime;\r
141 UINT64 CurrentTime;\r
142 UINT64 TotalTime;\r
143 EFI_EVENT WaitEvent;\r
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144 UINT32 ProcessorSignature;\r
145 UINT8 PlatformId;\r
e1ed5573 146 UINT64 MicrocodeEntryAddr;\r
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147} CPU_AP_DATA;\r
148\r
149//\r
150// Basic CPU information saved in Guided HOB.\r
151// Because the contents will be shard between PEI and DXE,\r
152// we need to make sure the each fields offset same in different\r
153// architecture.\r
154//\r
dd3fa0cd 155#pragma pack (1)\r
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156typedef struct {\r
157 UINT32 InitialApicId;\r
158 UINT32 ApicId;\r
159 UINT32 Health;\r
dd3fa0cd 160 UINT64 ApTopOfStack;\r
e59f8f6b 161} CPU_INFO_IN_HOB;\r
dd3fa0cd 162#pragma pack ()\r
e59f8f6b 163\r
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164//\r
165// AP reset code information including code address and size,\r
166// this structure will be shared be C code and assembly code.\r
167// It is natural aligned by design.\r
168//\r
169typedef struct {\r
170 UINT8 *RendezvousFunnelAddress;\r
171 UINTN ModeEntryOffset;\r
172 UINTN RendezvousFunnelSize;\r
173 UINT8 *RelocateApLoopFuncAddress;\r
174 UINTN RelocateApLoopFuncSize;\r
f32bfe6d 175 UINTN ModeTransitionOffset;\r
f7f85d83 176} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 177\r
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178typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
179\r
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180#pragma pack(1)\r
181\r
182//\r
183// MP CPU exchange information for AP reset code\r
184// This structure is required to be packed because fixed field offsets\r
185// into this structure are used in assembly code in this module\r
186//\r
187typedef struct {\r
188 UINTN Lock;\r
189 UINTN StackStart;\r
190 UINTN StackSize;\r
191 UINTN CFunction;\r
192 IA32_DESCRIPTOR GdtrProfile;\r
193 IA32_DESCRIPTOR IdtrProfile;\r
194 UINTN BufferStart;\r
195 UINTN ModeOffset;\r
37676b9f 196 UINTN ApIndex;\r
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197 UINTN CodeSegment;\r
198 UINTN DataSegment;\r
5c66d125 199 UINTN EnableExecuteDisable;\r
d94e5f67 200 UINTN Cr3;\r
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201 UINTN InitFlag;\r
202 CPU_INFO_IN_HOB *CpuInfo;\r
0594ec41 203 UINTN NumApsExecuting;\r
e59f8f6b 204 CPU_MP_DATA *CpuMpData;\r
3b2928b4 205 UINTN InitializeFloatingPointUnitsAddress;\r
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206 UINT32 ModeTransitionMemory;\r
207 UINT16 ModeTransitionSegment;\r
208 UINT32 ModeHighMemory;\r
209 UINT16 ModeHighSegment;\r
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210 //\r
211 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
212 //\r
213 BOOLEAN Enable5LevelPaging;\r
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214} MP_CPU_EXCHANGE_INFO;\r
215\r
216#pragma pack()\r
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217\r
218//\r
219// CPU MP Data save in memory\r
220//\r
221struct _CPU_MP_DATA {\r
222 UINT64 CpuInfoInHob;\r
223 UINT32 CpuCount;\r
224 UINT32 BspNumber;\r
225 //\r
226 // The above fields data will be passed from PEI to DXE\r
227 // Please make sure the fields offset same in the different\r
228 // architecture.\r
229 //\r
230 SPIN_LOCK MpLock;\r
231 UINTN Buffer;\r
232 UINTN CpuApStackSize;\r
233 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
234 UINTN WakeupBuffer;\r
66833b2a 235 UINTN WakeupBufferHigh;\r
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236 UINTN BackupBuffer;\r
237 UINTN BackupBufferSize;\r
e59f8f6b 238\r
e59f8f6b 239 volatile UINT32 FinishedCount;\r
2da3e96c 240 UINT32 RunningCount;\r
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241 BOOLEAN SingleThread;\r
242 EFI_AP_PROCEDURE Procedure;\r
243 VOID *ProcArguments;\r
244 BOOLEAN *Finished;\r
245 UINT64 ExpectedTime;\r
246 UINT64 CurrentTime;\r
247 UINT64 TotalTime;\r
248 EFI_EVENT WaitEvent;\r
249 UINTN **FailedCpuList;\r
250\r
251 AP_INIT_STATE InitFlag;\r
41be0da5 252 BOOLEAN SwitchBspFlag;\r
b3775af2 253 UINTN NewBspNumber;\r
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254 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
255 CPU_EXCHANGE_ROLE_INFO APInfo;\r
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256 MTRR_SETTINGS MtrrTable;\r
257 UINT8 ApLoopMode;\r
258 UINT8 ApTargetCState;\r
259 UINT16 PmCodeSegment;\r
260 CPU_AP_DATA *CpuData;\r
261 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
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262\r
263 UINT32 CurrentTimerCount;\r
264 UINTN DivideValue;\r
265 UINT8 Vector;\r
266 BOOLEAN PeriodicMode;\r
267 BOOLEAN TimerInterruptState;\r
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268 UINT64 MicrocodePatchAddress;\r
269 UINT64 MicrocodePatchRegionSize;\r
2a089134 270\r
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271 //\r
272 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
273 // Two cases need to set this value to TRUE. One is in HLT\r
274 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 275 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
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276 // driver.\r
277 //\r
278 BOOLEAN WakeUpByInitSipiSipi;\r
e59f8f6b 279};\r
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280\r
281extern EFI_GUID mCpuInitMpLibHobGuid;\r
282\r
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283/**\r
284 Assembly code to place AP into safe loop mode.\r
285\r
286 Place AP into targeted C-State if MONITOR is supported, otherwise\r
287 place AP into hlt state.\r
288 Place AP in protected mode if the current is long mode. Due to AP maybe\r
289 wakeup by some hardware event. It could avoid accessing page table that\r
290 may not available during booting to OS.\r
291\r
292 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
293 FALSE indicates MONITOR is not supported.\r
294 @param[in] ApTargetCState Target C-State value.\r
295 @param[in] PmCodeSegment Protected mode code segment value.\r
296**/\r
297typedef\r
298VOID\r
299(EFIAPI * ASM_RELOCATE_AP_LOOP) (\r
300 IN BOOLEAN MwaitSupport,\r
301 IN UINTN ApTargetCState,\r
bf2786dc 302 IN UINTN PmCodeSegment,\r
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303 IN UINTN TopOfApStack,\r
304 IN UINTN NumberToFinish\r
76157021 305 );\r
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306\r
307/**\r
308 Assembly code to get starting address and size of the rendezvous entry for APs.\r
309 Information for fixing a jump instruction in the code is also returned.\r
310\r
311 @param[out] AddressMap Output buffer for address map information.\r
312**/\r
313VOID\r
314EFIAPI\r
315AsmGetAddressMap (\r
316 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
317 );\r
318\r
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319/**\r
320 This function is called by both the BSP and the AP which is to become the BSP to\r
321 Exchange execution context including stack between them. After return from this\r
322 function, the BSP becomes AP and the AP becomes the BSP.\r
323\r
324 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
325 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
326\r
327**/\r
328VOID\r
329EFIAPI\r
330AsmExchangeRole (\r
331 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
332 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
333 );\r
334\r
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335/**\r
336 Get the pointer to CPU MP Data structure.\r
337\r
338 @return The pointer to CPU MP Data structure.\r
339**/\r
340CPU_MP_DATA *\r
341GetCpuMpData (\r
342 VOID\r
343 );\r
344\r
345/**\r
346 Save the pointer to CPU MP Data structure.\r
347\r
348 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
349**/\r
350VOID\r
351SaveCpuMpData (\r
352 IN CPU_MP_DATA *CpuMpData\r
353 );\r
354\r
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355\r
356/**\r
a6b3d753 357 Get available system memory below 1MB by specified size.\r
ed66e0e3 358\r
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359 @param[in] WakeupBufferSize Wakeup buffer size required\r
360\r
361 @retval other Return wakeup buffer address below 1MB.\r
362 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 363**/\r
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364UINTN\r
365GetWakeupBuffer (\r
366 IN UINTN WakeupBufferSize\r
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367 );\r
368\r
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369/**\r
370 Get available EfiBootServicesCode memory below 4GB by specified size.\r
371\r
372 This buffer is required to safely transfer AP from real address mode to\r
373 protected mode or long mode, due to the fact that the buffer returned by\r
374 GetWakeupBuffer() may be marked as non-executable.\r
375\r
376 @param[in] BufferSize Wakeup transition buffer size.\r
377\r
378 @retval other Return wakeup transition buffer address below 4GB.\r
379 @retval 0 Cannot find free memory below 4GB.\r
380**/\r
381UINTN\r
382GetModeTransitionBuffer (\r
383 IN UINTN BufferSize\r
384 );\r
385\r
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386/**\r
387 This function will be called by BSP to wakeup AP.\r
388\r
389 @param[in] CpuMpData Pointer to CPU MP Data\r
390 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
391 FALSE: Send IPI to AP by ApicId\r
392 @param[in] ProcessorNumber The handle number of specified processor\r
393 @param[in] Procedure The function to be invoked by AP\r
394 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 395 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
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396**/\r
397VOID\r
398WakeUpAP (\r
399 IN CPU_MP_DATA *CpuMpData,\r
400 IN BOOLEAN Broadcast,\r
401 IN UINTN ProcessorNumber,\r
402 IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
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403 IN VOID *ProcedureArgument, OPTIONAL\r
404 IN BOOLEAN WakeUpDisabledAps OPTIONAL\r
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405 );\r
406\r
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407/**\r
408 Initialize global data for MP support.\r
409\r
410 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
411**/\r
412VOID\r
413InitMpGlobalData (\r
414 IN CPU_MP_DATA *CpuMpData\r
415 );\r
416\r
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417/**\r
418 Worker function to execute a caller provided function on all enabled APs.\r
419\r
420 @param[in] Procedure A pointer to the function to be run on\r
421 enabled APs of the system.\r
422 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
423 the function specified by Procedure one by\r
424 one, in ascending order of processor handle\r
425 number. If FALSE, then all the enabled APs\r
426 execute the function specified by Procedure\r
427 simultaneously.\r
ee0c39fa 428 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
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429 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
430 service.\r
367284e7 431 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
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432 APs to return from Procedure, either for\r
433 blocking or non-blocking mode.\r
434 @param[in] ProcedureArgument The parameter passed into Procedure for\r
435 all APs.\r
436 @param[out] FailedCpuList If all APs finish successfully, then its\r
437 content is set to NULL. If not all APs\r
438 finish before timeout expires, then its\r
439 content is set to address of the buffer\r
440 holding handle numbers of the failed APs.\r
441\r
442 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
443 the timeout expired.\r
444 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
445 to all enabled APs.\r
446 @retval others Failed to Startup all APs.\r
447\r
448**/\r
449EFI_STATUS\r
ee0c39fa 450StartupAllCPUsWorker (\r
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451 IN EFI_AP_PROCEDURE Procedure,\r
452 IN BOOLEAN SingleThread,\r
ee0c39fa 453 IN BOOLEAN ExcludeBsp,\r
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454 IN EFI_EVENT WaitEvent OPTIONAL,\r
455 IN UINTN TimeoutInMicroseconds,\r
456 IN VOID *ProcedureArgument OPTIONAL,\r
457 OUT UINTN **FailedCpuList OPTIONAL\r
458 );\r
459\r
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460/**\r
461 Worker function to let the caller get one enabled AP to execute a caller-provided\r
462 function.\r
463\r
464 @param[in] Procedure A pointer to the function to be run on\r
465 enabled APs of the system.\r
466 @param[in] ProcessorNumber The handle number of the AP.\r
467 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
468 service.\r
367284e7 469 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
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470 APs to return from Procedure, either for\r
471 blocking or non-blocking mode.\r
472 @param[in] ProcedureArgument The parameter passed into Procedure for\r
473 all APs.\r
474 @param[out] Finished If AP returns from Procedure before the\r
475 timeout expires, its content is set to TRUE.\r
476 Otherwise, the value is set to FALSE.\r
477\r
478 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
479 the timeout expires.\r
480 @retval others Failed to Startup AP.\r
481\r
482**/\r
483EFI_STATUS\r
484StartupThisAPWorker (\r
485 IN EFI_AP_PROCEDURE Procedure,\r
486 IN UINTN ProcessorNumber,\r
487 IN EFI_EVENT WaitEvent OPTIONAL,\r
488 IN UINTN TimeoutInMicroseconds,\r
489 IN VOID *ProcedureArgument OPTIONAL,\r
490 OUT BOOLEAN *Finished OPTIONAL\r
491 );\r
492\r
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493/**\r
494 Worker function to switch the requested AP to be the BSP from that point onward.\r
495\r
496 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
497 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
498 enabled AP. Otherwise, it will be disabled.\r
499\r
500 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 501 @retval others Failed to switch BSP.\r
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502\r
503**/\r
504EFI_STATUS\r
505SwitchBSPWorker (\r
506 IN UINTN ProcessorNumber,\r
507 IN BOOLEAN EnableOldBSP\r
508 );\r
509\r
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510/**\r
511 Worker function to let the caller enable or disable an AP from this point onward.\r
512 This service may only be called from the BSP.\r
513\r
514 @param[in] ProcessorNumber The handle number of AP.\r
515 @param[in] EnableAP Specifies the new state for the processor for\r
516 enabled, FALSE for disabled.\r
517 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
518 the new health status of the AP.\r
519\r
520 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
521 @retval others Failed to Enable/Disable AP.\r
522\r
523**/\r
524EFI_STATUS\r
525EnableDisableApWorker (\r
526 IN UINTN ProcessorNumber,\r
527 IN BOOLEAN EnableAP,\r
528 IN UINT32 *HealthFlag OPTIONAL\r
529 );\r
530\r
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531/**\r
532 Get pointer to CPU MP Data structure from GUIDed HOB.\r
533\r
534 @return The pointer to CPU MP Data structure.\r
535**/\r
536CPU_MP_DATA *\r
537GetCpuMpDataFromGuidedHob (\r
538 VOID\r
539 );\r
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540\r
541/** Checks status of specified AP.\r
542\r
543 This function checks whether the specified AP has finished the task assigned\r
544 by StartupThisAP(), and whether timeout expires.\r
545\r
546 @param[in] ProcessorNumber The handle number of processor.\r
547\r
548 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
549 @retval EFI_TIMEOUT The timeout expires.\r
550 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
551**/\r
552EFI_STATUS\r
553CheckThisAP (\r
554 IN UINTN ProcessorNumber\r
555 );\r
556\r
557/**\r
558 Checks status of all APs.\r
559\r
560 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
561 and whether timeout expires.\r
562\r
563 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
564 @retval EFI_TIMEOUT The timeout expires.\r
565 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
566**/\r
567EFI_STATUS\r
568CheckAllAPs (\r
569 VOID\r
570 );\r
571\r
572/**\r
573 Checks APs status and updates APs status if needed.\r
574\r
575**/\r
576VOID\r
577CheckAndUpdateApsStatus (\r
578 VOID\r
579 );\r
580\r
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581/**\r
582 Detect whether specified processor can find matching microcode patch and load it.\r
583\r
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584 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
585 @param[in] ProcessorNumber The handle number of the processor. The range is\r
586 from 0 to the total number of logical processors\r
587 minus 1.\r
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588**/\r
589VOID\r
590MicrocodeDetect (\r
2a089134 591 IN CPU_MP_DATA *CpuMpData,\r
e1ed5573 592 IN UINTN ProcessorNumber\r
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593 );\r
594\r
d786a172 595/**\r
dd017041 596 Shadow the required microcode patches data into memory.\r
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597\r
598 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
599**/\r
600VOID\r
dd017041 601ShadowMicrocodeUpdatePatch (\r
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602 IN OUT CPU_MP_DATA *CpuMpData\r
603 );\r
604\r
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605/**\r
606 Get the cached microcode patch base address and size from the microcode patch\r
607 information cache HOB.\r
608\r
609 @param[out] Address Base address of the microcode patches data.\r
610 It will be updated if the microcode patch\r
611 information cache HOB is found.\r
612 @param[out] RegionSize Size of the microcode patches data.\r
613 It will be updated if the microcode patch\r
614 information cache HOB is found.\r
615\r
616 @retval TRUE The microcode patch information cache HOB is found.\r
617 @retval FALSE The microcode patch information cache HOB is not found.\r
618\r
619**/\r
620BOOLEAN\r
621GetMicrocodePatchInfoFromHob (\r
622 UINT64 *Address,\r
623 UINT64 *RegionSize\r
624 );\r
625\r
4d3314f6
JF
626/**\r
627 Detect whether Mwait-monitor feature is supported.\r
628\r
629 @retval TRUE Mwait-monitor feature is supported.\r
630 @retval FALSE Mwait-monitor feature is not supported.\r
631**/\r
632BOOLEAN\r
633IsMwaitSupport (\r
634 VOID\r
635 );\r
636\r
43c9fdcc
JF
637/**\r
638 Enable Debug Agent to support source debugging on AP function.\r
639\r
640**/\r
641VOID\r
642EnableDebugAgent (\r
643 VOID\r
644 );\r
645\r
e1ed5573
HW
646/**\r
647 Find the current Processor number by APIC ID.\r
648\r
649 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
650 @param[out] ProcessorNumber Return the pocessor number found\r
651\r
652 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
653 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
654**/\r
655EFI_STATUS\r
656GetProcessorNumber (\r
657 IN CPU_MP_DATA *CpuMpData,\r
658 OUT UINTN *ProcessorNumber\r
659 );\r
660\r
c788c2b1
SF
661/**\r
662 This funtion will try to invoke platform specific microcode shadow logic to\r
663 relocate microcode update patches into memory.\r
664\r
4ac82ea1 665 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF
666\r
667 @retval EFI_SUCCESS Shadow microcode success.\r
668 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
669 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
670 PPI/Protocol.\r
671**/\r
672EFI_STATUS\r
673PlatformShadowMicrocode (\r
674 IN OUT CPU_MP_DATA *CpuMpData\r
675 );\r
676\r
3e8ad6bd
JF
677#endif\r
678\r