UefiCpuPkg/MpInitLib: fix feature test for Extended Topology CPUID leaf
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / PageTbl.c
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1/** @file\r
2Page table manipulation functions for IA-32 processors\r
3\r
fe3a75bc 4Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
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5This program and the accompanying materials\r
6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "PiSmmCpuDxeSmm.h"\r
16\r
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17/**\r
18 Create PageTable for SMM use.\r
19\r
20 @return PageTable Address\r
21\r
22**/\r
23UINT32\r
24SmmInitPageTable (\r
25 VOID\r
26 )\r
27{\r
28 UINTN PageFaultHandlerHookAddress;\r
29 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;\r
5c88af79 30 EFI_STATUS Status;\r
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31\r
32 //\r
33 // Initialize spin lock\r
34 //\r
fe3a75bc 35 InitializeSpinLock (mPFLock);\r
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36\r
37 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
38 //\r
39 // Set own Page Fault entry instead of the default one, because SMM Profile\r
40 // feature depends on IRET instruction to do Single Step\r
41 //\r
42 PageFaultHandlerHookAddress = (UINTN)PageFaultIdtHandlerSmmProfile;\r
43 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) gcSmiIdtr.Base;\r
44 IdtEntry += EXCEPT_IA32_PAGE_FAULT;\r
45 IdtEntry->Bits.OffsetLow = (UINT16)PageFaultHandlerHookAddress;\r
46 IdtEntry->Bits.Reserved_0 = 0;\r
47 IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
48 IdtEntry->Bits.OffsetHigh = (UINT16)(PageFaultHandlerHookAddress >> 16);\r
49 } else {\r
50 //\r
51 // Register SMM Page Fault Handler\r
52 //\r
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53 Status = SmmRegisterExceptionHandler (&mSmmCpuService, EXCEPT_IA32_PAGE_FAULT, SmiPFHandler);\r
54 ASSERT_EFI_ERROR (Status);\r
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55 }\r
56\r
57 //\r
58 // Additional SMM IDT initialization for SMM stack guard\r
59 //\r
60 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {\r
61 InitializeIDTSmmStackGuard ();\r
62 }\r
717fb604 63 return Gen4GPageTable (TRUE);\r
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64}\r
65\r
66/**\r
67 Page Fault handler for SMM use.\r
68\r
69**/\r
70VOID\r
71SmiDefaultPFHandler (\r
72 VOID\r
73 )\r
74{\r
75 CpuDeadLoop ();\r
76}\r
77\r
78/**\r
79 ThePage Fault handler wrapper for SMM use.\r
80\r
81 @param InterruptType Defines the type of interrupt or exception that\r
82 occurred on the processor.This parameter is processor architecture specific.\r
83 @param SystemContext A pointer to the processor context when\r
84 the interrupt occurred on the processor.\r
85**/\r
86VOID\r
87EFIAPI\r
88SmiPFHandler (\r
89 IN EFI_EXCEPTION_TYPE InterruptType,\r
90 IN EFI_SYSTEM_CONTEXT SystemContext\r
91 )\r
92{\r
93 UINTN PFAddress;\r
94\r
95 ASSERT (InterruptType == EXCEPT_IA32_PAGE_FAULT);\r
96\r
fe3a75bc 97 AcquireSpinLock (mPFLock);\r
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98\r
99 PFAddress = AsmReadCr2 ();\r
100\r
101 if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&\r
102 (PFAddress >= mCpuHotPlugData.SmrrBase) &&\r
103 (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {\r
717fb604 104 DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));\r
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105 CpuDeadLoop ();\r
106 }\r
107\r
108 //\r
109 // If a page fault occurs in SMM range\r
110 //\r
111 if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
112 (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r
113 if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {\r
717fb604 114 DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress));\r
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115 DEBUG_CODE (\r
116 DumpModuleInfoByIp (*(UINTN *)(UINTN)SystemContext.SystemContextIa32->Esp);\r
117 );\r
118 CpuDeadLoop ();\r
119 }\r
120 }\r
121\r
122 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
123 SmmProfilePFHandler (\r
124 SystemContext.SystemContextIa32->Eip,\r
125 SystemContext.SystemContextIa32->ExceptionData\r
126 );\r
127 } else {\r
128 SmiDefaultPFHandler ();\r
129 }\r
130\r
fe3a75bc 131 ReleaseSpinLock (mPFLock);\r
7947da3c 132}\r
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133\r
134/**\r
135 This function sets memory attribute for page table.\r
136**/\r
137VOID\r
138SetPageTableAttributes (\r
139 VOID\r
140 )\r
141{\r
142 UINTN Index2;\r
143 UINTN Index3;\r
144 UINT64 *L1PageTable;\r
145 UINT64 *L2PageTable;\r
146 UINT64 *L3PageTable;\r
147 BOOLEAN IsSplitted;\r
148 BOOLEAN PageTableSplitted;\r
149\r
150 DEBUG ((DEBUG_INFO, "SetPageTableAttributes\n"));\r
151\r
152 //\r
153 // Disable write protection, because we need mark page table to be write protected.\r
154 // We need *write* page table memory, to mark itself to be *read only*.\r
155 //\r
156 AsmWriteCr0 (AsmReadCr0() & ~CR0_WP);\r
157\r
158 do {\r
159 DEBUG ((DEBUG_INFO, "Start...\n"));\r
160 PageTableSplitted = FALSE;\r
161\r
162 L3PageTable = (UINT64 *)GetPageTableBase ();\r
163\r
164 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS)(UINTN)L3PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);\r
165 PageTableSplitted = (PageTableSplitted || IsSplitted);\r
166\r
167 for (Index3 = 0; Index3 < 4; Index3++) {\r
168 L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & PAGING_4K_ADDRESS_MASK_64);\r
169 if (L2PageTable == NULL) {\r
170 continue;\r
171 }\r
172\r
173 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS)(UINTN)L2PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);\r
174 PageTableSplitted = (PageTableSplitted || IsSplitted);\r
175\r
176 for (Index2 = 0; Index2 < SIZE_4KB/sizeof(UINT64); Index2++) {\r
177 if ((L2PageTable[Index2] & IA32_PG_PS) != 0) {\r
178 // 2M\r
179 continue;\r
180 }\r
181 L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & PAGING_4K_ADDRESS_MASK_64);\r
182 if (L1PageTable == NULL) {\r
183 continue;\r
184 }\r
185 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS)(UINTN)L1PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);\r
186 PageTableSplitted = (PageTableSplitted || IsSplitted);\r
187 }\r
188 }\r
189 } while (PageTableSplitted);\r
190\r
191 //\r
192 // Enable write protection, after page table updated.\r
193 //\r
194 AsmWriteCr0 (AsmReadCr0() | CR0_WP);\r
195\r
196 return ;\r
197}\r