UefiCpuPkg/dec: Add PcdCpuSmmStaticPageTable.
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / PageTbl.c
CommitLineData
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1/** @file\r
2Page table manipulation functions for IA-32 processors\r
3\r
fe3a75bc 4Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
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5This program and the accompanying materials\r
6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "PiSmmCpuDxeSmm.h"\r
16\r
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17/**\r
18 Create PageTable for SMM use.\r
19\r
20 @return PageTable Address\r
21\r
22**/\r
23UINT32\r
24SmmInitPageTable (\r
25 VOID\r
26 )\r
27{\r
28 UINTN PageFaultHandlerHookAddress;\r
29 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;\r
30\r
31 //\r
32 // Initialize spin lock\r
33 //\r
fe3a75bc 34 InitializeSpinLock (mPFLock);\r
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35\r
36 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
37 //\r
38 // Set own Page Fault entry instead of the default one, because SMM Profile\r
39 // feature depends on IRET instruction to do Single Step\r
40 //\r
41 PageFaultHandlerHookAddress = (UINTN)PageFaultIdtHandlerSmmProfile;\r
42 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) gcSmiIdtr.Base;\r
43 IdtEntry += EXCEPT_IA32_PAGE_FAULT;\r
44 IdtEntry->Bits.OffsetLow = (UINT16)PageFaultHandlerHookAddress;\r
45 IdtEntry->Bits.Reserved_0 = 0;\r
46 IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
47 IdtEntry->Bits.OffsetHigh = (UINT16)(PageFaultHandlerHookAddress >> 16);\r
48 } else {\r
49 //\r
50 // Register SMM Page Fault Handler\r
51 //\r
52 SmmRegisterExceptionHandler (&mSmmCpuService, EXCEPT_IA32_PAGE_FAULT, SmiPFHandler);\r
53 }\r
54\r
55 //\r
56 // Additional SMM IDT initialization for SMM stack guard\r
57 //\r
58 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {\r
59 InitializeIDTSmmStackGuard ();\r
60 }\r
881520ea 61 return Gen4GPageTable (0, TRUE);\r
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62}\r
63\r
64/**\r
65 Page Fault handler for SMM use.\r
66\r
67**/\r
68VOID\r
69SmiDefaultPFHandler (\r
70 VOID\r
71 )\r
72{\r
73 CpuDeadLoop ();\r
74}\r
75\r
76/**\r
77 ThePage Fault handler wrapper for SMM use.\r
78\r
79 @param InterruptType Defines the type of interrupt or exception that\r
80 occurred on the processor.This parameter is processor architecture specific.\r
81 @param SystemContext A pointer to the processor context when\r
82 the interrupt occurred on the processor.\r
83**/\r
84VOID\r
85EFIAPI\r
86SmiPFHandler (\r
87 IN EFI_EXCEPTION_TYPE InterruptType,\r
88 IN EFI_SYSTEM_CONTEXT SystemContext\r
89 )\r
90{\r
91 UINTN PFAddress;\r
92\r
93 ASSERT (InterruptType == EXCEPT_IA32_PAGE_FAULT);\r
94\r
fe3a75bc 95 AcquireSpinLock (mPFLock);\r
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96\r
97 PFAddress = AsmReadCr2 ();\r
98\r
99 if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&\r
100 (PFAddress >= mCpuHotPlugData.SmrrBase) &&\r
101 (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {\r
102 DEBUG ((EFI_D_ERROR, "SMM stack overflow!\n"));\r
103 CpuDeadLoop ();\r
104 }\r
105\r
106 //\r
107 // If a page fault occurs in SMM range\r
108 //\r
109 if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
110 (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r
111 if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {\r
112 DEBUG ((EFI_D_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress));\r
113 DEBUG_CODE (\r
114 DumpModuleInfoByIp (*(UINTN *)(UINTN)SystemContext.SystemContextIa32->Esp);\r
115 );\r
116 CpuDeadLoop ();\r
117 }\r
118 }\r
119\r
120 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
121 SmmProfilePFHandler (\r
122 SystemContext.SystemContextIa32->Eip,\r
123 SystemContext.SystemContextIa32->ExceptionData\r
124 );\r
125 } else {\r
126 SmiDefaultPFHandler ();\r
127 }\r
128\r
fe3a75bc 129 ReleaseSpinLock (mPFLock);\r
7947da3c 130}\r