]> git.proxmox.com Git - mirror_edk2.git/blame - UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c
UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiCr3" with PatchInstructionX86()
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmmProfileArch.c
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1/** @file\r
2IA-32 processor specific functions to enable SMM profile.\r
3\r
717fb604 4Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>\r
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5This program and the accompanying materials\r
6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "PiSmmCpuDxeSmm.h"\r
16#include "SmmProfileInternal.h"\r
17\r
18/**\r
19 Create SMM page table for S3 path.\r
20\r
21**/\r
22VOID\r
23InitSmmS3Cr3 (\r
24 VOID\r
25 )\r
26{\r
717fb604 27 mSmmS3ResumeState->SmmS3Cr3 = Gen4GPageTable (TRUE);\r
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28\r
29 return ;\r
30}\r
31\r
32/**\r
33 Allocate pages for creating 4KB-page based on 2MB-page when page fault happens.\r
34 32-bit firmware does not need it.\r
35\r
36**/\r
37VOID\r
38InitPagesForPFHandler (\r
39 VOID\r
40 )\r
41{\r
42}\r
43\r
44/**\r
45 Update page table to map the memory correctly in order to make the instruction\r
46 which caused page fault execute successfully. And it also save the original page\r
47 table to be restored in single-step exception. 32-bit firmware does not need it.\r
48\r
49 @param PageTable PageTable Address.\r
50 @param PFAddress The memory address which caused page fault exception.\r
51 @param CpuIndex The index of the processor.\r
52 @param ErrorCode The Error code of exception.\r
53 @param IsValidPFAddress The flag indicates if SMM profile data need be added.\r
54\r
55**/\r
56VOID\r
57RestorePageTableAbove4G (\r
58 UINT64 *PageTable,\r
59 UINT64 PFAddress,\r
60 UINTN CpuIndex,\r
61 UINTN ErrorCode,\r
62 BOOLEAN *IsValidPFAddress\r
63 )\r
64{\r
65}\r
66\r
67/**\r
68 Clear TF in FLAGS.\r
69\r
70 @param SystemContext A pointer to the processor context when\r
71 the interrupt occurred on the processor.\r
72\r
73**/\r
74VOID\r
75ClearTrapFlag (\r
76 IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
77 )\r
78{\r
79 SystemContext.SystemContextIa32->Eflags &= (UINTN) ~BIT8;\r
80}\r