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Commit | Line | Data |
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529a5a86 MK |
1 | /** @file\r |
2 | SMM MP service implementation\r | |
3 | \r | |
ec07fd0e | 4 | Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.<BR>\r |
241f9149 LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
0acd8697 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
529a5a86 MK |
8 | \r |
9 | **/\r | |
10 | \r | |
11 | #include "PiSmmCpuDxeSmm.h"\r | |
12 | \r | |
13 | //\r | |
14 | // Slots for all MTRR( FIXED MTRR + VARIABLE MTRR + MTRR_LIB_IA32_MTRR_DEF_TYPE)\r | |
15 | //\r | |
053e878b MK |
16 | MTRR_SETTINGS gSmiMtrrs;\r |
17 | UINT64 gPhyMask;\r | |
18 | SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData = NULL;\r | |
19 | UINTN mSmmMpSyncDataSize;\r | |
20 | SMM_CPU_SEMAPHORES mSmmCpuSemaphores;\r | |
21 | UINTN mSemaphoreSize;\r | |
22 | SPIN_LOCK *mPFLock = NULL;\r | |
23 | SMM_CPU_SYNC_MODE mCpuSmmSyncMode;\r | |
24 | BOOLEAN mMachineCheckSupported = FALSE;\r | |
25 | MM_COMPLETION mSmmStartupThisApToken;\r | |
26 | \r | |
c14c4719 WJ |
27 | //\r |
28 | // Processor specified by mPackageFirstThreadIndex[PackageIndex] will do the package-scope register check.\r | |
29 | //\r | |
30 | UINT32 *mPackageFirstThreadIndex = NULL;\r | |
31 | \r | |
053e878b | 32 | extern UINTN mSmmShadowStackSize;\r |
ef91b073 | 33 | \r |
529a5a86 MK |
34 | /**\r |
35 | Performs an atomic compare exchange operation to get semaphore.\r | |
36 | The compare exchange operation must be performed using\r | |
37 | MP safe mechanisms.\r | |
38 | \r | |
39 | @param Sem IN: 32-bit unsigned integer\r | |
40 | OUT: original integer - 1\r | |
41 | @return Original integer - 1\r | |
42 | \r | |
43 | **/\r | |
44 | UINT32\r | |
45 | WaitForSemaphore (\r | |
053e878b | 46 | IN OUT volatile UINT32 *Sem\r |
529a5a86 MK |
47 | )\r |
48 | {\r | |
053e878b | 49 | UINT32 Value;\r |
529a5a86 | 50 | \r |
053e878b | 51 | for ( ; ;) {\r |
529a5a86 | 52 | Value = *Sem;\r |
053e878b MK |
53 | if ((Value != 0) &&\r |
54 | (InterlockedCompareExchange32 (\r | |
55 | (UINT32 *)Sem,\r | |
56 | Value,\r | |
57 | Value - 1\r | |
58 | ) == Value))\r | |
59 | {\r | |
9001b750 LE |
60 | break;\r |
61 | }\r | |
053e878b | 62 | \r |
9001b750 LE |
63 | CpuPause ();\r |
64 | }\r | |
053e878b | 65 | \r |
529a5a86 MK |
66 | return Value - 1;\r |
67 | }\r | |
68 | \r | |
529a5a86 MK |
69 | /**\r |
70 | Performs an atomic compare exchange operation to release semaphore.\r | |
71 | The compare exchange operation must be performed using\r | |
72 | MP safe mechanisms.\r | |
73 | \r | |
74 | @param Sem IN: 32-bit unsigned integer\r | |
75 | OUT: original integer + 1\r | |
76 | @return Original integer + 1\r | |
77 | \r | |
78 | **/\r | |
79 | UINT32\r | |
80 | ReleaseSemaphore (\r | |
053e878b | 81 | IN OUT volatile UINT32 *Sem\r |
529a5a86 MK |
82 | )\r |
83 | {\r | |
053e878b | 84 | UINT32 Value;\r |
529a5a86 MK |
85 | \r |
86 | do {\r | |
87 | Value = *Sem;\r | |
88 | } while (Value + 1 != 0 &&\r | |
89 | InterlockedCompareExchange32 (\r | |
053e878b | 90 | (UINT32 *)Sem,\r |
529a5a86 MK |
91 | Value,\r |
92 | Value + 1\r | |
93 | ) != Value);\r | |
053e878b | 94 | \r |
529a5a86 MK |
95 | return Value + 1;\r |
96 | }\r | |
97 | \r | |
98 | /**\r | |
99 | Performs an atomic compare exchange operation to lock semaphore.\r | |
100 | The compare exchange operation must be performed using\r | |
101 | MP safe mechanisms.\r | |
102 | \r | |
103 | @param Sem IN: 32-bit unsigned integer\r | |
104 | OUT: -1\r | |
105 | @return Original integer\r | |
106 | \r | |
107 | **/\r | |
108 | UINT32\r | |
109 | LockdownSemaphore (\r | |
053e878b | 110 | IN OUT volatile UINT32 *Sem\r |
529a5a86 MK |
111 | )\r |
112 | {\r | |
053e878b | 113 | UINT32 Value;\r |
529a5a86 MK |
114 | \r |
115 | do {\r | |
116 | Value = *Sem;\r | |
117 | } while (InterlockedCompareExchange32 (\r | |
053e878b MK |
118 | (UINT32 *)Sem,\r |
119 | Value,\r | |
120 | (UINT32)-1\r | |
529a5a86 | 121 | ) != Value);\r |
053e878b | 122 | \r |
529a5a86 MK |
123 | return Value;\r |
124 | }\r | |
125 | \r | |
126 | /**\r | |
127 | Wait all APs to performs an atomic compare exchange operation to release semaphore.\r | |
128 | \r | |
129 | @param NumberOfAPs AP number\r | |
130 | \r | |
131 | **/\r | |
132 | VOID\r | |
133 | WaitForAllAPs (\r | |
053e878b | 134 | IN UINTN NumberOfAPs\r |
529a5a86 MK |
135 | )\r |
136 | {\r | |
053e878b | 137 | UINTN BspIndex;\r |
529a5a86 MK |
138 | \r |
139 | BspIndex = mSmmMpSyncData->BspIndex;\r | |
140 | while (NumberOfAPs-- > 0) {\r | |
ed3d5ecb | 141 | WaitForSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);\r |
529a5a86 MK |
142 | }\r |
143 | }\r | |
144 | \r | |
145 | /**\r | |
146 | Performs an atomic compare exchange operation to release semaphore\r | |
147 | for each AP.\r | |
148 | \r | |
149 | **/\r | |
150 | VOID\r | |
151 | ReleaseAllAPs (\r | |
152 | VOID\r | |
153 | )\r | |
154 | {\r | |
053e878b | 155 | UINTN Index;\r |
529a5a86 | 156 | \r |
70911f1f | 157 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r |
51dd408a | 158 | if (IsPresentAp (Index)) {\r |
ed3d5ecb | 159 | ReleaseSemaphore (mSmmMpSyncData->CpuData[Index].Run);\r |
529a5a86 MK |
160 | }\r |
161 | }\r | |
162 | }\r | |
163 | \r | |
164 | /**\r | |
c14c4719 WJ |
165 | Check whether the index of CPU perform the package level register\r |
166 | programming during System Management Mode initialization.\r | |
529a5a86 | 167 | \r |
c14c4719 WJ |
168 | The index of Processor specified by mPackageFirstThreadIndex[PackageIndex]\r |
169 | will do the package-scope register programming.\r | |
529a5a86 | 170 | \r |
c14c4719 WJ |
171 | @param[in] CpuIndex Processor Index.\r |
172 | \r | |
173 | @retval TRUE Perform the package level register programming.\r | |
174 | @retval FALSE Don't perform the package level register programming.\r | |
529a5a86 MK |
175 | \r |
176 | **/\r | |
177 | BOOLEAN\r | |
c14c4719 WJ |
178 | IsPackageFirstThread (\r |
179 | IN UINTN CpuIndex\r | |
529a5a86 MK |
180 | )\r |
181 | {\r | |
c14c4719 | 182 | UINT32 PackageIndex;\r |
529a5a86 | 183 | \r |
c14c4719 | 184 | PackageIndex = gSmmCpuPrivate->ProcessorInfo[CpuIndex].Location.Package;\r |
529a5a86 | 185 | \r |
c14c4719 WJ |
186 | ASSERT (mPackageFirstThreadIndex != NULL);\r |
187 | \r | |
188 | //\r | |
189 | // Set the value of mPackageFirstThreadIndex[PackageIndex].\r | |
190 | // The package-scope register are checked by the first processor (CpuIndex) in Package.\r | |
191 | //\r | |
192 | // If mPackageFirstThreadIndex[PackageIndex] equals to (UINT32)-1, then update\r | |
193 | // to current CpuIndex. If it doesn't equal to (UINT32)-1, don't change it.\r | |
194 | //\r | |
195 | if (mPackageFirstThreadIndex[PackageIndex] == (UINT32)-1) {\r | |
196 | mPackageFirstThreadIndex[PackageIndex] = (UINT32)CpuIndex;\r | |
529a5a86 MK |
197 | }\r |
198 | \r | |
c14c4719 WJ |
199 | return (BOOLEAN)(mPackageFirstThreadIndex[PackageIndex] == CpuIndex);\r |
200 | }\r | |
201 | \r | |
202 | /**\r | |
203 | Returns the Number of SMM Delayed & Blocked & Disabled Thread Count.\r | |
204 | \r | |
205 | @param[in,out] DelayedCount The Number of SMM Delayed Thread Count.\r | |
206 | @param[in,out] BlockedCount The Number of SMM Blocked Thread Count.\r | |
207 | @param[in,out] DisabledCount The Number of SMM Disabled Thread Count.\r | |
208 | \r | |
209 | **/\r | |
210 | VOID\r | |
211 | GetSmmDelayedBlockedDisabledCount (\r | |
212 | IN OUT UINT32 *DelayedCount,\r | |
213 | IN OUT UINT32 *BlockedCount,\r | |
214 | IN OUT UINT32 *DisabledCount\r | |
215 | )\r | |
216 | {\r | |
217 | UINTN Index;\r | |
053e878b | 218 | \r |
c14c4719 WJ |
219 | for (Index = 0; Index < mNumberOfCpus; Index++) {\r |
220 | if (IsPackageFirstThread (Index)) {\r | |
221 | if (DelayedCount != NULL) {\r | |
222 | *DelayedCount += (UINT32)SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmDelayed);\r | |
529a5a86 | 223 | }\r |
053e878b | 224 | \r |
c14c4719 WJ |
225 | if (BlockedCount != NULL) {\r |
226 | *BlockedCount += (UINT32)SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmBlocked);\r | |
529a5a86 | 227 | }\r |
053e878b | 228 | \r |
c14c4719 WJ |
229 | if (DisabledCount != NULL) {\r |
230 | *DisabledCount += (UINT32)SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmEnable);\r | |
231 | }\r | |
529a5a86 MK |
232 | }\r |
233 | }\r | |
c14c4719 | 234 | }\r |
529a5a86 | 235 | \r |
c14c4719 WJ |
236 | /**\r |
237 | Checks if all CPUs (except Blocked & Disabled) have checked in for this SMI run\r | |
238 | \r | |
239 | @retval TRUE if all CPUs the have checked in.\r | |
240 | @retval FALSE if at least one Normal AP hasn't checked in.\r | |
241 | \r | |
242 | **/\r | |
243 | BOOLEAN\r | |
244 | AllCpusInSmmExceptBlockedDisabled (\r | |
245 | VOID\r | |
246 | )\r | |
247 | {\r | |
248 | UINT32 BlockedCount;\r | |
249 | UINT32 DisabledCount;\r | |
250 | \r | |
251 | BlockedCount = 0;\r | |
252 | DisabledCount = 0;\r | |
253 | \r | |
254 | //\r | |
255 | // Check to make sure mSmmMpSyncData->Counter is valid and not locked.\r | |
256 | //\r | |
257 | ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);\r | |
258 | \r | |
259 | //\r | |
260 | // Check whether all CPUs in SMM.\r | |
261 | //\r | |
262 | if (*mSmmMpSyncData->Counter == mNumberOfCpus) {\r | |
263 | return TRUE;\r | |
264 | }\r | |
265 | \r | |
266 | //\r | |
267 | // Check for the Blocked & Disabled Exceptions Case.\r | |
268 | //\r | |
269 | GetSmmDelayedBlockedDisabledCount (NULL, &BlockedCount, &DisabledCount);\r | |
270 | \r | |
271 | //\r | |
272 | // *mSmmMpSyncData->Counter might be updated by all APs concurrently. The value\r | |
273 | // can be dynamic changed. If some Aps enter the SMI after the BlockedCount &\r | |
274 | // DisabledCount check, then the *mSmmMpSyncData->Counter will be increased, thus\r | |
275 | // leading the *mSmmMpSyncData->Counter + BlockedCount + DisabledCount > mNumberOfCpus.\r | |
276 | // since the BlockedCount & DisabledCount are local variable, it's ok here only for\r | |
277 | // the checking of all CPUs In Smm.\r | |
278 | //\r | |
279 | if (*mSmmMpSyncData->Counter + BlockedCount + DisabledCount >= mNumberOfCpus) {\r | |
280 | return TRUE;\r | |
281 | }\r | |
282 | \r | |
283 | return FALSE;\r | |
529a5a86 MK |
284 | }\r |
285 | \r | |
12c66382 ED |
286 | /**\r |
287 | Has OS enabled Lmce in the MSR_IA32_MCG_EXT_CTL\r | |
7367cc6c | 288 | \r |
12c66382 ED |
289 | @retval TRUE Os enable lmce.\r |
290 | @retval FALSE Os not enable lmce.\r | |
291 | \r | |
292 | **/\r | |
293 | BOOLEAN\r | |
294 | IsLmceOsEnabled (\r | |
295 | VOID\r | |
296 | )\r | |
297 | {\r | |
298 | MSR_IA32_MCG_CAP_REGISTER McgCap;\r | |
299 | MSR_IA32_FEATURE_CONTROL_REGISTER FeatureCtrl;\r | |
300 | MSR_IA32_MCG_EXT_CTL_REGISTER McgExtCtrl;\r | |
301 | \r | |
302 | McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);\r | |
303 | if (McgCap.Bits.MCG_LMCE_P == 0) {\r | |
304 | return FALSE;\r | |
305 | }\r | |
306 | \r | |
307 | FeatureCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);\r | |
308 | if (FeatureCtrl.Bits.LmceOn == 0) {\r | |
309 | return FALSE;\r | |
310 | }\r | |
311 | \r | |
312 | McgExtCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_EXT_CTL);\r | |
053e878b | 313 | return (BOOLEAN)(McgExtCtrl.Bits.LMCE_EN == 1);\r |
12c66382 ED |
314 | }\r |
315 | \r | |
316 | /**\r | |
7367cc6c | 317 | Return if Local machine check exception signaled.\r |
12c66382 | 318 | \r |
7367cc6c | 319 | Indicates (when set) that a local machine check exception was generated. This indicates that the current machine-check event was\r |
12c66382 ED |
320 | delivered to only the logical processor.\r |
321 | \r | |
322 | @retval TRUE LMCE was signaled.\r | |
323 | @retval FALSE LMCE was not signaled.\r | |
324 | \r | |
325 | **/\r | |
326 | BOOLEAN\r | |
327 | IsLmceSignaled (\r | |
328 | VOID\r | |
329 | )\r | |
330 | {\r | |
053e878b | 331 | MSR_IA32_MCG_STATUS_REGISTER McgStatus;\r |
12c66382 ED |
332 | \r |
333 | McgStatus.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_STATUS);\r | |
053e878b | 334 | return (BOOLEAN)(McgStatus.Bits.LMCE_S == 1);\r |
12c66382 | 335 | }\r |
529a5a86 MK |
336 | \r |
337 | /**\r | |
338 | Given timeout constraint, wait for all APs to arrive, and insure when this function returns, no AP will execute normal mode code before\r | |
339 | entering SMM, except SMI disabled APs.\r | |
340 | \r | |
341 | **/\r | |
342 | VOID\r | |
343 | SmmWaitForApArrival (\r | |
344 | VOID\r | |
345 | )\r | |
346 | {\r | |
053e878b MK |
347 | UINT64 Timer;\r |
348 | UINTN Index;\r | |
349 | BOOLEAN LmceEn;\r | |
350 | BOOLEAN LmceSignal;\r | |
c14c4719 WJ |
351 | UINT32 DelayedCount;\r |
352 | UINT32 BlockedCount;\r | |
353 | \r | |
354 | DelayedCount = 0;\r | |
355 | BlockedCount = 0;\r | |
529a5a86 | 356 | \r |
fe3a75bc | 357 | ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);\r |
529a5a86 | 358 | \r |
ba40cb31 MK |
359 | LmceEn = FALSE;\r |
360 | LmceSignal = FALSE;\r | |
361 | if (mMachineCheckSupported) {\r | |
362 | LmceEn = IsLmceOsEnabled ();\r | |
053e878b | 363 | LmceSignal = IsLmceSignaled ();\r |
ba40cb31 | 364 | }\r |
12c66382 | 365 | \r |
529a5a86 MK |
366 | //\r |
367 | // Platform implementor should choose a timeout value appropriately:\r | |
368 | // - The timeout value should balance the SMM time constrains and the likelihood that delayed CPUs are excluded in the SMM run. Note\r | |
369 | // the SMI Handlers must ALWAYS take into account the cases that not all APs are available in an SMI run.\r | |
370 | // - The timeout value must, in the case of 2nd timeout, be at least long enough to give time for all APs to receive the SMI IPI\r | |
371 | // and either enter SMM or buffer the SMI, to insure there is no CPU running normal mode code when SMI handling starts. This will\r | |
372 | // be TRUE even if a blocked CPU is brought out of the blocked state by a normal mode CPU (before the normal mode CPU received the\r | |
373 | // SMI IPI), because with a buffered SMI, and CPU will enter SMM immediately after it is brought out of the blocked state.\r | |
374 | // - The timeout value must be longer than longest possible IO operation in the system\r | |
375 | //\r | |
376 | \r | |
377 | //\r | |
378 | // Sync with APs 1st timeout\r | |
379 | //\r | |
380 | for (Timer = StartSyncTimer ();\r | |
4a68176c | 381 | !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal);\r |
053e878b MK |
382 | )\r |
383 | {\r | |
c14c4719 | 384 | mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();\r |
4a68176c LZ |
385 | if (mSmmMpSyncData->AllApArrivedWithException) {\r |
386 | break;\r | |
387 | }\r | |
388 | \r | |
529a5a86 MK |
389 | CpuPause ();\r |
390 | }\r | |
391 | \r | |
392 | //\r | |
393 | // Not all APs have arrived, so we need 2nd round of timeout. IPIs should be sent to ALL none present APs,\r | |
394 | // because:\r | |
395 | // a) Delayed AP may have just come out of the delayed state. Blocked AP may have just been brought out of blocked state by some AP running\r | |
396 | // normal mode code. These APs need to be guaranteed to have an SMI pending to insure that once they are out of delayed / blocked state, they\r | |
397 | // enter SMI immediately without executing instructions in normal mode. Note traditional flow requires there are no APs doing normal mode\r | |
398 | // work while SMI handling is on-going.\r | |
399 | // b) As a consequence of SMI IPI sending, (spurious) SMI may occur after this SMM run.\r | |
400 | // c) ** NOTE **: Use SMI disabling feature VERY CAREFULLY (if at all) for traditional flow, because a processor in SMI-disabled state\r | |
401 | // will execute normal mode code, which breaks the traditional SMI handlers' assumption that no APs are doing normal\r | |
402 | // mode work while SMI handling is on-going.\r | |
403 | // d) We don't add code to check SMI disabling status to skip sending IPI to SMI disabled APs, because:\r | |
404 | // - In traditional flow, SMI disabling is discouraged.\r | |
405 | // - In relaxed flow, CheckApArrival() will check SMI disabling status before calling this function.\r | |
406 | // In both cases, adding SMI-disabling checking code increases overhead.\r | |
407 | //\r | |
fe3a75bc | 408 | if (*mSmmMpSyncData->Counter < mNumberOfCpus) {\r |
529a5a86 MK |
409 | //\r |
410 | // Send SMI IPIs to bring outside processors in\r | |
411 | //\r | |
70911f1f | 412 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r |
053e878b | 413 | if (!(*(mSmmMpSyncData->CpuData[Index].Present)) && (gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId != INVALID_APIC_ID)) {\r |
529a5a86 MK |
414 | SendSmiIpi ((UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId);\r |
415 | }\r | |
416 | }\r | |
417 | \r | |
418 | //\r | |
419 | // Sync with APs 2nd timeout.\r | |
420 | //\r | |
421 | for (Timer = StartSyncTimer ();\r | |
4a68176c | 422 | !IsSyncTimerTimeout (Timer);\r |
053e878b MK |
423 | )\r |
424 | {\r | |
c14c4719 | 425 | mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();\r |
4a68176c LZ |
426 | if (mSmmMpSyncData->AllApArrivedWithException) {\r |
427 | break;\r | |
428 | }\r | |
429 | \r | |
529a5a86 MK |
430 | CpuPause ();\r |
431 | }\r | |
432 | }\r | |
433 | \r | |
c14c4719 WJ |
434 | if (!mSmmMpSyncData->AllApArrivedWithException) {\r |
435 | //\r | |
436 | // Check for the Blocked & Delayed Case.\r | |
437 | //\r | |
438 | GetSmmDelayedBlockedDisabledCount (&DelayedCount, &BlockedCount, NULL);\r | |
439 | DEBUG ((DEBUG_INFO, "SmmWaitForApArrival: Delayed AP Count = %d, Blocked AP Count = %d\n", DelayedCount, BlockedCount));\r | |
440 | }\r | |
441 | \r | |
529a5a86 MK |
442 | return;\r |
443 | }\r | |
444 | \r | |
529a5a86 MK |
445 | /**\r |
446 | Replace OS MTRR's with SMI MTRR's.\r | |
447 | \r | |
448 | @param CpuIndex Processor Index\r | |
449 | \r | |
450 | **/\r | |
451 | VOID\r | |
452 | ReplaceOSMtrrs (\r | |
053e878b | 453 | IN UINTN CpuIndex\r |
529a5a86 MK |
454 | )\r |
455 | {\r | |
529a5a86 MK |
456 | SmmCpuFeaturesDisableSmrr ();\r |
457 | \r | |
458 | //\r | |
459 | // Replace all MTRRs registers\r | |
460 | //\r | |
26ab5ac3 | 461 | MtrrSetAllMtrrs (&gSmiMtrrs);\r |
529a5a86 MK |
462 | }\r |
463 | \r | |
51dd408a ED |
464 | /**\r |
465 | Wheck whether task has been finished by all APs.\r | |
466 | \r | |
467 | @param BlockMode Whether did it in block mode or non-block mode.\r | |
468 | \r | |
469 | @retval TRUE Task has been finished by all APs.\r | |
470 | @retval FALSE Task not has been finished by all APs.\r | |
471 | \r | |
472 | **/\r | |
473 | BOOLEAN\r | |
474 | WaitForAllAPsNotBusy (\r | |
053e878b | 475 | IN BOOLEAN BlockMode\r |
51dd408a ED |
476 | )\r |
477 | {\r | |
053e878b | 478 | UINTN Index;\r |
51dd408a | 479 | \r |
70911f1f | 480 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r |
51dd408a ED |
481 | //\r |
482 | // Ignore BSP and APs which not call in SMM.\r | |
483 | //\r | |
053e878b | 484 | if (!IsPresentAp (Index)) {\r |
51dd408a ED |
485 | continue;\r |
486 | }\r | |
487 | \r | |
488 | if (BlockMode) {\r | |
053e878b MK |
489 | AcquireSpinLock (mSmmMpSyncData->CpuData[Index].Busy);\r |
490 | ReleaseSpinLock (mSmmMpSyncData->CpuData[Index].Busy);\r | |
51dd408a ED |
491 | } else {\r |
492 | if (AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[Index].Busy)) {\r | |
053e878b | 493 | ReleaseSpinLock (mSmmMpSyncData->CpuData[Index].Busy);\r |
51dd408a ED |
494 | } else {\r |
495 | return FALSE;\r | |
496 | }\r | |
497 | }\r | |
498 | }\r | |
499 | \r | |
500 | return TRUE;\r | |
501 | }\r | |
502 | \r | |
503 | /**\r | |
504 | Check whether it is an present AP.\r | |
505 | \r | |
506 | @param CpuIndex The AP index which calls this function.\r | |
507 | \r | |
508 | @retval TRUE It's a present AP.\r | |
509 | @retval TRUE This is not an AP or it is not present.\r | |
510 | \r | |
511 | **/\r | |
512 | BOOLEAN\r | |
513 | IsPresentAp (\r | |
053e878b | 514 | IN UINTN CpuIndex\r |
51dd408a ED |
515 | )\r |
516 | {\r | |
517 | return ((CpuIndex != gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) &&\r | |
053e878b | 518 | *(mSmmMpSyncData->CpuData[CpuIndex].Present));\r |
51dd408a ED |
519 | }\r |
520 | \r | |
51dd408a ED |
521 | /**\r |
522 | Clean up the status flags used during executing the procedure.\r | |
523 | \r | |
524 | @param CpuIndex The AP index which calls this function.\r | |
525 | \r | |
526 | **/\r | |
527 | VOID\r | |
528 | ReleaseToken (\r | |
053e878b | 529 | IN UINTN CpuIndex\r |
51dd408a ED |
530 | )\r |
531 | {\r | |
053e878b | 532 | PROCEDURE_TOKEN *Token;\r |
51dd408a | 533 | \r |
a457823f ED |
534 | Token = mSmmMpSyncData->CpuData[CpuIndex].Token;\r |
535 | \r | |
536 | if (InterlockedDecrement (&Token->RunningApCount) == 0) {\r | |
537 | ReleaseSpinLock (Token->SpinLock);\r | |
51dd408a | 538 | }\r |
a457823f ED |
539 | \r |
540 | mSmmMpSyncData->CpuData[CpuIndex].Token = NULL;\r | |
51dd408a ED |
541 | }\r |
542 | \r | |
543 | /**\r | |
544 | Free the tokens in the maintained list.\r | |
545 | \r | |
546 | **/\r | |
547 | VOID\r | |
b948a496 | 548 | ResetTokens (\r |
51dd408a ED |
549 | VOID\r |
550 | )\r | |
551 | {\r | |
3fdc47c6 RN |
552 | //\r |
553 | // Reset the FirstFreeToken to the beginning of token list upon exiting SMI.\r | |
554 | //\r | |
555 | gSmmCpuPrivate->FirstFreeToken = GetFirstNode (&gSmmCpuPrivate->TokenList);\r | |
51dd408a ED |
556 | }\r |
557 | \r | |
529a5a86 MK |
558 | /**\r |
559 | SMI handler for BSP.\r | |
560 | \r | |
561 | @param CpuIndex BSP processor Index\r | |
562 | @param SyncMode SMM MP sync mode\r | |
563 | \r | |
564 | **/\r | |
565 | VOID\r | |
566 | BSPHandler (\r | |
053e878b MK |
567 | IN UINTN CpuIndex,\r |
568 | IN SMM_CPU_SYNC_MODE SyncMode\r | |
529a5a86 MK |
569 | )\r |
570 | {\r | |
053e878b MK |
571 | UINTN Index;\r |
572 | MTRR_SETTINGS Mtrrs;\r | |
573 | UINTN ApCount;\r | |
574 | BOOLEAN ClearTopLevelSmiResult;\r | |
575 | UINTN PresentCount;\r | |
529a5a86 MK |
576 | \r |
577 | ASSERT (CpuIndex == mSmmMpSyncData->BspIndex);\r | |
578 | ApCount = 0;\r | |
579 | \r | |
580 | //\r | |
581 | // Flag BSP's presence\r | |
582 | //\r | |
fe3a75bc | 583 | *mSmmMpSyncData->InsideSmm = TRUE;\r |
529a5a86 MK |
584 | \r |
585 | //\r | |
586 | // Initialize Debug Agent to start source level debug in BSP handler\r | |
587 | //\r | |
588 | InitializeDebugAgent (DEBUG_AGENT_INIT_ENTER_SMI, NULL, NULL);\r | |
589 | \r | |
590 | //\r | |
591 | // Mark this processor's presence\r | |
592 | //\r | |
ed3d5ecb | 593 | *(mSmmMpSyncData->CpuData[CpuIndex].Present) = TRUE;\r |
529a5a86 MK |
594 | \r |
595 | //\r | |
596 | // Clear platform top level SMI status bit before calling SMI handlers. If\r | |
597 | // we cleared it after SMI handlers are run, we would miss the SMI that\r | |
598 | // occurs after SMI handlers are done and before SMI status bit is cleared.\r | |
599 | //\r | |
053e878b | 600 | ClearTopLevelSmiResult = ClearTopLevelSmiStatus ();\r |
529a5a86 MK |
601 | ASSERT (ClearTopLevelSmiResult == TRUE);\r |
602 | \r | |
603 | //\r | |
604 | // Set running processor index\r | |
605 | //\r | |
606 | gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu = CpuIndex;\r | |
607 | \r | |
608 | //\r | |
609 | // If Traditional Sync Mode or need to configure MTRRs: gather all available APs.\r | |
610 | //\r | |
053e878b | 611 | if ((SyncMode == SmmCpuSyncModeTradition) || SmmCpuFeaturesNeedConfigureMtrrs ()) {\r |
529a5a86 MK |
612 | //\r |
613 | // Wait for APs to arrive\r | |
614 | //\r | |
053e878b | 615 | SmmWaitForApArrival ();\r |
529a5a86 MK |
616 | \r |
617 | //\r | |
618 | // Lock the counter down and retrieve the number of APs\r | |
619 | //\r | |
fe3a75bc | 620 | *mSmmMpSyncData->AllCpusInSync = TRUE;\r |
053e878b | 621 | ApCount = LockdownSemaphore (mSmmMpSyncData->Counter) - 1;\r |
529a5a86 MK |
622 | \r |
623 | //\r | |
624 | // Wait for all APs to get ready for programming MTRRs\r | |
625 | //\r | |
626 | WaitForAllAPs (ApCount);\r | |
627 | \r | |
053e878b | 628 | if (SmmCpuFeaturesNeedConfigureMtrrs ()) {\r |
529a5a86 MK |
629 | //\r |
630 | // Signal all APs it's time for backup MTRRs\r | |
631 | //\r | |
632 | ReleaseAllAPs ();\r | |
633 | \r | |
634 | //\r | |
635 | // WaitForSemaphore() may wait for ever if an AP happens to enter SMM at\r | |
636 | // exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set\r | |
637 | // to a large enough value to avoid this situation.\r | |
638 | // Note: For HT capable CPUs, threads within a core share the same set of MTRRs.\r | |
639 | // We do the backup first and then set MTRR to avoid race condition for threads\r | |
640 | // in the same core.\r | |
641 | //\r | |
053e878b | 642 | MtrrGetAllMtrrs (&Mtrrs);\r |
529a5a86 MK |
643 | \r |
644 | //\r | |
645 | // Wait for all APs to complete their MTRR saving\r | |
646 | //\r | |
647 | WaitForAllAPs (ApCount);\r | |
648 | \r | |
649 | //\r | |
650 | // Let all processors program SMM MTRRs together\r | |
651 | //\r | |
652 | ReleaseAllAPs ();\r | |
653 | \r | |
654 | //\r | |
655 | // WaitForSemaphore() may wait for ever if an AP happens to enter SMM at\r | |
656 | // exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set\r | |
657 | // to a large enough value to avoid this situation.\r | |
658 | //\r | |
659 | ReplaceOSMtrrs (CpuIndex);\r | |
660 | \r | |
661 | //\r | |
662 | // Wait for all APs to complete their MTRR programming\r | |
663 | //\r | |
664 | WaitForAllAPs (ApCount);\r | |
665 | }\r | |
666 | }\r | |
667 | \r | |
668 | //\r | |
669 | // The BUSY lock is initialized to Acquired state\r | |
670 | //\r | |
170a3c1e | 671 | AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);\r |
529a5a86 MK |
672 | \r |
673 | //\r | |
9f419739 | 674 | // Perform the pre tasks\r |
529a5a86 | 675 | //\r |
9f419739 | 676 | PerformPreTasks ();\r |
529a5a86 MK |
677 | \r |
678 | //\r | |
679 | // Invoke SMM Foundation EntryPoint with the processor information context.\r | |
680 | //\r | |
681 | gSmmCpuPrivate->SmmCoreEntry (&gSmmCpuPrivate->SmmCoreEntryContext);\r | |
682 | \r | |
683 | //\r | |
684 | // Make sure all APs have completed their pending none-block tasks\r | |
685 | //\r | |
51dd408a | 686 | WaitForAllAPsNotBusy (TRUE);\r |
529a5a86 MK |
687 | \r |
688 | //\r | |
689 | // Perform the remaining tasks\r | |
690 | //\r | |
691 | PerformRemainingTasks ();\r | |
692 | \r | |
693 | //\r | |
694 | // If Relaxed-AP Sync Mode: gather all available APs after BSP SMM handlers are done, and\r | |
695 | // make those APs to exit SMI synchronously. APs which arrive later will be excluded and\r | |
696 | // will run through freely.\r | |
697 | //\r | |
053e878b | 698 | if ((SyncMode != SmmCpuSyncModeTradition) && !SmmCpuFeaturesNeedConfigureMtrrs ()) {\r |
529a5a86 MK |
699 | //\r |
700 | // Lock the counter down and retrieve the number of APs\r | |
701 | //\r | |
fe3a75bc | 702 | *mSmmMpSyncData->AllCpusInSync = TRUE;\r |
053e878b | 703 | ApCount = LockdownSemaphore (mSmmMpSyncData->Counter) - 1;\r |
529a5a86 MK |
704 | //\r |
705 | // Make sure all APs have their Present flag set\r | |
706 | //\r | |
707 | while (TRUE) {\r | |
708 | PresentCount = 0;\r | |
70911f1f | 709 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r |
ed3d5ecb | 710 | if (*(mSmmMpSyncData->CpuData[Index].Present)) {\r |
053e878b | 711 | PresentCount++;\r |
529a5a86 MK |
712 | }\r |
713 | }\r | |
053e878b | 714 | \r |
529a5a86 MK |
715 | if (PresentCount > ApCount) {\r |
716 | break;\r | |
717 | }\r | |
718 | }\r | |
719 | }\r | |
720 | \r | |
721 | //\r | |
722 | // Notify all APs to exit\r | |
723 | //\r | |
fe3a75bc | 724 | *mSmmMpSyncData->InsideSmm = FALSE;\r |
529a5a86 MK |
725 | ReleaseAllAPs ();\r |
726 | \r | |
727 | //\r | |
728 | // Wait for all APs to complete their pending tasks\r | |
729 | //\r | |
730 | WaitForAllAPs (ApCount);\r | |
731 | \r | |
053e878b | 732 | if (SmmCpuFeaturesNeedConfigureMtrrs ()) {\r |
529a5a86 MK |
733 | //\r |
734 | // Signal APs to restore MTRRs\r | |
735 | //\r | |
736 | ReleaseAllAPs ();\r | |
737 | \r | |
738 | //\r | |
739 | // Restore OS MTRRs\r | |
740 | //\r | |
741 | SmmCpuFeaturesReenableSmrr ();\r | |
053e878b | 742 | MtrrSetAllMtrrs (&Mtrrs);\r |
529a5a86 MK |
743 | \r |
744 | //\r | |
745 | // Wait for all APs to complete MTRR programming\r | |
746 | //\r | |
747 | WaitForAllAPs (ApCount);\r | |
748 | }\r | |
749 | \r | |
750 | //\r | |
751 | // Stop source level debug in BSP handler, the code below will not be\r | |
752 | // debugged.\r | |
753 | //\r | |
754 | InitializeDebugAgent (DEBUG_AGENT_INIT_EXIT_SMI, NULL, NULL);\r | |
755 | \r | |
756 | //\r | |
757 | // Signal APs to Reset states/semaphore for this processor\r | |
758 | //\r | |
759 | ReleaseAllAPs ();\r | |
760 | \r | |
761 | //\r | |
762 | // Perform pending operations for hot-plug\r | |
763 | //\r | |
764 | SmmCpuUpdate ();\r | |
765 | \r | |
766 | //\r | |
767 | // Clear the Present flag of BSP\r | |
768 | //\r | |
ed3d5ecb | 769 | *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;\r |
529a5a86 MK |
770 | \r |
771 | //\r | |
772 | // Gather APs to exit SMM synchronously. Note the Present flag is cleared by now but\r | |
773 | // WaitForAllAps does not depend on the Present flag.\r | |
774 | //\r | |
775 | WaitForAllAPs (ApCount);\r | |
776 | \r | |
51dd408a | 777 | //\r |
b948a496 | 778 | // Reset the tokens buffer.\r |
51dd408a | 779 | //\r |
b948a496 | 780 | ResetTokens ();\r |
51dd408a | 781 | \r |
529a5a86 MK |
782 | //\r |
783 | // Reset BspIndex to -1, meaning BSP has not been elected.\r | |
784 | //\r | |
785 | if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {\r | |
786 | mSmmMpSyncData->BspIndex = (UINT32)-1;\r | |
787 | }\r | |
788 | \r | |
789 | //\r | |
790 | // Allow APs to check in from this point on\r | |
791 | //\r | |
4364d661 ZL |
792 | *mSmmMpSyncData->Counter = 0;\r |
793 | *mSmmMpSyncData->AllCpusInSync = FALSE;\r | |
794 | mSmmMpSyncData->AllApArrivedWithException = FALSE;\r | |
529a5a86 MK |
795 | }\r |
796 | \r | |
797 | /**\r | |
798 | SMI handler for AP.\r | |
799 | \r | |
800 | @param CpuIndex AP processor Index.\r | |
801 | @param ValidSmi Indicates that current SMI is a valid SMI or not.\r | |
802 | @param SyncMode SMM MP sync mode.\r | |
803 | \r | |
804 | **/\r | |
805 | VOID\r | |
806 | APHandler (\r | |
053e878b MK |
807 | IN UINTN CpuIndex,\r |
808 | IN BOOLEAN ValidSmi,\r | |
809 | IN SMM_CPU_SYNC_MODE SyncMode\r | |
529a5a86 MK |
810 | )\r |
811 | {\r | |
053e878b MK |
812 | UINT64 Timer;\r |
813 | UINTN BspIndex;\r | |
814 | MTRR_SETTINGS Mtrrs;\r | |
815 | EFI_STATUS ProcedureStatus;\r | |
529a5a86 MK |
816 | \r |
817 | //\r | |
818 | // Timeout BSP\r | |
819 | //\r | |
820 | for (Timer = StartSyncTimer ();\r | |
821 | !IsSyncTimerTimeout (Timer) &&\r | |
fe3a75bc | 822 | !(*mSmmMpSyncData->InsideSmm);\r |
053e878b MK |
823 | )\r |
824 | {\r | |
529a5a86 MK |
825 | CpuPause ();\r |
826 | }\r | |
827 | \r | |
fe3a75bc | 828 | if (!(*mSmmMpSyncData->InsideSmm)) {\r |
529a5a86 MK |
829 | //\r |
830 | // BSP timeout in the first round\r | |
831 | //\r | |
832 | if (mSmmMpSyncData->BspIndex != -1) {\r | |
833 | //\r | |
834 | // BSP Index is known\r | |
c14c4719 | 835 | // Existing AP is in SMI now but BSP not in, so, try bring BSP in SMM.\r |
529a5a86 MK |
836 | //\r |
837 | BspIndex = mSmmMpSyncData->BspIndex;\r | |
838 | ASSERT (CpuIndex != BspIndex);\r | |
839 | \r | |
840 | //\r | |
841 | // Send SMI IPI to bring BSP in\r | |
842 | //\r | |
843 | SendSmiIpi ((UINT32)gSmmCpuPrivate->ProcessorInfo[BspIndex].ProcessorId);\r | |
844 | \r | |
845 | //\r | |
846 | // Now clock BSP for the 2nd time\r | |
847 | //\r | |
848 | for (Timer = StartSyncTimer ();\r | |
849 | !IsSyncTimerTimeout (Timer) &&\r | |
fe3a75bc | 850 | !(*mSmmMpSyncData->InsideSmm);\r |
053e878b MK |
851 | )\r |
852 | {\r | |
529a5a86 MK |
853 | CpuPause ();\r |
854 | }\r | |
855 | \r | |
fe3a75bc | 856 | if (!(*mSmmMpSyncData->InsideSmm)) {\r |
529a5a86 MK |
857 | //\r |
858 | // Give up since BSP is unable to enter SMM\r | |
859 | // and signal the completion of this AP\r | |
c14c4719 WJ |
860 | // Reduce the mSmmMpSyncData->Counter!\r |
861 | //\r | |
fe3a75bc | 862 | WaitForSemaphore (mSmmMpSyncData->Counter);\r |
529a5a86 MK |
863 | return;\r |
864 | }\r | |
865 | } else {\r | |
866 | //\r | |
867 | // Don't know BSP index. Give up without sending IPI to BSP.\r | |
c14c4719 | 868 | // Reduce the mSmmMpSyncData->Counter!\r |
529a5a86 | 869 | //\r |
fe3a75bc | 870 | WaitForSemaphore (mSmmMpSyncData->Counter);\r |
529a5a86 MK |
871 | return;\r |
872 | }\r | |
873 | }\r | |
874 | \r | |
875 | //\r | |
876 | // BSP is available\r | |
877 | //\r | |
878 | BspIndex = mSmmMpSyncData->BspIndex;\r | |
879 | ASSERT (CpuIndex != BspIndex);\r | |
880 | \r | |
881 | //\r | |
882 | // Mark this processor's presence\r | |
883 | //\r | |
ed3d5ecb | 884 | *(mSmmMpSyncData->CpuData[CpuIndex].Present) = TRUE;\r |
529a5a86 | 885 | \r |
053e878b | 886 | if ((SyncMode == SmmCpuSyncModeTradition) || SmmCpuFeaturesNeedConfigureMtrrs ()) {\r |
529a5a86 MK |
887 | //\r |
888 | // Notify BSP of arrival at this point\r | |
889 | //\r | |
ed3d5ecb | 890 | ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);\r |
529a5a86 MK |
891 | }\r |
892 | \r | |
053e878b | 893 | if (SmmCpuFeaturesNeedConfigureMtrrs ()) {\r |
529a5a86 MK |
894 | //\r |
895 | // Wait for the signal from BSP to backup MTRRs\r | |
896 | //\r | |
ed3d5ecb | 897 | WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);\r |
529a5a86 MK |
898 | \r |
899 | //\r | |
900 | // Backup OS MTRRs\r | |
901 | //\r | |
053e878b | 902 | MtrrGetAllMtrrs (&Mtrrs);\r |
529a5a86 MK |
903 | \r |
904 | //\r | |
905 | // Signal BSP the completion of this AP\r | |
906 | //\r | |
ed3d5ecb | 907 | ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);\r |
529a5a86 MK |
908 | \r |
909 | //\r | |
910 | // Wait for BSP's signal to program MTRRs\r | |
911 | //\r | |
ed3d5ecb | 912 | WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);\r |
529a5a86 MK |
913 | \r |
914 | //\r | |
915 | // Replace OS MTRRs with SMI MTRRs\r | |
916 | //\r | |
917 | ReplaceOSMtrrs (CpuIndex);\r | |
918 | \r | |
919 | //\r | |
920 | // Signal BSP the completion of this AP\r | |
921 | //\r | |
ed3d5ecb | 922 | ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);\r |
529a5a86 MK |
923 | }\r |
924 | \r | |
925 | while (TRUE) {\r | |
926 | //\r | |
927 | // Wait for something to happen\r | |
928 | //\r | |
ed3d5ecb | 929 | WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);\r |
529a5a86 MK |
930 | \r |
931 | //\r | |
932 | // Check if BSP wants to exit SMM\r | |
933 | //\r | |
fe3a75bc | 934 | if (!(*mSmmMpSyncData->InsideSmm)) {\r |
529a5a86 MK |
935 | break;\r |
936 | }\r | |
937 | \r | |
938 | //\r | |
939 | // BUSY should be acquired by SmmStartupThisAp()\r | |
940 | //\r | |
941 | ASSERT (\r | |
ed3d5ecb | 942 | !AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[CpuIndex].Busy)\r |
529a5a86 MK |
943 | );\r |
944 | \r | |
945 | //\r | |
946 | // Invoke the scheduled procedure\r | |
947 | //\r | |
053e878b MK |
948 | ProcedureStatus = (*mSmmMpSyncData->CpuData[CpuIndex].Procedure)(\r |
949 | (VOID *)mSmmMpSyncData->CpuData[CpuIndex].Parameter\r | |
950 | );\r | |
51dd408a ED |
951 | if (mSmmMpSyncData->CpuData[CpuIndex].Status != NULL) {\r |
952 | *mSmmMpSyncData->CpuData[CpuIndex].Status = ProcedureStatus;\r | |
953 | }\r | |
529a5a86 | 954 | \r |
a457823f ED |
955 | if (mSmmMpSyncData->CpuData[CpuIndex].Token != NULL) {\r |
956 | ReleaseToken (CpuIndex);\r | |
957 | }\r | |
958 | \r | |
529a5a86 MK |
959 | //\r |
960 | // Release BUSY\r | |
961 | //\r | |
ed3d5ecb | 962 | ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);\r |
529a5a86 MK |
963 | }\r |
964 | \r | |
053e878b | 965 | if (SmmCpuFeaturesNeedConfigureMtrrs ()) {\r |
529a5a86 MK |
966 | //\r |
967 | // Notify BSP the readiness of this AP to program MTRRs\r | |
968 | //\r | |
ed3d5ecb | 969 | ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);\r |
529a5a86 MK |
970 | \r |
971 | //\r | |
972 | // Wait for the signal from BSP to program MTRRs\r | |
973 | //\r | |
ed3d5ecb | 974 | WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);\r |
529a5a86 MK |
975 | \r |
976 | //\r | |
977 | // Restore OS MTRRs\r | |
978 | //\r | |
979 | SmmCpuFeaturesReenableSmrr ();\r | |
053e878b | 980 | MtrrSetAllMtrrs (&Mtrrs);\r |
529a5a86 MK |
981 | }\r |
982 | \r | |
983 | //\r | |
984 | // Notify BSP the readiness of this AP to Reset states/semaphore for this processor\r | |
985 | //\r | |
ed3d5ecb | 986 | ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);\r |
529a5a86 MK |
987 | \r |
988 | //\r | |
989 | // Wait for the signal from BSP to Reset states/semaphore for this processor\r | |
990 | //\r | |
ed3d5ecb | 991 | WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);\r |
529a5a86 MK |
992 | \r |
993 | //\r | |
994 | // Reset states/semaphore for this processor\r | |
995 | //\r | |
ed3d5ecb | 996 | *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;\r |
529a5a86 MK |
997 | \r |
998 | //\r | |
999 | // Notify BSP the readiness of this AP to exit SMM\r | |
1000 | //\r | |
ed3d5ecb | 1001 | ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);\r |
529a5a86 MK |
1002 | }\r |
1003 | \r | |
1004 | /**\r | |
1005 | Create 4G PageTable in SMRAM.\r | |
1006 | \r | |
717fb604 | 1007 | @param[in] Is32BitPageTable Whether the page table is 32-bit PAE\r |
529a5a86 MK |
1008 | @return PageTable Address\r |
1009 | \r | |
1010 | **/\r | |
1011 | UINT32\r | |
1012 | Gen4GPageTable (\r | |
053e878b | 1013 | IN BOOLEAN Is32BitPageTable\r |
529a5a86 MK |
1014 | )\r |
1015 | {\r | |
1016 | VOID *PageTable;\r | |
1017 | UINTN Index;\r | |
1018 | UINT64 *Pte;\r | |
1019 | UINTN PagesNeeded;\r | |
1020 | UINTN Low2MBoundary;\r | |
1021 | UINTN High2MBoundary;\r | |
1022 | UINTN Pages;\r | |
1023 | UINTN GuardPage;\r | |
1024 | UINT64 *Pdpte;\r | |
1025 | UINTN PageIndex;\r | |
1026 | UINTN PageAddress;\r | |
1027 | \r | |
053e878b | 1028 | Low2MBoundary = 0;\r |
529a5a86 | 1029 | High2MBoundary = 0;\r |
053e878b | 1030 | PagesNeeded = 0;\r |
529a5a86 MK |
1031 | if (FeaturePcdGet (PcdCpuSmmStackGuard)) {\r |
1032 | //\r | |
1033 | // Add one more page for known good stack, then find the lower 2MB aligned address.\r | |
1034 | //\r | |
1035 | Low2MBoundary = (mSmmStackArrayBase + EFI_PAGE_SIZE) & ~(SIZE_2MB-1);\r | |
1036 | //\r | |
1037 | // Add two more pages for known good stack and stack guard page,\r | |
1038 | // then find the lower 2MB aligned address.\r | |
1039 | //\r | |
ef91b073 | 1040 | High2MBoundary = (mSmmStackArrayEnd - mSmmStackSize - mSmmShadowStackSize + EFI_PAGE_SIZE * 2) & ~(SIZE_2MB-1);\r |
053e878b | 1041 | PagesNeeded = ((High2MBoundary - Low2MBoundary) / SIZE_2MB) + 1;\r |
529a5a86 | 1042 | }\r |
053e878b | 1043 | \r |
529a5a86 MK |
1044 | //\r |
1045 | // Allocate the page table\r | |
1046 | //\r | |
717fb604 | 1047 | PageTable = AllocatePageTableMemory (5 + PagesNeeded);\r |
529a5a86 MK |
1048 | ASSERT (PageTable != NULL);\r |
1049 | \r | |
717fb604 | 1050 | PageTable = (VOID *)((UINTN)PageTable);\r |
053e878b | 1051 | Pte = (UINT64 *)PageTable;\r |
529a5a86 MK |
1052 | \r |
1053 | //\r | |
1054 | // Zero out all page table entries first\r | |
1055 | //\r | |
1056 | ZeroMem (Pte, EFI_PAGES_TO_SIZE (1));\r | |
1057 | \r | |
1058 | //\r | |
1059 | // Set Page Directory Pointers\r | |
1060 | //\r | |
1061 | for (Index = 0; Index < 4; Index++) {\r | |
e62a0eb6 | 1062 | Pte[Index] = ((UINTN)PageTable + EFI_PAGE_SIZE * (Index + 1)) | mAddressEncMask |\r |
053e878b | 1063 | (Is32BitPageTable ? IA32_PAE_PDPTE_ATTRIBUTE_BITS : PAGE_ATTRIBUTE_BITS);\r |
529a5a86 | 1064 | }\r |
053e878b | 1065 | \r |
529a5a86 MK |
1066 | Pte += EFI_PAGE_SIZE / sizeof (*Pte);\r |
1067 | \r | |
1068 | //\r | |
1069 | // Fill in Page Directory Entries\r | |
1070 | //\r | |
1071 | for (Index = 0; Index < EFI_PAGE_SIZE * 4 / sizeof (*Pte); Index++) {\r | |
241f9149 | 1072 | Pte[Index] = (Index << 21) | mAddressEncMask | IA32_PG_PS | PAGE_ATTRIBUTE_BITS;\r |
529a5a86 MK |
1073 | }\r |
1074 | \r | |
053e878b | 1075 | Pdpte = (UINT64 *)PageTable;\r |
529a5a86 | 1076 | if (FeaturePcdGet (PcdCpuSmmStackGuard)) {\r |
053e878b | 1077 | Pages = (UINTN)PageTable + EFI_PAGES_TO_SIZE (5);\r |
529a5a86 | 1078 | GuardPage = mSmmStackArrayBase + EFI_PAGE_SIZE;\r |
529a5a86 | 1079 | for (PageIndex = Low2MBoundary; PageIndex <= High2MBoundary; PageIndex += SIZE_2MB) {\r |
053e878b | 1080 | Pte = (UINT64 *)(UINTN)(Pdpte[BitFieldRead32 ((UINT32)PageIndex, 30, 31)] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));\r |
241f9149 | 1081 | Pte[BitFieldRead32 ((UINT32)PageIndex, 21, 29)] = (UINT64)Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS;\r |
529a5a86 MK |
1082 | //\r |
1083 | // Fill in Page Table Entries\r | |
1084 | //\r | |
053e878b | 1085 | Pte = (UINT64 *)Pages;\r |
529a5a86 MK |
1086 | PageAddress = PageIndex;\r |
1087 | for (Index = 0; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) {\r | |
1088 | if (PageAddress == GuardPage) {\r | |
1089 | //\r | |
1090 | // Mark the guard page as non-present\r | |
1091 | //\r | |
241f9149 | 1092 | Pte[Index] = PageAddress | mAddressEncMask;\r |
ef91b073 | 1093 | GuardPage += (mSmmStackSize + mSmmShadowStackSize);\r |
529a5a86 MK |
1094 | if (GuardPage > mSmmStackArrayEnd) {\r |
1095 | GuardPage = 0;\r | |
1096 | }\r | |
1097 | } else {\r | |
241f9149 | 1098 | Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS;\r |
529a5a86 | 1099 | }\r |
053e878b MK |
1100 | \r |
1101 | PageAddress += EFI_PAGE_SIZE;\r | |
529a5a86 | 1102 | }\r |
053e878b | 1103 | \r |
529a5a86 MK |
1104 | Pages += EFI_PAGE_SIZE;\r |
1105 | }\r | |
1106 | }\r | |
1107 | \r | |
f8c1133b | 1108 | if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0) {\r |
053e878b | 1109 | Pte = (UINT64 *)(UINTN)(Pdpte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));\r |
f8c1133b JW |
1110 | if ((Pte[0] & IA32_PG_PS) == 0) {\r |
1111 | // 4K-page entries are already mapped. Just hide the first one anyway.\r | |
053e878b | 1112 | Pte = (UINT64 *)(UINTN)(Pte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));\r |
79da2d28 | 1113 | Pte[0] &= ~(UINT64)IA32_PG_P; // Hide page 0\r |
f8c1133b JW |
1114 | } else {\r |
1115 | // Create 4K-page entries\r | |
1116 | Pages = (UINTN)AllocatePageTableMemory (1);\r | |
1117 | ASSERT (Pages != 0);\r | |
1118 | \r | |
1119 | Pte[0] = (UINT64)(Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS);\r | |
1120 | \r | |
053e878b | 1121 | Pte = (UINT64 *)Pages;\r |
f8c1133b | 1122 | PageAddress = 0;\r |
053e878b | 1123 | Pte[0] = PageAddress | mAddressEncMask; // Hide page 0 but present left\r |
f8c1133b JW |
1124 | for (Index = 1; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) {\r |
1125 | PageAddress += EFI_PAGE_SIZE;\r | |
053e878b | 1126 | Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS;\r |
f8c1133b JW |
1127 | }\r |
1128 | }\r | |
1129 | }\r | |
1130 | \r | |
529a5a86 MK |
1131 | return (UINT32)(UINTN)PageTable;\r |
1132 | }\r | |
1133 | \r | |
51dd408a ED |
1134 | /**\r |
1135 | Checks whether the input token is the current used token.\r | |
1136 | \r | |
1137 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
1138 | BroadcastProcedure.\r | |
1139 | \r | |
1140 | @retval TRUE The input token is the current used token.\r | |
1141 | @retval FALSE The input token is not the current used token.\r | |
1142 | **/\r | |
1143 | BOOLEAN\r | |
1144 | IsTokenInUse (\r | |
053e878b | 1145 | IN SPIN_LOCK *Token\r |
51dd408a ED |
1146 | )\r |
1147 | {\r | |
053e878b MK |
1148 | LIST_ENTRY *Link;\r |
1149 | PROCEDURE_TOKEN *ProcToken;\r | |
51dd408a ED |
1150 | \r |
1151 | if (Token == NULL) {\r | |
1152 | return FALSE;\r | |
1153 | }\r | |
1154 | \r | |
1155 | Link = GetFirstNode (&gSmmCpuPrivate->TokenList);\r | |
d84f090f ED |
1156 | //\r |
1157 | // Only search used tokens.\r | |
1158 | //\r | |
1159 | while (Link != gSmmCpuPrivate->FirstFreeToken) {\r | |
51dd408a ED |
1160 | ProcToken = PROCEDURE_TOKEN_FROM_LINK (Link);\r |
1161 | \r | |
d84f090f | 1162 | if (ProcToken->SpinLock == Token) {\r |
51dd408a ED |
1163 | return TRUE;\r |
1164 | }\r | |
1165 | \r | |
1166 | Link = GetNextNode (&gSmmCpuPrivate->TokenList, Link);\r | |
1167 | }\r | |
1168 | \r | |
1169 | return FALSE;\r | |
1170 | }\r | |
1171 | \r | |
1172 | /**\r | |
b948a496 | 1173 | Allocate buffer for the SPIN_LOCK and PROCEDURE_TOKEN.\r |
51dd408a | 1174 | \r |
3fdc47c6 | 1175 | @return First token of the token buffer.\r |
51dd408a | 1176 | **/\r |
3fdc47c6 | 1177 | LIST_ENTRY *\r |
b948a496 ED |
1178 | AllocateTokenBuffer (\r |
1179 | VOID\r | |
51dd408a ED |
1180 | )\r |
1181 | {\r | |
053e878b MK |
1182 | UINTN SpinLockSize;\r |
1183 | UINT32 TokenCountPerChunk;\r | |
1184 | UINTN Index;\r | |
1185 | SPIN_LOCK *SpinLock;\r | |
1186 | UINT8 *SpinLockBuffer;\r | |
1187 | PROCEDURE_TOKEN *ProcTokens;\r | |
51dd408a ED |
1188 | \r |
1189 | SpinLockSize = GetSpinLockProperties ();\r | |
b948a496 | 1190 | \r |
9caaa79d | 1191 | TokenCountPerChunk = FixedPcdGet32 (PcdCpuSmmMpTokenCountPerChunk);\r |
b948a496 ED |
1192 | ASSERT (TokenCountPerChunk != 0);\r |
1193 | if (TokenCountPerChunk == 0) {\r | |
1194 | DEBUG ((DEBUG_ERROR, "PcdCpuSmmMpTokenCountPerChunk should not be Zero!\n"));\r | |
1195 | CpuDeadLoop ();\r | |
1196 | }\r | |
053e878b | 1197 | \r |
b948a496 | 1198 | DEBUG ((DEBUG_INFO, "CpuSmm: SpinLock Size = 0x%x, PcdCpuSmmMpTokenCountPerChunk = 0x%x\n", SpinLockSize, TokenCountPerChunk));\r |
9caaa79d | 1199 | \r |
b948a496 ED |
1200 | //\r |
1201 | // Separate the Spin_lock and Proc_token because the alignment requires by Spin_Lock.\r | |
1202 | //\r | |
1203 | SpinLockBuffer = AllocatePool (SpinLockSize * TokenCountPerChunk);\r | |
1204 | ASSERT (SpinLockBuffer != NULL);\r | |
9caaa79d | 1205 | \r |
3fdc47c6 RN |
1206 | ProcTokens = AllocatePool (sizeof (PROCEDURE_TOKEN) * TokenCountPerChunk);\r |
1207 | ASSERT (ProcTokens != NULL);\r | |
b948a496 ED |
1208 | \r |
1209 | for (Index = 0; Index < TokenCountPerChunk; Index++) {\r | |
1210 | SpinLock = (SPIN_LOCK *)(SpinLockBuffer + SpinLockSize * Index);\r | |
1211 | InitializeSpinLock (SpinLock);\r | |
1212 | \r | |
3fdc47c6 RN |
1213 | ProcTokens[Index].Signature = PROCEDURE_TOKEN_SIGNATURE;\r |
1214 | ProcTokens[Index].SpinLock = SpinLock;\r | |
3fdc47c6 | 1215 | ProcTokens[Index].RunningApCount = 0;\r |
b948a496 | 1216 | \r |
3fdc47c6 | 1217 | InsertTailList (&gSmmCpuPrivate->TokenList, &ProcTokens[Index].Link);\r |
b948a496 | 1218 | }\r |
9caaa79d | 1219 | \r |
3fdc47c6 | 1220 | return &ProcTokens[0].Link;\r |
b948a496 ED |
1221 | }\r |
1222 | \r | |
1223 | /**\r | |
1224 | Get the free token.\r | |
1225 | \r | |
1226 | If no free token, allocate new tokens then return the free one.\r | |
1227 | \r | |
e1879256 ED |
1228 | @param RunningApsCount The Running Aps count for this token.\r |
1229 | \r | |
b948a496 | 1230 | @retval return the first free PROCEDURE_TOKEN.\r |
9caaa79d | 1231 | \r |
b948a496 ED |
1232 | **/\r |
1233 | PROCEDURE_TOKEN *\r | |
1234 | GetFreeToken (\r | |
053e878b | 1235 | IN UINT32 RunningApsCount\r |
b948a496 ED |
1236 | )\r |
1237 | {\r | |
1238 | PROCEDURE_TOKEN *NewToken;\r | |
51dd408a | 1239 | \r |
3fdc47c6 RN |
1240 | //\r |
1241 | // If FirstFreeToken meets the end of token list, enlarge the token list.\r | |
1242 | // Set FirstFreeToken to the first free token.\r | |
1243 | //\r | |
1244 | if (gSmmCpuPrivate->FirstFreeToken == &gSmmCpuPrivate->TokenList) {\r | |
1245 | gSmmCpuPrivate->FirstFreeToken = AllocateTokenBuffer ();\r | |
b948a496 | 1246 | }\r |
053e878b MK |
1247 | \r |
1248 | NewToken = PROCEDURE_TOKEN_FROM_LINK (gSmmCpuPrivate->FirstFreeToken);\r | |
3fdc47c6 | 1249 | gSmmCpuPrivate->FirstFreeToken = GetNextNode (&gSmmCpuPrivate->TokenList, gSmmCpuPrivate->FirstFreeToken);\r |
51dd408a | 1250 | \r |
b948a496 ED |
1251 | NewToken->RunningApCount = RunningApsCount;\r |
1252 | AcquireSpinLock (NewToken->SpinLock);\r | |
51dd408a | 1253 | \r |
b948a496 | 1254 | return NewToken;\r |
51dd408a ED |
1255 | }\r |
1256 | \r | |
1257 | /**\r | |
1258 | Checks status of specified AP.\r | |
1259 | \r | |
1260 | This function checks whether the specified AP has finished the task assigned\r | |
1261 | by StartupThisAP(), and whether timeout expires.\r | |
1262 | \r | |
1263 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
1264 | BroadcastProcedure.\r | |
1265 | \r | |
1266 | @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r | |
1267 | @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r | |
1268 | **/\r | |
1269 | EFI_STATUS\r | |
1270 | IsApReady (\r | |
053e878b | 1271 | IN SPIN_LOCK *Token\r |
51dd408a ED |
1272 | )\r |
1273 | {\r | |
1274 | if (AcquireSpinLockOrFail (Token)) {\r | |
1275 | ReleaseSpinLock (Token);\r | |
1276 | return EFI_SUCCESS;\r | |
1277 | }\r | |
1278 | \r | |
1279 | return EFI_NOT_READY;\r | |
1280 | }\r | |
1281 | \r | |
529a5a86 MK |
1282 | /**\r |
1283 | Schedule a procedure to run on the specified CPU.\r | |
1284 | \r | |
717fb604 JY |
1285 | @param[in] Procedure The address of the procedure to run\r |
1286 | @param[in] CpuIndex Target CPU Index\r | |
51dd408a ED |
1287 | @param[in,out] ProcArguments The parameter to pass to the procedure\r |
1288 | @param[in] Token This is an optional parameter that allows the caller to execute the\r | |
1289 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
1290 | call is blocking, and the call will not return until the AP has\r | |
1291 | completed the procedure. If the token is not NULL, the call will\r | |
1292 | return immediately. The caller can check whether the procedure has\r | |
1293 | completed with CheckOnProcedure or WaitForProcedure.\r | |
1294 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish\r | |
1295 | execution of Procedure, either for blocking or non-blocking mode.\r | |
1296 | Zero means infinity. If the timeout expires before all APs return\r | |
1297 | from Procedure, then Procedure on the failed APs is terminated. If\r | |
1298 | the timeout expires in blocking mode, the call returns EFI_TIMEOUT.\r | |
1299 | If the timeout expires in non-blocking mode, the timeout determined\r | |
1300 | can be through CheckOnProcedure or WaitForProcedure.\r | |
1301 | Note that timeout support is optional. Whether an implementation\r | |
1302 | supports this feature can be determined via the Attributes data\r | |
1303 | member.\r | |
1304 | @param[in,out] CpuStatus This optional pointer may be used to get the status code returned\r | |
1305 | by Procedure when it completes execution on the target AP, or with\r | |
1306 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
1307 | timeout. The implementation will update this variable with\r | |
1308 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
529a5a86 MK |
1309 | \r |
1310 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
1311 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
1312 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
1313 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
1314 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
1315 | \r | |
1316 | **/\r | |
1317 | EFI_STATUS\r | |
717fb604 | 1318 | InternalSmmStartupThisAp (\r |
053e878b MK |
1319 | IN EFI_AP_PROCEDURE2 Procedure,\r |
1320 | IN UINTN CpuIndex,\r | |
1321 | IN OUT VOID *ProcArguments OPTIONAL,\r | |
1322 | IN MM_COMPLETION *Token,\r | |
1323 | IN UINTN TimeoutInMicroseconds,\r | |
1324 | IN OUT EFI_STATUS *CpuStatus\r | |
529a5a86 MK |
1325 | )\r |
1326 | {\r | |
053e878b | 1327 | PROCEDURE_TOKEN *ProcToken;\r |
a457823f | 1328 | \r |
717fb604 | 1329 | if (CpuIndex >= gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus) {\r |
053e878b | 1330 | DEBUG ((DEBUG_ERROR, "CpuIndex(%d) >= gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus(%d)\n", CpuIndex, gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus));\r |
717fb604 JY |
1331 | return EFI_INVALID_PARAMETER;\r |
1332 | }\r | |
053e878b | 1333 | \r |
717fb604 | 1334 | if (CpuIndex == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) {\r |
053e878b | 1335 | DEBUG ((DEBUG_ERROR, "CpuIndex(%d) == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu\n", CpuIndex));\r |
529a5a86 MK |
1336 | return EFI_INVALID_PARAMETER;\r |
1337 | }\r | |
053e878b | 1338 | \r |
b7025df8 JF |
1339 | if (gSmmCpuPrivate->ProcessorInfo[CpuIndex].ProcessorId == INVALID_APIC_ID) {\r |
1340 | return EFI_INVALID_PARAMETER;\r | |
1341 | }\r | |
053e878b | 1342 | \r |
717fb604 JY |
1343 | if (!(*(mSmmMpSyncData->CpuData[CpuIndex].Present))) {\r |
1344 | if (mSmmMpSyncData->EffectiveSyncMode == SmmCpuSyncModeTradition) {\r | |
053e878b | 1345 | DEBUG ((DEBUG_ERROR, "!mSmmMpSyncData->CpuData[%d].Present\n", CpuIndex));\r |
717fb604 | 1346 | }\r |
053e878b | 1347 | \r |
717fb604 JY |
1348 | return EFI_INVALID_PARAMETER;\r |
1349 | }\r | |
053e878b | 1350 | \r |
717fb604 JY |
1351 | if (gSmmCpuPrivate->Operation[CpuIndex] == SmmCpuRemove) {\r |
1352 | if (!FeaturePcdGet (PcdCpuHotPlugSupport)) {\r | |
053e878b | 1353 | DEBUG ((DEBUG_ERROR, "gSmmCpuPrivate->Operation[%d] == SmmCpuRemove\n", CpuIndex));\r |
717fb604 | 1354 | }\r |
053e878b | 1355 | \r |
717fb604 JY |
1356 | return EFI_INVALID_PARAMETER;\r |
1357 | }\r | |
053e878b | 1358 | \r |
51dd408a ED |
1359 | if ((TimeoutInMicroseconds != 0) && ((mSmmMp.Attributes & EFI_MM_MP_TIMEOUT_SUPPORTED) == 0)) {\r |
1360 | return EFI_INVALID_PARAMETER;\r | |
1361 | }\r | |
053e878b | 1362 | \r |
51dd408a ED |
1363 | if (Procedure == NULL) {\r |
1364 | return EFI_INVALID_PARAMETER;\r | |
1365 | }\r | |
717fb604 | 1366 | \r |
832c4c7a | 1367 | AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);\r |
51dd408a | 1368 | \r |
529a5a86 MK |
1369 | mSmmMpSyncData->CpuData[CpuIndex].Procedure = Procedure;\r |
1370 | mSmmMpSyncData->CpuData[CpuIndex].Parameter = ProcArguments;\r | |
51dd408a | 1371 | if (Token != NULL) {\r |
54ba08c6 RN |
1372 | if (Token != &mSmmStartupThisApToken) {\r |
1373 | //\r | |
1374 | // When Token points to mSmmStartupThisApToken, this routine is called\r | |
1375 | // from SmmStartupThisAp() in non-blocking mode (PcdCpuSmmBlockStartupThisAp == FALSE).\r | |
1376 | //\r | |
1377 | // In this case, caller wants to startup AP procedure in non-blocking\r | |
1378 | // mode and cannot get the completion status from the Token because there\r | |
1379 | // is no way to return the Token to caller from SmmStartupThisAp().\r | |
1380 | // Caller needs to use its implementation specific way to query the completion status.\r | |
1381 | //\r | |
1382 | // There is no need to allocate a token for such case so the 3 overheads\r | |
1383 | // can be avoided:\r | |
1384 | // 1. Call AllocateTokenBuffer() when there is no free token.\r | |
1385 | // 2. Get a free token from the token buffer.\r | |
1386 | // 3. Call ReleaseToken() in APHandler().\r | |
1387 | //\r | |
053e878b | 1388 | ProcToken = GetFreeToken (1);\r |
54ba08c6 | 1389 | mSmmMpSyncData->CpuData[CpuIndex].Token = ProcToken;\r |
053e878b | 1390 | *Token = (MM_COMPLETION)ProcToken->SpinLock;\r |
54ba08c6 | 1391 | }\r |
51dd408a | 1392 | }\r |
053e878b MK |
1393 | \r |
1394 | mSmmMpSyncData->CpuData[CpuIndex].Status = CpuStatus;\r | |
51dd408a ED |
1395 | if (mSmmMpSyncData->CpuData[CpuIndex].Status != NULL) {\r |
1396 | *mSmmMpSyncData->CpuData[CpuIndex].Status = EFI_NOT_READY;\r | |
1397 | }\r | |
1398 | \r | |
ed3d5ecb | 1399 | ReleaseSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);\r |
529a5a86 | 1400 | \r |
51dd408a | 1401 | if (Token == NULL) {\r |
ed3d5ecb JF |
1402 | AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);\r |
1403 | ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);\r | |
529a5a86 | 1404 | }\r |
51dd408a ED |
1405 | \r |
1406 | return EFI_SUCCESS;\r | |
1407 | }\r | |
1408 | \r | |
1409 | /**\r | |
1410 | Worker function to execute a caller provided function on all enabled APs.\r | |
1411 | \r | |
1412 | @param[in] Procedure A pointer to the function to be run on\r | |
1413 | enabled APs of the system.\r | |
1414 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r | |
1415 | APs to return from Procedure, either for\r | |
1416 | blocking or non-blocking mode.\r | |
1417 | @param[in,out] ProcedureArguments The parameter passed into Procedure for\r | |
1418 | all APs.\r | |
1419 | @param[in,out] Token This is an optional parameter that allows the caller to execute the\r | |
1420 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
1421 | call is blocking, and the call will not return until the AP has\r | |
1422 | completed the procedure. If the token is not NULL, the call will\r | |
1423 | return immediately. The caller can check whether the procedure has\r | |
1424 | completed with CheckOnProcedure or WaitForProcedure.\r | |
1425 | @param[in,out] CPUStatus This optional pointer may be used to get the status code returned\r | |
1426 | by Procedure when it completes execution on the target AP, or with\r | |
1427 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
1428 | timeout. The implementation will update this variable with\r | |
1429 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
1430 | \r | |
1431 | \r | |
1432 | @retval EFI_SUCCESS In blocking mode, all APs have finished before\r | |
1433 | the timeout expired.\r | |
1434 | @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r | |
1435 | to all enabled APs.\r | |
1436 | @retval others Failed to Startup all APs.\r | |
1437 | \r | |
1438 | **/\r | |
1439 | EFI_STATUS\r | |
1440 | InternalSmmStartupAllAPs (\r | |
053e878b MK |
1441 | IN EFI_AP_PROCEDURE2 Procedure,\r |
1442 | IN UINTN TimeoutInMicroseconds,\r | |
1443 | IN OUT VOID *ProcedureArguments OPTIONAL,\r | |
1444 | IN OUT MM_COMPLETION *Token,\r | |
1445 | IN OUT EFI_STATUS *CPUStatus\r | |
51dd408a ED |
1446 | )\r |
1447 | {\r | |
053e878b MK |
1448 | UINTN Index;\r |
1449 | UINTN CpuCount;\r | |
1450 | PROCEDURE_TOKEN *ProcToken;\r | |
51dd408a ED |
1451 | \r |
1452 | if ((TimeoutInMicroseconds != 0) && ((mSmmMp.Attributes & EFI_MM_MP_TIMEOUT_SUPPORTED) == 0)) {\r | |
1453 | return EFI_INVALID_PARAMETER;\r | |
1454 | }\r | |
053e878b | 1455 | \r |
51dd408a ED |
1456 | if (Procedure == NULL) {\r |
1457 | return EFI_INVALID_PARAMETER;\r | |
1458 | }\r | |
1459 | \r | |
1460 | CpuCount = 0;\r | |
70911f1f | 1461 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r |
51dd408a | 1462 | if (IsPresentAp (Index)) {\r |
053e878b | 1463 | CpuCount++;\r |
51dd408a ED |
1464 | \r |
1465 | if (gSmmCpuPrivate->Operation[Index] == SmmCpuRemove) {\r | |
1466 | return EFI_INVALID_PARAMETER;\r | |
1467 | }\r | |
1468 | \r | |
053e878b | 1469 | if (!AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[Index].Busy)) {\r |
51dd408a ED |
1470 | return EFI_NOT_READY;\r |
1471 | }\r | |
053e878b | 1472 | \r |
51dd408a ED |
1473 | ReleaseSpinLock (mSmmMpSyncData->CpuData[Index].Busy);\r |
1474 | }\r | |
1475 | }\r | |
053e878b | 1476 | \r |
51dd408a ED |
1477 | if (CpuCount == 0) {\r |
1478 | return EFI_NOT_STARTED;\r | |
1479 | }\r | |
1480 | \r | |
1481 | if (Token != NULL) {\r | |
b948a496 | 1482 | ProcToken = GetFreeToken ((UINT32)mMaxNumberOfCpus);\r |
053e878b | 1483 | *Token = (MM_COMPLETION)ProcToken->SpinLock;\r |
a457823f ED |
1484 | } else {\r |
1485 | ProcToken = NULL;\r | |
51dd408a ED |
1486 | }\r |
1487 | \r | |
1488 | //\r | |
1489 | // Make sure all BUSY should be acquired.\r | |
1490 | //\r | |
1491 | // Because former code already check mSmmMpSyncData->CpuData[***].Busy for each AP.\r | |
1492 | // Here code always use AcquireSpinLock instead of AcquireSpinLockOrFail for not\r | |
1493 | // block mode.\r | |
1494 | //\r | |
70911f1f | 1495 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r |
51dd408a ED |
1496 | if (IsPresentAp (Index)) {\r |
1497 | AcquireSpinLock (mSmmMpSyncData->CpuData[Index].Busy);\r | |
1498 | }\r | |
1499 | }\r | |
1500 | \r | |
70911f1f | 1501 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r |
51dd408a | 1502 | if (IsPresentAp (Index)) {\r |
053e878b | 1503 | mSmmMpSyncData->CpuData[Index].Procedure = (EFI_AP_PROCEDURE2)Procedure;\r |
51dd408a | 1504 | mSmmMpSyncData->CpuData[Index].Parameter = ProcedureArguments;\r |
a457823f | 1505 | if (ProcToken != NULL) {\r |
053e878b | 1506 | mSmmMpSyncData->CpuData[Index].Token = ProcToken;\r |
51dd408a | 1507 | }\r |
053e878b | 1508 | \r |
51dd408a | 1509 | if (CPUStatus != NULL) {\r |
053e878b | 1510 | mSmmMpSyncData->CpuData[Index].Status = &CPUStatus[Index];\r |
51dd408a ED |
1511 | if (mSmmMpSyncData->CpuData[Index].Status != NULL) {\r |
1512 | *mSmmMpSyncData->CpuData[Index].Status = EFI_NOT_READY;\r | |
1513 | }\r | |
1514 | }\r | |
1515 | } else {\r | |
1516 | //\r | |
1517 | // PI spec requirement:\r | |
1518 | // For every excluded processor, the array entry must contain a value of EFI_NOT_STARTED.\r | |
1519 | //\r | |
1520 | if (CPUStatus != NULL) {\r | |
1521 | CPUStatus[Index] = EFI_NOT_STARTED;\r | |
1522 | }\r | |
a457823f ED |
1523 | \r |
1524 | //\r | |
1525 | // Decrease the count to mark this processor(AP or BSP) as finished.\r | |
1526 | //\r | |
1527 | if (ProcToken != NULL) {\r | |
1528 | WaitForSemaphore (&ProcToken->RunningApCount);\r | |
1529 | }\r | |
51dd408a ED |
1530 | }\r |
1531 | }\r | |
1532 | \r | |
1533 | ReleaseAllAPs ();\r | |
1534 | \r | |
1535 | if (Token == NULL) {\r | |
1536 | //\r | |
1537 | // Make sure all APs have completed their tasks.\r | |
1538 | //\r | |
1539 | WaitForAllAPsNotBusy (TRUE);\r | |
1540 | }\r | |
1541 | \r | |
1542 | return EFI_SUCCESS;\r | |
1543 | }\r | |
1544 | \r | |
1545 | /**\r | |
1546 | ISO C99 6.5.2.2 "Function calls", paragraph 9:\r | |
1547 | If the function is defined with a type that is not compatible with\r | |
1548 | the type (of the expression) pointed to by the expression that\r | |
1549 | denotes the called function, the behavior is undefined.\r | |
1550 | \r | |
1551 | So add below wrapper function to convert between EFI_AP_PROCEDURE\r | |
1552 | and EFI_AP_PROCEDURE2.\r | |
1553 | \r | |
1554 | Wrapper for Procedures.\r | |
1555 | \r | |
1556 | @param[in] Buffer Pointer to PROCEDURE_WRAPPER buffer.\r | |
1557 | \r | |
1558 | **/\r | |
1559 | EFI_STATUS\r | |
1560 | EFIAPI\r | |
1561 | ProcedureWrapper (\r | |
053e878b | 1562 | IN VOID *Buffer\r |
51dd408a ED |
1563 | )\r |
1564 | {\r | |
053e878b | 1565 | PROCEDURE_WRAPPER *Wrapper;\r |
51dd408a ED |
1566 | \r |
1567 | Wrapper = Buffer;\r | |
1568 | Wrapper->Procedure (Wrapper->ProcedureArgument);\r | |
1569 | \r | |
529a5a86 MK |
1570 | return EFI_SUCCESS;\r |
1571 | }\r | |
1572 | \r | |
717fb604 JY |
1573 | /**\r |
1574 | Schedule a procedure to run on the specified CPU in blocking mode.\r | |
1575 | \r | |
1576 | @param[in] Procedure The address of the procedure to run\r | |
1577 | @param[in] CpuIndex Target CPU Index\r | |
1578 | @param[in, out] ProcArguments The parameter to pass to the procedure\r | |
1579 | \r | |
1580 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
1581 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
1582 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
1583 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
1584 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
1585 | \r | |
1586 | **/\r | |
1587 | EFI_STATUS\r | |
1588 | EFIAPI\r | |
1589 | SmmBlockingStartupThisAp (\r | |
053e878b MK |
1590 | IN EFI_AP_PROCEDURE Procedure,\r |
1591 | IN UINTN CpuIndex,\r | |
1592 | IN OUT VOID *ProcArguments OPTIONAL\r | |
717fb604 JY |
1593 | )\r |
1594 | {\r | |
51dd408a ED |
1595 | PROCEDURE_WRAPPER Wrapper;\r |
1596 | \r | |
053e878b | 1597 | Wrapper.Procedure = Procedure;\r |
51dd408a ED |
1598 | Wrapper.ProcedureArgument = ProcArguments;\r |
1599 | \r | |
1600 | //\r | |
1601 | // Use wrapper function to convert EFI_AP_PROCEDURE to EFI_AP_PROCEDURE2.\r | |
1602 | //\r | |
1603 | return InternalSmmStartupThisAp (ProcedureWrapper, CpuIndex, &Wrapper, NULL, 0, NULL);\r | |
717fb604 JY |
1604 | }\r |
1605 | \r | |
1606 | /**\r | |
1607 | Schedule a procedure to run on the specified CPU.\r | |
1608 | \r | |
1609 | @param Procedure The address of the procedure to run\r | |
1610 | @param CpuIndex Target CPU Index\r | |
1611 | @param ProcArguments The parameter to pass to the procedure\r | |
1612 | \r | |
1613 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
1614 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
1615 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
1616 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
1617 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
1618 | \r | |
1619 | **/\r | |
1620 | EFI_STATUS\r | |
1621 | EFIAPI\r | |
1622 | SmmStartupThisAp (\r | |
053e878b MK |
1623 | IN EFI_AP_PROCEDURE Procedure,\r |
1624 | IN UINTN CpuIndex,\r | |
1625 | IN OUT VOID *ProcArguments OPTIONAL\r | |
717fb604 JY |
1626 | )\r |
1627 | {\r | |
053e878b | 1628 | gSmmCpuPrivate->ApWrapperFunc[CpuIndex].Procedure = Procedure;\r |
51dd408a ED |
1629 | gSmmCpuPrivate->ApWrapperFunc[CpuIndex].ProcedureArgument = ProcArguments;\r |
1630 | \r | |
1631 | //\r | |
1632 | // Use wrapper function to convert EFI_AP_PROCEDURE to EFI_AP_PROCEDURE2.\r | |
1633 | //\r | |
1634 | return InternalSmmStartupThisAp (\r | |
053e878b MK |
1635 | ProcedureWrapper,\r |
1636 | CpuIndex,\r | |
1637 | &gSmmCpuPrivate->ApWrapperFunc[CpuIndex],\r | |
1638 | FeaturePcdGet (PcdCpuSmmBlockStartupThisAp) ? NULL : &mSmmStartupThisApToken,\r | |
1639 | 0,\r | |
1640 | NULL\r | |
1641 | );\r | |
717fb604 JY |
1642 | }\r |
1643 | \r | |
f45f2d4a | 1644 | /**\r |
3eed6dda | 1645 | This function sets DR6 & DR7 according to SMM save state, before running SMM C code.\r |
f45f2d4a JY |
1646 | They are useful when you want to enable hardware breakpoints in SMM without entry SMM mode.\r |
1647 | \r | |
1648 | NOTE: It might not be appreciated in runtime since it might\r | |
1649 | conflict with OS debugging facilities. Turn them off in RELEASE.\r | |
1650 | \r | |
1651 | @param CpuIndex CPU Index\r | |
1652 | \r | |
1653 | **/\r | |
1654 | VOID\r | |
1655 | EFIAPI\r | |
1656 | CpuSmmDebugEntry (\r | |
1657 | IN UINTN CpuIndex\r | |
1658 | )\r | |
1659 | {\r | |
053e878b | 1660 | SMRAM_SAVE_STATE_MAP *CpuSaveState;\r |
7367cc6c | 1661 | \r |
f45f2d4a | 1662 | if (FeaturePcdGet (PcdCpuSmmDebug)) {\r |
053e878b | 1663 | ASSERT (CpuIndex < mMaxNumberOfCpus);\r |
3eed6dda | 1664 | CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];\r |
f45f2d4a JY |
1665 | if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {\r |
1666 | AsmWriteDr6 (CpuSaveState->x86._DR6);\r | |
1667 | AsmWriteDr7 (CpuSaveState->x86._DR7);\r | |
1668 | } else {\r | |
1669 | AsmWriteDr6 ((UINTN)CpuSaveState->x64._DR6);\r | |
1670 | AsmWriteDr7 ((UINTN)CpuSaveState->x64._DR7);\r | |
1671 | }\r | |
1672 | }\r | |
1673 | }\r | |
1674 | \r | |
1675 | /**\r | |
3eed6dda | 1676 | This function restores DR6 & DR7 to SMM save state.\r |
f45f2d4a JY |
1677 | \r |
1678 | NOTE: It might not be appreciated in runtime since it might\r | |
1679 | conflict with OS debugging facilities. Turn them off in RELEASE.\r | |
1680 | \r | |
1681 | @param CpuIndex CPU Index\r | |
1682 | \r | |
1683 | **/\r | |
1684 | VOID\r | |
1685 | EFIAPI\r | |
1686 | CpuSmmDebugExit (\r | |
1687 | IN UINTN CpuIndex\r | |
1688 | )\r | |
1689 | {\r | |
053e878b | 1690 | SMRAM_SAVE_STATE_MAP *CpuSaveState;\r |
f45f2d4a JY |
1691 | \r |
1692 | if (FeaturePcdGet (PcdCpuSmmDebug)) {\r | |
053e878b | 1693 | ASSERT (CpuIndex < mMaxNumberOfCpus);\r |
3eed6dda | 1694 | CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];\r |
f45f2d4a JY |
1695 | if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {\r |
1696 | CpuSaveState->x86._DR7 = (UINT32)AsmReadDr7 ();\r | |
1697 | CpuSaveState->x86._DR6 = (UINT32)AsmReadDr6 ();\r | |
1698 | } else {\r | |
1699 | CpuSaveState->x64._DR7 = AsmReadDr7 ();\r | |
1700 | CpuSaveState->x64._DR6 = AsmReadDr6 ();\r | |
1701 | }\r | |
1702 | }\r | |
1703 | }\r | |
1704 | \r | |
529a5a86 MK |
1705 | /**\r |
1706 | C function for SMI entry, each processor comes here upon SMI trigger.\r | |
1707 | \r | |
1708 | @param CpuIndex CPU Index\r | |
1709 | \r | |
1710 | **/\r | |
1711 | VOID\r | |
1712 | EFIAPI\r | |
1713 | SmiRendezvous (\r | |
053e878b | 1714 | IN UINTN CpuIndex\r |
529a5a86 MK |
1715 | )\r |
1716 | {\r | |
053e878b MK |
1717 | EFI_STATUS Status;\r |
1718 | BOOLEAN ValidSmi;\r | |
1719 | BOOLEAN IsBsp;\r | |
1720 | BOOLEAN BspInProgress;\r | |
1721 | UINTN Index;\r | |
1722 | UINTN Cr2;\r | |
717fb604 | 1723 | \r |
053e878b | 1724 | ASSERT (CpuIndex < mMaxNumberOfCpus);\r |
529a5a86 | 1725 | \r |
ec07fd0e WJ |
1726 | if (mSmmRelocated) {\r |
1727 | ASSERT (mSmmInitialized != NULL);\r | |
1728 | }\r | |
1729 | \r | |
529a5a86 | 1730 | //\r |
37f9fea5 VN |
1731 | // Save Cr2 because Page Fault exception in SMM may override its value,\r |
1732 | // when using on-demand paging for above 4G memory.\r | |
529a5a86 | 1733 | //\r |
37f9fea5 VN |
1734 | Cr2 = 0;\r |
1735 | SaveCr2 (&Cr2);\r | |
529a5a86 | 1736 | \r |
ec07fd0e WJ |
1737 | if (mSmmRelocated && !mSmmInitialized[CpuIndex]) {\r |
1738 | //\r | |
1739 | // Perform SmmInitHandler for CpuIndex\r | |
1740 | //\r | |
1741 | SmmInitHandler ();\r | |
1742 | \r | |
1743 | //\r | |
1744 | // Restore Cr2\r | |
1745 | //\r | |
1746 | RestoreCr2 (Cr2);\r | |
1747 | \r | |
1748 | //\r | |
1749 | // Mark the first SMI init for CpuIndex has been done so as to avoid the reentry.\r | |
1750 | //\r | |
1751 | mSmmInitialized[CpuIndex] = TRUE;\r | |
1752 | \r | |
1753 | return;\r | |
1754 | }\r | |
1755 | \r | |
51dd408a ED |
1756 | //\r |
1757 | // Call the user register Startup function first.\r | |
1758 | //\r | |
1759 | if (mSmmMpSyncData->StartupProcedure != NULL) {\r | |
1760 | mSmmMpSyncData->StartupProcedure (mSmmMpSyncData->StartupProcArgs);\r | |
1761 | }\r | |
1762 | \r | |
529a5a86 MK |
1763 | //\r |
1764 | // Perform CPU specific entry hooks\r | |
1765 | //\r | |
1766 | SmmCpuFeaturesRendezvousEntry (CpuIndex);\r | |
1767 | \r | |
1768 | //\r | |
1769 | // Determine if this is a valid SMI\r | |
1770 | //\r | |
053e878b | 1771 | ValidSmi = PlatformValidSmi ();\r |
529a5a86 MK |
1772 | \r |
1773 | //\r | |
1774 | // Determine if BSP has been already in progress. Note this must be checked after\r | |
1775 | // ValidSmi because BSP may clear a valid SMI source after checking in.\r | |
1776 | //\r | |
fe3a75bc | 1777 | BspInProgress = *mSmmMpSyncData->InsideSmm;\r |
529a5a86 MK |
1778 | \r |
1779 | if (!BspInProgress && !ValidSmi) {\r | |
1780 | //\r | |
1781 | // If we reach here, it means when we sampled the ValidSmi flag, SMI status had not\r | |
1782 | // been cleared by BSP in a new SMI run (so we have a truly invalid SMI), or SMI\r | |
1783 | // status had been cleared by BSP and an existing SMI run has almost ended. (Note\r | |
1784 | // we sampled ValidSmi flag BEFORE judging BSP-in-progress status.) In both cases, there\r | |
1785 | // is nothing we need to do.\r | |
1786 | //\r | |
1787 | goto Exit;\r | |
1788 | } else {\r | |
1789 | //\r | |
1790 | // Signal presence of this processor\r | |
c14c4719 WJ |
1791 | // mSmmMpSyncData->Counter is increased here!\r |
1792 | // "ReleaseSemaphore (mSmmMpSyncData->Counter) == 0" means BSP has already ended the synchronization.\r | |
529a5a86 | 1793 | //\r |
fe3a75bc | 1794 | if (ReleaseSemaphore (mSmmMpSyncData->Counter) == 0) {\r |
529a5a86 MK |
1795 | //\r |
1796 | // BSP has already ended the synchronization, so QUIT!!!\r | |
c14c4719 | 1797 | // Existing AP is too late now to enter SMI since BSP has already ended the synchronization!!!\r |
529a5a86 MK |
1798 | //\r |
1799 | \r | |
1800 | //\r | |
1801 | // Wait for BSP's signal to finish SMI\r | |
1802 | //\r | |
fe3a75bc | 1803 | while (*mSmmMpSyncData->AllCpusInSync) {\r |
529a5a86 MK |
1804 | CpuPause ();\r |
1805 | }\r | |
053e878b | 1806 | \r |
529a5a86 MK |
1807 | goto Exit;\r |
1808 | } else {\r | |
529a5a86 MK |
1809 | //\r |
1810 | // The BUSY lock is initialized to Released state.\r | |
1811 | // This needs to be done early enough to be ready for BSP's SmmStartupThisAp() call.\r | |
1812 | // E.g., with Relaxed AP flow, SmmStartupThisAp() may be called immediately\r | |
1813 | // after AP's present flag is detected.\r | |
1814 | //\r | |
ed3d5ecb | 1815 | InitializeSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);\r |
529a5a86 MK |
1816 | }\r |
1817 | \r | |
529a5a86 MK |
1818 | if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r |
1819 | ActivateSmmProfile (CpuIndex);\r | |
1820 | }\r | |
1821 | \r | |
1822 | if (BspInProgress) {\r | |
1823 | //\r | |
1824 | // BSP has been elected. Follow AP path, regardless of ValidSmi flag\r | |
1825 | // as BSP may have cleared the SMI status\r | |
1826 | //\r | |
1827 | APHandler (CpuIndex, ValidSmi, mSmmMpSyncData->EffectiveSyncMode);\r | |
1828 | } else {\r | |
1829 | //\r | |
1830 | // We have a valid SMI\r | |
1831 | //\r | |
1832 | \r | |
1833 | //\r | |
1834 | // Elect BSP\r | |
1835 | //\r | |
1836 | IsBsp = FALSE;\r | |
1837 | if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {\r | |
1838 | if (!mSmmMpSyncData->SwitchBsp || mSmmMpSyncData->CandidateBsp[CpuIndex]) {\r | |
1839 | //\r | |
1840 | // Call platform hook to do BSP election\r | |
1841 | //\r | |
1842 | Status = PlatformSmmBspElection (&IsBsp);\r | |
1843 | if (EFI_SUCCESS == Status) {\r | |
1844 | //\r | |
1845 | // Platform hook determines successfully\r | |
1846 | //\r | |
1847 | if (IsBsp) {\r | |
1848 | mSmmMpSyncData->BspIndex = (UINT32)CpuIndex;\r | |
1849 | }\r | |
1850 | } else {\r | |
1851 | //\r | |
1852 | // Platform hook fails to determine, use default BSP election method\r | |
1853 | //\r | |
1854 | InterlockedCompareExchange32 (\r | |
053e878b | 1855 | (UINT32 *)&mSmmMpSyncData->BspIndex,\r |
529a5a86 MK |
1856 | (UINT32)-1,\r |
1857 | (UINT32)CpuIndex\r | |
1858 | );\r | |
1859 | }\r | |
1860 | }\r | |
1861 | }\r | |
1862 | \r | |
1863 | //\r | |
1864 | // "mSmmMpSyncData->BspIndex == CpuIndex" means this is the BSP\r | |
1865 | //\r | |
1866 | if (mSmmMpSyncData->BspIndex == CpuIndex) {\r | |
529a5a86 MK |
1867 | //\r |
1868 | // Clear last request for SwitchBsp.\r | |
1869 | //\r | |
1870 | if (mSmmMpSyncData->SwitchBsp) {\r | |
1871 | mSmmMpSyncData->SwitchBsp = FALSE;\r | |
1872 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r | |
1873 | mSmmMpSyncData->CandidateBsp[Index] = FALSE;\r | |
1874 | }\r | |
1875 | }\r | |
1876 | \r | |
1877 | if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r | |
1878 | SmmProfileRecordSmiNum ();\r | |
1879 | }\r | |
1880 | \r | |
1881 | //\r | |
1882 | // BSP Handler is always called with a ValidSmi == TRUE\r | |
1883 | //\r | |
1884 | BSPHandler (CpuIndex, mSmmMpSyncData->EffectiveSyncMode);\r | |
529a5a86 MK |
1885 | } else {\r |
1886 | APHandler (CpuIndex, ValidSmi, mSmmMpSyncData->EffectiveSyncMode);\r | |
1887 | }\r | |
1888 | }\r | |
1889 | \r | |
ed3d5ecb | 1890 | ASSERT (*mSmmMpSyncData->CpuData[CpuIndex].Run == 0);\r |
529a5a86 MK |
1891 | \r |
1892 | //\r | |
1893 | // Wait for BSP's signal to exit SMI\r | |
1894 | //\r | |
fe3a75bc | 1895 | while (*mSmmMpSyncData->AllCpusInSync) {\r |
529a5a86 MK |
1896 | CpuPause ();\r |
1897 | }\r | |
1898 | }\r | |
1899 | \r | |
1900 | Exit:\r | |
1901 | SmmCpuFeaturesRendezvousExit (CpuIndex);\r | |
37f9fea5 | 1902 | \r |
529a5a86 MK |
1903 | //\r |
1904 | // Restore Cr2\r | |
1905 | //\r | |
37f9fea5 | 1906 | RestoreCr2 (Cr2);\r |
529a5a86 MK |
1907 | }\r |
1908 | \r | |
c14c4719 WJ |
1909 | /**\r |
1910 | Initialize PackageBsp Info. Processor specified by mPackageFirstThreadIndex[PackageIndex]\r | |
1911 | will do the package-scope register programming. Set default CpuIndex to (UINT32)-1, which\r | |
1912 | means not specified yet.\r | |
1913 | \r | |
1914 | **/\r | |
1915 | VOID\r | |
1916 | InitPackageFirstThreadIndexInfo (\r | |
1917 | VOID\r | |
1918 | )\r | |
1919 | {\r | |
1920 | UINT32 Index;\r | |
1921 | UINT32 PackageId;\r | |
1922 | UINT32 PackageCount;\r | |
1923 | \r | |
1924 | PackageId = 0;\r | |
1925 | PackageCount = 0;\r | |
1926 | \r | |
1927 | //\r | |
1928 | // Count the number of package, set to max PackageId + 1\r | |
1929 | //\r | |
1930 | for (Index = 0; Index < mNumberOfCpus; Index++) {\r | |
1931 | if (PackageId < gSmmCpuPrivate->ProcessorInfo[Index].Location.Package) {\r | |
1932 | PackageId = gSmmCpuPrivate->ProcessorInfo[Index].Location.Package;\r | |
1933 | }\r | |
1934 | }\r | |
1935 | \r | |
1936 | PackageCount = PackageId + 1;\r | |
1937 | \r | |
1938 | mPackageFirstThreadIndex = (UINT32 *)AllocatePool (sizeof (UINT32) * PackageCount);\r | |
1939 | ASSERT (mPackageFirstThreadIndex != NULL);\r | |
1940 | if (mPackageFirstThreadIndex == NULL) {\r | |
1941 | return;\r | |
1942 | }\r | |
1943 | \r | |
1944 | //\r | |
1945 | // Set default CpuIndex to (UINT32)-1, which means not specified yet.\r | |
1946 | //\r | |
1947 | SetMem32 (mPackageFirstThreadIndex, sizeof (UINT32) * PackageCount, (UINT32)-1);\r | |
1948 | }\r | |
1949 | \r | |
51dd408a ED |
1950 | /**\r |
1951 | Allocate buffer for SpinLock and Wrapper function buffer.\r | |
1952 | \r | |
1953 | **/\r | |
1954 | VOID\r | |
1955 | InitializeDataForMmMp (\r | |
1956 | VOID\r | |
1957 | )\r | |
1958 | {\r | |
1959 | gSmmCpuPrivate->ApWrapperFunc = AllocatePool (sizeof (PROCEDURE_WRAPPER) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus);\r | |
1960 | ASSERT (gSmmCpuPrivate->ApWrapperFunc != NULL);\r | |
1961 | \r | |
1962 | InitializeListHead (&gSmmCpuPrivate->TokenList);\r | |
b948a496 | 1963 | \r |
3fdc47c6 | 1964 | gSmmCpuPrivate->FirstFreeToken = AllocateTokenBuffer ();\r |
51dd408a ED |
1965 | }\r |
1966 | \r | |
1d648531 JF |
1967 | /**\r |
1968 | Allocate buffer for all semaphores and spin locks.\r | |
1969 | \r | |
1970 | **/\r | |
1971 | VOID\r | |
1972 | InitializeSmmCpuSemaphores (\r | |
1973 | VOID\r | |
1974 | )\r | |
1975 | {\r | |
053e878b MK |
1976 | UINTN ProcessorCount;\r |
1977 | UINTN TotalSize;\r | |
1978 | UINTN GlobalSemaphoresSize;\r | |
1979 | UINTN CpuSemaphoresSize;\r | |
1980 | UINTN SemaphoreSize;\r | |
1981 | UINTN Pages;\r | |
1982 | UINTN *SemaphoreBlock;\r | |
1983 | UINTN SemaphoreAddr;\r | |
1984 | \r | |
1985 | SemaphoreSize = GetSpinLockProperties ();\r | |
1986 | ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r | |
1d648531 | 1987 | GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;\r |
4e920581 | 1988 | CpuSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;\r |
053e878b MK |
1989 | TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize;\r |
1990 | DEBUG ((DEBUG_INFO, "One Semaphore Size = 0x%x\n", SemaphoreSize));\r | |
1991 | DEBUG ((DEBUG_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));\r | |
1992 | Pages = EFI_SIZE_TO_PAGES (TotalSize);\r | |
1d648531 JF |
1993 | SemaphoreBlock = AllocatePages (Pages);\r |
1994 | ASSERT (SemaphoreBlock != NULL);\r | |
1995 | ZeroMem (SemaphoreBlock, TotalSize);\r | |
1996 | \r | |
053e878b | 1997 | SemaphoreAddr = (UINTN)SemaphoreBlock;\r |
1d648531 | 1998 | mSmmCpuSemaphores.SemaphoreGlobal.Counter = (UINT32 *)SemaphoreAddr;\r |
053e878b | 1999 | SemaphoreAddr += SemaphoreSize;\r |
1d648531 | 2000 | mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm = (BOOLEAN *)SemaphoreAddr;\r |
053e878b | 2001 | SemaphoreAddr += SemaphoreSize;\r |
1d648531 | 2002 | mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync = (BOOLEAN *)SemaphoreAddr;\r |
053e878b | 2003 | SemaphoreAddr += SemaphoreSize;\r |
1d648531 | 2004 | mSmmCpuSemaphores.SemaphoreGlobal.PFLock = (SPIN_LOCK *)SemaphoreAddr;\r |
053e878b | 2005 | SemaphoreAddr += SemaphoreSize;\r |
1d648531 | 2006 | mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock\r |
053e878b | 2007 | = (SPIN_LOCK *)SemaphoreAddr;\r |
6c4c15fa | 2008 | SemaphoreAddr += SemaphoreSize;\r |
6c4c15fa | 2009 | \r |
053e878b | 2010 | SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize;\r |
4e920581 | 2011 | mSmmCpuSemaphores.SemaphoreCpu.Busy = (SPIN_LOCK *)SemaphoreAddr;\r |
053e878b | 2012 | SemaphoreAddr += ProcessorCount * SemaphoreSize;\r |
4e920581 | 2013 | mSmmCpuSemaphores.SemaphoreCpu.Run = (UINT32 *)SemaphoreAddr;\r |
053e878b | 2014 | SemaphoreAddr += ProcessorCount * SemaphoreSize;\r |
4e920581 JF |
2015 | mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;\r |
2016 | \r | |
fe3a75bc JF |
2017 | mPFLock = mSmmCpuSemaphores.SemaphoreGlobal.PFLock;\r |
2018 | mConfigSmmCodeAccessCheckLock = mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock;\r | |
2019 | \r | |
1d648531 JF |
2020 | mSemaphoreSize = SemaphoreSize;\r |
2021 | }\r | |
529a5a86 MK |
2022 | \r |
2023 | /**\r | |
2024 | Initialize un-cacheable data.\r | |
2025 | \r | |
2026 | **/\r | |
2027 | VOID\r | |
2028 | EFIAPI\r | |
2029 | InitializeMpSyncData (\r | |
2030 | VOID\r | |
2031 | )\r | |
2032 | {\r | |
053e878b | 2033 | UINTN CpuIndex;\r |
8b9311b7 | 2034 | \r |
529a5a86 | 2035 | if (mSmmMpSyncData != NULL) {\r |
e78a2a49 JF |
2036 | //\r |
2037 | // mSmmMpSyncDataSize includes one structure of SMM_DISPATCHER_MP_SYNC_DATA, one\r | |
2038 | // CpuData array of SMM_CPU_DATA_BLOCK and one CandidateBsp array of BOOLEAN.\r | |
2039 | //\r | |
2040 | ZeroMem (mSmmMpSyncData, mSmmMpSyncDataSize);\r | |
053e878b | 2041 | mSmmMpSyncData->CpuData = (SMM_CPU_DATA_BLOCK *)((UINT8 *)mSmmMpSyncData + sizeof (SMM_DISPATCHER_MP_SYNC_DATA));\r |
529a5a86 MK |
2042 | mSmmMpSyncData->CandidateBsp = (BOOLEAN *)(mSmmMpSyncData->CpuData + gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus);\r |
2043 | if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {\r | |
2044 | //\r | |
2045 | // Enable BSP election by setting BspIndex to -1\r | |
2046 | //\r | |
2047 | mSmmMpSyncData->BspIndex = (UINT32)-1;\r | |
2048 | }\r | |
053e878b | 2049 | \r |
b43dd229 | 2050 | mSmmMpSyncData->EffectiveSyncMode = mCpuSmmSyncMode;\r |
1d648531 | 2051 | \r |
8b9311b7 JF |
2052 | mSmmMpSyncData->Counter = mSmmCpuSemaphores.SemaphoreGlobal.Counter;\r |
2053 | mSmmMpSyncData->InsideSmm = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;\r | |
2054 | mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;\r | |
053e878b MK |
2055 | ASSERT (\r |
2056 | mSmmMpSyncData->Counter != NULL && mSmmMpSyncData->InsideSmm != NULL &&\r | |
2057 | mSmmMpSyncData->AllCpusInSync != NULL\r | |
2058 | );\r | |
8b9311b7 JF |
2059 | *mSmmMpSyncData->Counter = 0;\r |
2060 | *mSmmMpSyncData->InsideSmm = FALSE;\r | |
2061 | *mSmmMpSyncData->AllCpusInSync = FALSE;\r | |
2062 | \r | |
4a68176c LZ |
2063 | mSmmMpSyncData->AllApArrivedWithException = FALSE;\r |
2064 | \r | |
053e878b MK |
2065 | for (CpuIndex = 0; CpuIndex < gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus; CpuIndex++) {\r |
2066 | mSmmMpSyncData->CpuData[CpuIndex].Busy =\r | |
8b9311b7 | 2067 | (SPIN_LOCK *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Busy + mSemaphoreSize * CpuIndex);\r |
053e878b | 2068 | mSmmMpSyncData->CpuData[CpuIndex].Run =\r |
8b9311b7 JF |
2069 | (UINT32 *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Run + mSemaphoreSize * CpuIndex);\r |
2070 | mSmmMpSyncData->CpuData[CpuIndex].Present =\r | |
2071 | (BOOLEAN *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Present + mSemaphoreSize * CpuIndex);\r | |
56e4a7d7 JF |
2072 | *(mSmmMpSyncData->CpuData[CpuIndex].Busy) = 0;\r |
2073 | *(mSmmMpSyncData->CpuData[CpuIndex].Run) = 0;\r | |
2074 | *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;\r | |
8b9311b7 | 2075 | }\r |
529a5a86 MK |
2076 | }\r |
2077 | }\r | |
2078 | \r | |
2079 | /**\r | |
2080 | Initialize global data for MP synchronization.\r | |
2081 | \r | |
3eb69b08 JY |
2082 | @param Stacks Base address of SMI stack buffer for all processors.\r |
2083 | @param StackSize Stack size for each processor in SMM.\r | |
2084 | @param ShadowStackSize Shadow Stack size for each processor in SMM.\r | |
529a5a86 MK |
2085 | \r |
2086 | **/\r | |
2087 | UINT32\r | |
2088 | InitializeMpServiceData (\r | |
053e878b MK |
2089 | IN VOID *Stacks,\r |
2090 | IN UINTN StackSize,\r | |
2091 | IN UINTN ShadowStackSize\r | |
529a5a86 MK |
2092 | )\r |
2093 | {\r | |
29e300ff RN |
2094 | UINT32 Cr3;\r |
2095 | UINTN Index;\r | |
2096 | UINT8 *GdtTssTables;\r | |
2097 | UINTN GdtTableStepSize;\r | |
2098 | CPUID_VERSION_INFO_EDX RegEdx;\r | |
2099 | UINT32 MaxExtendedFunction;\r | |
2100 | CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;\r | |
ba40cb31 MK |
2101 | \r |
2102 | //\r | |
2103 | // Determine if this CPU supports machine check\r | |
2104 | //\r | |
2105 | AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx.Uint32);\r | |
2106 | mMachineCheckSupported = (BOOLEAN)(RegEdx.Bits.MCA == 1);\r | |
529a5a86 | 2107 | \r |
8b9311b7 JF |
2108 | //\r |
2109 | // Allocate memory for all locks and semaphores\r | |
2110 | //\r | |
2111 | InitializeSmmCpuSemaphores ();\r | |
2112 | \r | |
d67b73cc JF |
2113 | //\r |
2114 | // Initialize mSmmMpSyncData\r | |
2115 | //\r | |
2116 | mSmmMpSyncDataSize = sizeof (SMM_DISPATCHER_MP_SYNC_DATA) +\r | |
2117 | (sizeof (SMM_CPU_DATA_BLOCK) + sizeof (BOOLEAN)) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r | |
053e878b | 2118 | mSmmMpSyncData = (SMM_DISPATCHER_MP_SYNC_DATA *)AllocatePages (EFI_SIZE_TO_PAGES (mSmmMpSyncDataSize));\r |
d67b73cc | 2119 | ASSERT (mSmmMpSyncData != NULL);\r |
b43dd229 | 2120 | mCpuSmmSyncMode = (SMM_CPU_SYNC_MODE)PcdGet8 (PcdCpuSmmSyncMode);\r |
d67b73cc JF |
2121 | InitializeMpSyncData ();\r |
2122 | \r | |
529a5a86 MK |
2123 | //\r |
2124 | // Initialize physical address mask\r | |
2125 | // NOTE: Physical memory above virtual address limit is not supported !!!\r | |
2126 | //\r | |
29e300ff RN |
2127 | AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);\r |
2128 | if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {\r | |
2129 | AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);\r | |
2130 | } else {\r | |
2131 | VirPhyAddressSize.Bits.PhysicalAddressBits = 36;\r | |
2132 | }\r | |
053e878b MK |
2133 | \r |
2134 | gPhyMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;\r | |
29e300ff RN |
2135 | //\r |
2136 | // Clear the low 12 bits\r | |
2137 | //\r | |
2138 | gPhyMask &= 0xfffffffffffff000ULL;\r | |
529a5a86 MK |
2139 | \r |
2140 | //\r | |
2141 | // Create page tables\r | |
2142 | //\r | |
2143 | Cr3 = SmmInitPageTable ();\r | |
2144 | \r | |
fe5f1949 | 2145 | GdtTssTables = InitGdt (Cr3, &GdtTableStepSize);\r |
529a5a86 MK |
2146 | \r |
2147 | //\r | |
f12367a0 | 2148 | // Install SMI handler for each CPU\r |
529a5a86 MK |
2149 | //\r |
2150 | for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r | |
529a5a86 MK |
2151 | InstallSmiHandler (\r |
2152 | Index,\r | |
2153 | (UINT32)mCpuHotPlugData.SmBase[Index],\r | |
053e878b | 2154 | (VOID *)((UINTN)Stacks + (StackSize + ShadowStackSize) * Index),\r |
529a5a86 | 2155 | StackSize,\r |
f12367a0 MK |
2156 | (UINTN)(GdtTssTables + GdtTableStepSize * Index),\r |
2157 | gcSmiGdtr.Limit + 1,\r | |
529a5a86 MK |
2158 | gcSmiIdtr.Base,\r |
2159 | gcSmiIdtr.Limit + 1,\r | |
2160 | Cr3\r | |
2161 | );\r | |
2162 | }\r | |
2163 | \r | |
529a5a86 MK |
2164 | //\r |
2165 | // Record current MTRR settings\r | |
2166 | //\r | |
26ab5ac3 MK |
2167 | ZeroMem (&gSmiMtrrs, sizeof (gSmiMtrrs));\r |
2168 | MtrrGetAllMtrrs (&gSmiMtrrs);\r | |
529a5a86 MK |
2169 | \r |
2170 | return Cr3;\r | |
2171 | }\r | |
2172 | \r | |
2173 | /**\r | |
2174 | \r | |
2175 | Register the SMM Foundation entry point.\r | |
2176 | \r | |
2177 | @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance\r | |
2178 | @param SmmEntryPoint SMM Foundation EntryPoint\r | |
2179 | \r | |
2180 | @retval EFI_SUCCESS Successfully to register SMM foundation entry point\r | |
2181 | \r | |
2182 | **/\r | |
2183 | EFI_STATUS\r | |
2184 | EFIAPI\r | |
2185 | RegisterSmmEntry (\r | |
2186 | IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,\r | |
2187 | IN EFI_SMM_ENTRY_POINT SmmEntryPoint\r | |
2188 | )\r | |
2189 | {\r | |
2190 | //\r | |
2191 | // Record SMM Foundation EntryPoint, later invoke it on SMI entry vector.\r | |
2192 | //\r | |
2193 | gSmmCpuPrivate->SmmCoreEntry = SmmEntryPoint;\r | |
2194 | return EFI_SUCCESS;\r | |
2195 | }\r | |
51dd408a ED |
2196 | \r |
2197 | /**\r | |
2198 | \r | |
2199 | Register the SMM Foundation entry point.\r | |
2200 | \r | |
2201 | @param[in] Procedure A pointer to the code stream to be run on the designated target AP\r | |
2202 | of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2\r | |
2203 | with the related definitions of\r | |
2204 | EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.\r | |
2205 | If caller may pass a value of NULL to deregister any existing\r | |
2206 | startup procedure.\r | |
073f2ced | 2207 | @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is\r |
51dd408a ED |
2208 | run by the AP. It is an optional common mailbox between APs and\r |
2209 | the caller to share information\r | |
2210 | \r | |
2211 | @retval EFI_SUCCESS The Procedure has been set successfully.\r | |
2212 | @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.\r | |
2213 | \r | |
2214 | **/\r | |
2215 | EFI_STATUS\r | |
2216 | RegisterStartupProcedure (\r | |
053e878b MK |
2217 | IN EFI_AP_PROCEDURE Procedure,\r |
2218 | IN OUT VOID *ProcedureArguments OPTIONAL\r | |
51dd408a ED |
2219 | )\r |
2220 | {\r | |
053e878b | 2221 | if ((Procedure == NULL) && (ProcedureArguments != NULL)) {\r |
51dd408a ED |
2222 | return EFI_INVALID_PARAMETER;\r |
2223 | }\r | |
053e878b | 2224 | \r |
51dd408a ED |
2225 | if (mSmmMpSyncData == NULL) {\r |
2226 | return EFI_NOT_READY;\r | |
2227 | }\r | |
2228 | \r | |
2229 | mSmmMpSyncData->StartupProcedure = Procedure;\r | |
2230 | mSmmMpSyncData->StartupProcArgs = ProcedureArguments;\r | |
2231 | \r | |
2232 | return EFI_SUCCESS;\r | |
2233 | }\r |