projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 529a5a86 MK |
1 | /** @file\r |
| 2 | Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.\r | |
| 3 | \r | |
| ec07fd0e | 4 | Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.<BR>\r |
| 241f9149 LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
| 6 | \r | |
| 0acd8697 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 529a5a86 MK |
8 | \r |
| 9 | **/\r | |
| 10 | \r | |
| 11 | #ifndef _CPU_PISMMCPUDXESMM_H_\r | |
| 12 | #define _CPU_PISMMCPUDXESMM_H_\r | |
| 13 | \r | |
| 14 | #include <PiSmm.h>\r | |
| 15 | \r | |
| 16 | #include <Protocol/MpService.h>\r | |
| 17 | #include <Protocol/SmmConfiguration.h>\r | |
| 18 | #include <Protocol/SmmCpu.h>\r | |
| 19 | #include <Protocol/SmmAccess2.h>\r | |
| 529a5a86 MK |
20 | #include <Protocol/SmmReadyToLock.h>\r |
| 21 | #include <Protocol/SmmCpuService.h>\r | |
| 827330cc | 22 | #include <Protocol/SmmMemoryAttribute.h>\r |
| 51dd408a | 23 | #include <Protocol/MmMp.h>\r |
| 529a5a86 MK |
24 | \r |
| 25 | #include <Guid/AcpiS3Context.h>\r | |
| 8a2e1a9d | 26 | #include <Guid/MemoryAttributesTable.h>\r |
| 717fb604 | 27 | #include <Guid/PiSmmMemoryAttributesTable.h>\r |
| ec07fd0e | 28 | #include <Guid/SmmBaseHob.h>\r |
| 529a5a86 MK |
29 | \r |
| 30 | #include <Library/BaseLib.h>\r | |
| 31 | #include <Library/IoLib.h>\r | |
| 32 | #include <Library/TimerLib.h>\r | |
| 529a5a86 MK |
33 | #include <Library/SynchronizationLib.h>\r |
| 34 | #include <Library/DebugLib.h>\r | |
| 35 | #include <Library/BaseMemoryLib.h>\r | |
| 36 | #include <Library/PcdLib.h>\r | |
| 529a5a86 MK |
37 | #include <Library/MtrrLib.h>\r |
| 38 | #include <Library/SmmCpuPlatformHookLib.h>\r | |
| 39 | #include <Library/SmmServicesTableLib.h>\r | |
| 40 | #include <Library/MemoryAllocationLib.h>\r | |
| 41 | #include <Library/UefiBootServicesTableLib.h>\r | |
| 42 | #include <Library/UefiRuntimeServicesTableLib.h>\r | |
| 43 | #include <Library/DebugAgentLib.h>\r | |
| 8a2e1a9d | 44 | #include <Library/UefiLib.h>\r |
| 529a5a86 MK |
45 | #include <Library/HobLib.h>\r |
| 46 | #include <Library/LocalApicLib.h>\r | |
| 86d41c07 | 47 | #include <Library/CpuLib.h>\r |
| 529a5a86 MK |
48 | #include <Library/UefiCpuLib.h>\r |
| 49 | #include <Library/CpuExceptionHandlerLib.h>\r | |
| 50 | #include <Library/ReportStatusCodeLib.h>\r | |
| 51 | #include <Library/SmmCpuFeaturesLib.h>\r | |
| 52 | #include <Library/PeCoffGetEntryPointLib.h>\r | |
| 93324390 | 53 | #include <Library/RegisterCpuFeaturesLib.h>\r |
| 529a5a86 MK |
54 | \r |
| 55 | #include <AcpiCpuData.h>\r | |
| 56 | #include <CpuHotPlugData.h>\r | |
| 57 | \r | |
| 01acb06c RN |
58 | #include <Register/Intel/Cpuid.h>\r |
| 59 | #include <Register/Intel/Msr.h>\r | |
| 529a5a86 MK |
60 | \r |
| 61 | #include "CpuService.h"\r | |
| 62 | #include "SmmProfile.h"\r | |
| 63 | \r | |
| 3eb69b08 JY |
64 | //\r |
| 65 | // CET definition\r | |
| 66 | //\r | |
| 67 | #define CPUID_CET_SS BIT7\r | |
| 68 | #define CPUID_CET_IBT BIT20\r | |
| 69 | \r | |
| 70 | #define CR4_CET_ENABLE BIT23\r | |
| 71 | \r | |
| 72 | #define MSR_IA32_S_CET 0x6A2\r | |
| 73 | #define MSR_IA32_PL0_SSP 0x6A4\r | |
| 74 | #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8\r | |
| 75 | \r | |
| 76 | typedef union {\r | |
| 77 | struct {\r | |
| 78 | // enable shadow stacks\r | |
| 053e878b | 79 | UINT32 SH_STK_ENP : 1;\r |
| 3eb69b08 | 80 | // enable the WRSS{D,Q}W instructions.\r |
| 053e878b | 81 | UINT32 WR_SHSTK_EN : 1;\r |
| 3eb69b08 | 82 | // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.\r |
| 053e878b | 83 | UINT32 ENDBR_EN : 1;\r |
| 3eb69b08 | 84 | // enable legacy compatibility treatment for indirect call/jmp tracking.\r |
| 053e878b | 85 | UINT32 LEG_IW_EN : 1;\r |
| 3eb69b08 | 86 | // enable use of no-track prefix on indirect call/jmp.\r |
| 053e878b | 87 | UINT32 NO_TRACK_EN : 1;\r |
| 3eb69b08 | 88 | // disable suppression of CET indirect branch tracking on legacy compatibility.\r |
| 053e878b MK |
89 | UINT32 SUPPRESS_DIS : 1;\r |
| 90 | UINT32 RSVD : 4;\r | |
| 3eb69b08 JY |
91 | // indirect branch tracking is suppressed.\r |
| 92 | // This bit can be written to 1 only if TRACKER is written as IDLE.\r | |
| 053e878b | 93 | UINT32 SUPPRESS : 1;\r |
| 3eb69b08 JY |
94 | // Value of the endbranch state machine\r |
| 95 | // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).\r | |
| 053e878b | 96 | UINT32 TRACKER : 1;\r |
| 3eb69b08 JY |
97 | // linear address of a bitmap in memory indicating valid\r |
| 98 | // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled\r | |
| 99 | // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on\r | |
| 100 | // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are\r | |
| 101 | // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address\r | |
| 102 | // (this automatically aligns the address on a 4-Kbyte boundary).\r | |
| 053e878b MK |
103 | UINT32 EB_LEG_BITMAP_BASE_low : 12;\r |
| 104 | UINT32 EB_LEG_BITMAP_BASE_high : 32;\r | |
| 3eb69b08 | 105 | } Bits;\r |
| 053e878b | 106 | UINT64 Uint64;\r |
| 3eb69b08 JY |
107 | } MSR_IA32_CET;\r |
| 108 | \r | |
| 529a5a86 MK |
109 | //\r |
| 110 | // MSRs required for configuration of SMM Code Access Check\r | |
| 111 | //\r | |
| 053e878b MK |
112 | #define EFI_MSR_SMM_MCA_CAP 0x17D\r |
| 113 | #define SMM_CODE_ACCESS_CHK_BIT BIT58\r | |
| 529a5a86 | 114 | \r |
| 053e878b MK |
115 | #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0\r |
| 116 | #define SMM_CODE_CHK_EN_BIT BIT2\r | |
| 529a5a86 MK |
117 | \r |
| 118 | ///\r | |
| 119 | /// Page Table Entry\r | |
| 120 | ///\r | |
| 053e878b MK |
121 | #define IA32_PG_P BIT0\r |
| 122 | #define IA32_PG_RW BIT1\r | |
| 123 | #define IA32_PG_U BIT2\r | |
| 124 | #define IA32_PG_WT BIT3\r | |
| 125 | #define IA32_PG_CD BIT4\r | |
| 126 | #define IA32_PG_A BIT5\r | |
| 127 | #define IA32_PG_D BIT6\r | |
| 128 | #define IA32_PG_PS BIT7\r | |
| 129 | #define IA32_PG_PAT_2M BIT12\r | |
| 130 | #define IA32_PG_PAT_4K IA32_PG_PS\r | |
| 131 | #define IA32_PG_PMNT BIT62\r | |
| 132 | #define IA32_PG_NX BIT63\r | |
| 133 | \r | |
| 134 | #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)\r | |
| 881520ea JY |
135 | //\r |
| 136 | // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE\r | |
| 137 | // X64 PAE PDPTE does not have such restriction\r | |
| 138 | //\r | |
| 053e878b | 139 | #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)\r |
| 881520ea | 140 | \r |
| 053e878b | 141 | #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)\r |
| 717fb604 JY |
142 | \r |
| 143 | #define PAGING_4K_MASK 0xFFF\r | |
| 144 | #define PAGING_2M_MASK 0x1FFFFF\r | |
| 145 | #define PAGING_1G_MASK 0x3FFFFFFF\r | |
| 146 | \r | |
| 147 | #define PAGING_PAE_INDEX_MASK 0x1FF\r | |
| 148 | \r | |
| 053e878b MK |
149 | #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull\r |
| 150 | #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull\r | |
| 151 | #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r | |
| 717fb604 | 152 | \r |
| 053e878b | 153 | #define SMRR_MAX_ADDRESS BASE_4GB\r |
| 7ed6f781 | 154 | \r |
| 717fb604 JY |
155 | typedef enum {\r |
| 156 | PageNone,\r | |
| 157 | Page4K,\r | |
| 158 | Page2M,\r | |
| 159 | Page1G,\r | |
| 160 | } PAGE_ATTRIBUTE;\r | |
| 161 | \r | |
| 162 | typedef struct {\r | |
| 053e878b MK |
163 | PAGE_ATTRIBUTE Attribute;\r |
| 164 | UINT64 Length;\r | |
| 165 | UINT64 AddressMask;\r | |
| 717fb604 JY |
166 | } PAGE_ATTRIBUTE_TABLE;\r |
| 167 | \r | |
| 529a5a86 MK |
168 | //\r |
| 169 | // Size of Task-State Segment defined in IA32 Manual\r | |
| 170 | //\r | |
| 053e878b MK |
171 | #define TSS_SIZE 104\r |
| 172 | #define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP\r | |
| 173 | #define TSS_X64_IST1_OFFSET 36\r | |
| 174 | #define TSS_IA32_CR3_OFFSET 28\r | |
| 175 | #define TSS_IA32_ESP_OFFSET 56\r | |
| 176 | #define TSS_IA32_SSP_OFFSET 104\r | |
| 529a5a86 | 177 | \r |
| 053e878b | 178 | #define CR0_WP BIT16\r |
| 717fb604 | 179 | \r |
| 529a5a86 MK |
180 | //\r |
| 181 | // Code select value\r | |
| 182 | //\r | |
| 053e878b MK |
183 | #define PROTECT_MODE_CODE_SEGMENT 0x08\r |
| 184 | #define LONG_MODE_CODE_SEGMENT 0x38\r | |
| 529a5a86 MK |
185 | \r |
| 186 | //\r | |
| 187 | // The size 0x20 must be bigger than\r | |
| 188 | // the size of template code of SmmInit. Currently,\r | |
| 189 | // the size of SmmInit requires the 0x16 Bytes buffer\r | |
| 190 | // at least.\r | |
| 191 | //\r | |
| 192 | #define BACK_BUF_SIZE 0x20\r | |
| 193 | \r | |
| 053e878b | 194 | #define EXCEPTION_VECTOR_NUMBER 0x20\r |
| 529a5a86 | 195 | \r |
| 053e878b | 196 | #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL\r |
| 529a5a86 | 197 | \r |
| 51dd408a ED |
198 | //\r |
| 199 | // Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.\r | |
| 200 | //\r | |
| 201 | typedef struct {\r | |
| 053e878b MK |
202 | EFI_AP_PROCEDURE Procedure;\r |
| 203 | VOID *ProcedureArgument;\r | |
| 51dd408a ED |
204 | } PROCEDURE_WRAPPER;\r |
| 205 | \r | |
| 206 | #define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')\r | |
| 207 | \r | |
| 208 | typedef struct {\r | |
| 053e878b MK |
209 | UINTN Signature;\r |
| 210 | LIST_ENTRY Link;\r | |
| 51dd408a | 211 | \r |
| 053e878b MK |
212 | SPIN_LOCK *SpinLock;\r |
| 213 | volatile UINT32 RunningApCount;\r | |
| 51dd408a ED |
214 | } PROCEDURE_TOKEN;\r |
| 215 | \r | |
| 216 | #define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)\r | |
| 217 | \r | |
| 9caaa79d ED |
218 | #define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')\r |
| 219 | \r | |
| 220 | typedef struct {\r | |
| 053e878b MK |
221 | UINTN Signature;\r |
| 222 | LIST_ENTRY Link;\r | |
| 9caaa79d | 223 | \r |
| 053e878b | 224 | UINT8 *Buffer;\r |
| 9caaa79d ED |
225 | } TOKEN_BUFFER;\r |
| 226 | \r | |
| 227 | #define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)\r | |
| 228 | \r | |
| 529a5a86 MK |
229 | //\r |
| 230 | // Private structure for the SMM CPU module that is stored in DXE Runtime memory\r | |
| 231 | // Contains the SMM Configuration Protocols that is produced.\r | |
| 232 | // Contains a mix of DXE and SMM contents. All the fields must be used properly.\r | |
| 233 | //\r | |
| 234 | #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')\r | |
| 235 | \r | |
| 236 | typedef struct {\r | |
| 053e878b | 237 | UINTN Signature;\r |
| 529a5a86 | 238 | \r |
| 053e878b | 239 | EFI_HANDLE SmmCpuHandle;\r |
| 529a5a86 | 240 | \r |
| 053e878b MK |
241 | EFI_PROCESSOR_INFORMATION *ProcessorInfo;\r |
| 242 | SMM_CPU_OPERATION *Operation;\r | |
| 243 | UINTN *CpuSaveStateSize;\r | |
| 244 | VOID **CpuSaveState;\r | |
| 529a5a86 | 245 | \r |
| 053e878b MK |
246 | EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];\r |
| 247 | EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;\r | |
| 248 | EFI_SMM_ENTRY_POINT SmmCoreEntry;\r | |
| 529a5a86 | 249 | \r |
| 053e878b | 250 | EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;\r |
| 51dd408a | 251 | \r |
| 053e878b MK |
252 | PROCEDURE_WRAPPER *ApWrapperFunc;\r |
| 253 | LIST_ENTRY TokenList;\r | |
| 254 | LIST_ENTRY *FirstFreeToken;\r | |
| 529a5a86 MK |
255 | } SMM_CPU_PRIVATE_DATA;\r |
| 256 | \r | |
| 257 | extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;\r | |
| 053e878b MK |
258 | extern CPU_HOT_PLUG_DATA mCpuHotPlugData;\r |
| 259 | extern UINTN mMaxNumberOfCpus;\r | |
| 260 | extern UINTN mNumberOfCpus;\r | |
| 261 | extern EFI_SMM_CPU_PROTOCOL mSmmCpu;\r | |
| 262 | extern EFI_MM_MP_PROTOCOL mSmmMp;\r | |
| 7b475490 | 263 | extern BOOLEAN m5LevelPagingNeeded;\r |
| 529a5a86 MK |
264 | \r |
| 265 | ///\r | |
| 266 | /// The mode of the CPU at the time an SMI occurs\r | |
| 267 | ///\r | |
| 268 | extern UINT8 mSmmSaveStateRegisterLma;\r | |
| 269 | \r | |
| b822be1a | 270 | #define PAGE_TABLE_POOL_ALIGNMENT BASE_128KB\r |
| 271 | #define PAGE_TABLE_POOL_UNIT_SIZE BASE_128KB\r | |
| 272 | #define PAGE_TABLE_POOL_UNIT_PAGES EFI_SIZE_TO_PAGES (PAGE_TABLE_POOL_UNIT_SIZE)\r | |
| 273 | #define PAGE_TABLE_POOL_ALIGN_MASK \\r | |
| 274 | (~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))\r | |
| 275 | \r | |
| 276 | typedef struct {\r | |
| 277 | VOID *NextPool;\r | |
| 278 | UINTN Offset;\r | |
| 279 | UINTN FreePages;\r | |
| 280 | } PAGE_TABLE_POOL;\r | |
| 281 | \r | |
| 282 | /**\r | |
| 283 | Disable CET.\r | |
| 284 | **/\r | |
| 285 | VOID\r | |
| 286 | EFIAPI\r | |
| 287 | DisableCet (\r | |
| 288 | VOID\r | |
| 289 | );\r | |
| 290 | \r | |
| 291 | /**\r | |
| 292 | Enable CET.\r | |
| 293 | **/\r | |
| 294 | VOID\r | |
| 295 | EFIAPI\r | |
| 296 | EnableCet (\r | |
| 297 | VOID\r | |
| 298 | );\r | |
| 299 | \r | |
| 529a5a86 MK |
300 | //\r |
| 301 | // SMM CPU Protocol function prototypes.\r | |
| 302 | //\r | |
| 303 | \r | |
| 304 | /**\r | |
| 305 | Read information from the CPU save state.\r | |
| 306 | \r | |
| 307 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
| 308 | @param Width The number of bytes to read from the CPU save state.\r | |
| 309 | @param Register Specifies the CPU register to read form the save state.\r | |
| 310 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
| 311 | @param Buffer Upon return, this holds the CPU register value read from the save state.\r | |
| 312 | \r | |
| 313 | @retval EFI_SUCCESS The register was read from Save State\r | |
| 314 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
| ef62da4f | 315 | @retval EFI_INVALID_PARAMETER This or Buffer is NULL.\r |
| 529a5a86 MK |
316 | \r |
| 317 | **/\r | |
| 318 | EFI_STATUS\r | |
| 319 | EFIAPI\r | |
| 320 | SmmReadSaveState (\r | |
| 053e878b MK |
321 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r |
| 322 | IN UINTN Width,\r | |
| 323 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 324 | IN UINTN CpuIndex,\r | |
| 325 | OUT VOID *Buffer\r | |
| 529a5a86 MK |
326 | );\r |
| 327 | \r | |
| 328 | /**\r | |
| 329 | Write data to the CPU save state.\r | |
| 330 | \r | |
| 331 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
| 332 | @param Width The number of bytes to read from the CPU save state.\r | |
| 333 | @param Register Specifies the CPU register to write to the save state.\r | |
| 334 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
| 335 | @param Buffer Upon entry, this holds the new CPU register value.\r | |
| 336 | \r | |
| 337 | @retval EFI_SUCCESS The register was written from Save State\r | |
| 338 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
| ef62da4f | 339 | @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct\r |
| 529a5a86 MK |
340 | \r |
| 341 | **/\r | |
| 342 | EFI_STATUS\r | |
| 343 | EFIAPI\r | |
| 344 | SmmWriteSaveState (\r | |
| 053e878b MK |
345 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r |
| 346 | IN UINTN Width,\r | |
| 347 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 348 | IN UINTN CpuIndex,\r | |
| 349 | IN CONST VOID *Buffer\r | |
| 529a5a86 MK |
350 | );\r |
| 351 | \r | |
| ec07fd0e WJ |
352 | /**\r |
| 353 | C function for SMI handler. To change all processor's SMMBase Register.\r | |
| 354 | \r | |
| 355 | **/\r | |
| 356 | VOID\r | |
| 357 | EFIAPI\r | |
| 358 | SmmInitHandler (\r | |
| 359 | VOID\r | |
| 360 | );\r | |
| 361 | \r | |
| 362 | /**\r | |
| 363 | Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execute first SMI init.\r | |
| 364 | \r | |
| 365 | **/\r | |
| 366 | VOID\r | |
| 367 | ExecuteFirstSmiInit (\r | |
| 368 | VOID\r | |
| 369 | );\r | |
| 370 | \r | |
| 529a5a86 MK |
371 | /**\r |
| 372 | Read a CPU Save State register on the target processor.\r | |
| 373 | \r | |
| 374 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
| 375 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
| 376 | \r | |
| 377 | This function supports reading a CPU Save State register in SMBase relocation handler.\r | |
| 378 | \r | |
| 379 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
| 380 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
| 381 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
| 382 | @param[out] Buffer Upon return, this holds the CPU register value read from the save state.\r | |
| 383 | \r | |
| 384 | @retval EFI_SUCCESS The register was read from Save State.\r | |
| 385 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
| a7d8e28b | 386 | @retval EFI_INVALID_PARAMETER Buffer is NULL, or Width does not meet requirement per Register type.\r |
| 529a5a86 MK |
387 | \r |
| 388 | **/\r | |
| 389 | EFI_STATUS\r | |
| 390 | EFIAPI\r | |
| 391 | ReadSaveStateRegister (\r | |
| 392 | IN UINTN CpuIndex,\r | |
| 393 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 394 | IN UINTN Width,\r | |
| 395 | OUT VOID *Buffer\r | |
| 396 | );\r | |
| 397 | \r | |
| 398 | /**\r | |
| 399 | Write value to a CPU Save State register on the target processor.\r | |
| 400 | \r | |
| 401 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
| 402 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
| 403 | \r | |
| 404 | This function supports writing a CPU Save State register in SMBase relocation handler.\r | |
| 405 | \r | |
| 406 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
| 407 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
| 408 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
| 409 | @param[in] Buffer Upon entry, this holds the new CPU register value.\r | |
| 410 | \r | |
| 411 | @retval EFI_SUCCESS The register was written to Save State.\r | |
| 412 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
| ef62da4f | 413 | @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.\r |
| 529a5a86 MK |
414 | \r |
| 415 | **/\r | |
| 416 | EFI_STATUS\r | |
| 417 | EFIAPI\r | |
| 418 | WriteSaveStateRegister (\r | |
| 419 | IN UINTN CpuIndex,\r | |
| 420 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 421 | IN UINTN Width,\r | |
| 422 | IN CONST VOID *Buffer\r | |
| 423 | );\r | |
| 424 | \r | |
| ec07fd0e WJ |
425 | extern BOOLEAN mSmmRelocated;\r |
| 426 | extern volatile BOOLEAN *mSmmInitialized;\r | |
| 427 | extern UINT32 mBspApicId;\r | |
| 428 | \r | |
| 053e878b MK |
429 | extern CONST UINT8 gcSmmInitTemplate[];\r |
| 430 | extern CONST UINT16 gcSmmInitSize;\r | |
| 431 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;\r | |
| 432 | extern UINT32 mSmmCr0;\r | |
| 433 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;\r | |
| 434 | extern UINT32 mSmmCr4;\r | |
| 435 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;\r | |
| 436 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;\r | |
| 437 | X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;\r | |
| 438 | extern BOOLEAN mCetSupported;\r | |
| 529a5a86 MK |
439 | \r |
| 440 | /**\r | |
| 441 | Semaphore operation for all processor relocate SMMBase.\r | |
| 442 | **/\r | |
| 443 | VOID\r | |
| 444 | EFIAPI\r | |
| 445 | SmmRelocationSemaphoreComplete (\r | |
| 446 | VOID\r | |
| 447 | );\r | |
| 448 | \r | |
| 449 | ///\r | |
| 450 | /// The type of SMM CPU Information\r | |
| 451 | ///\r | |
| 452 | typedef struct {\r | |
| 053e878b MK |
453 | SPIN_LOCK *Busy;\r |
| 454 | volatile EFI_AP_PROCEDURE2 Procedure;\r | |
| 455 | volatile VOID *Parameter;\r | |
| 456 | volatile UINT32 *Run;\r | |
| 457 | volatile BOOLEAN *Present;\r | |
| 458 | PROCEDURE_TOKEN *Token;\r | |
| 459 | EFI_STATUS *Status;\r | |
| 529a5a86 MK |
460 | } SMM_CPU_DATA_BLOCK;\r |
| 461 | \r | |
| 462 | typedef enum {\r | |
| 463 | SmmCpuSyncModeTradition,\r | |
| 464 | SmmCpuSyncModeRelaxedAp,\r | |
| 465 | SmmCpuSyncModeMax\r | |
| 466 | } SMM_CPU_SYNC_MODE;\r | |
| 467 | \r | |
| 468 | typedef struct {\r | |
| 469 | //\r | |
| 470 | // Pointer to an array. The array should be located immediately after this structure\r | |
| 471 | // so that UC cache-ability can be set together.\r | |
| 472 | //\r | |
| 473 | SMM_CPU_DATA_BLOCK *CpuData;\r | |
| fe3a75bc | 474 | volatile UINT32 *Counter;\r |
| 529a5a86 | 475 | volatile UINT32 BspIndex;\r |
| fe3a75bc JF |
476 | volatile BOOLEAN *InsideSmm;\r |
| 477 | volatile BOOLEAN *AllCpusInSync;\r | |
| 529a5a86 MK |
478 | volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;\r |
| 479 | volatile BOOLEAN SwitchBsp;\r | |
| 480 | volatile BOOLEAN *CandidateBsp;\r | |
| 4a68176c | 481 | volatile BOOLEAN AllApArrivedWithException;\r |
| 51dd408a ED |
482 | EFI_AP_PROCEDURE StartupProcedure;\r |
| 483 | VOID *StartupProcArgs;\r | |
| 529a5a86 MK |
484 | } SMM_DISPATCHER_MP_SYNC_DATA;\r |
| 485 | \r | |
| 053e878b | 486 | #define SMM_PSD_OFFSET 0xfb00\r |
| 529a5a86 | 487 | \r |
| 1d648531 JF |
488 | ///\r |
| 489 | /// All global semaphores' pointer\r | |
| 490 | ///\r | |
| 491 | typedef struct {\r | |
| 053e878b MK |
492 | volatile UINT32 *Counter;\r |
| 493 | volatile BOOLEAN *InsideSmm;\r | |
| 494 | volatile BOOLEAN *AllCpusInSync;\r | |
| 495 | SPIN_LOCK *PFLock;\r | |
| 496 | SPIN_LOCK *CodeAccessCheckLock;\r | |
| 1d648531 JF |
497 | } SMM_CPU_SEMAPHORE_GLOBAL;\r |
| 498 | \r | |
| 4e920581 JF |
499 | ///\r |
| 500 | /// All semaphores for each processor\r | |
| 501 | ///\r | |
| 502 | typedef struct {\r | |
| 053e878b MK |
503 | SPIN_LOCK *Busy;\r |
| 504 | volatile UINT32 *Run;\r | |
| 505 | volatile BOOLEAN *Present;\r | |
| 506 | SPIN_LOCK *Token;\r | |
| 4e920581 JF |
507 | } SMM_CPU_SEMAPHORE_CPU;\r |
| 508 | \r | |
| 1d648531 JF |
509 | ///\r |
| 510 | /// All semaphores' information\r | |
| 511 | ///\r | |
| 512 | typedef struct {\r | |
| 053e878b MK |
513 | SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;\r |
| 514 | SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;\r | |
| 1d648531 JF |
515 | } SMM_CPU_SEMAPHORES;\r |
| 516 | \r | |
| 053e878b MK |
517 | extern IA32_DESCRIPTOR gcSmiGdtr;\r |
| 518 | extern EFI_PHYSICAL_ADDRESS mGdtBuffer;\r | |
| 519 | extern UINTN mGdtBufferSize;\r | |
| 520 | extern IA32_DESCRIPTOR gcSmiIdtr;\r | |
| 521 | extern VOID *gcSmiIdtrPtr;\r | |
| 522 | extern UINT64 gPhyMask;\r | |
| 523 | extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;\r | |
| 524 | extern UINTN mSmmStackArrayBase;\r | |
| 525 | extern UINTN mSmmStackArrayEnd;\r | |
| 526 | extern UINTN mSmmStackSize;\r | |
| 527 | extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;\r | |
| 528 | extern IA32_DESCRIPTOR gcSmiInitGdtr;\r | |
| 529 | extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;\r | |
| 530 | extern UINTN mSemaphoreSize;\r | |
| 531 | extern SPIN_LOCK *mPFLock;\r | |
| 532 | extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;\r | |
| 533 | extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;\r | |
| 534 | extern UINTN mSmmCpuSmramRangeCount;\r | |
| 535 | extern UINT8 mPhysicalAddressBits;\r | |
| 529a5a86 | 536 | \r |
| 241f9149 LD |
537 | //\r |
| 538 | // Copy of the PcdPteMemoryEncryptionAddressOrMask\r | |
| 539 | //\r | |
| 540 | extern UINT64 mAddressEncMask;\r | |
| 541 | \r | |
| 529a5a86 MK |
542 | /**\r |
| 543 | Create 4G PageTable in SMRAM.\r | |
| 544 | \r | |
| 717fb604 | 545 | @param[in] Is32BitPageTable Whether the page table is 32-bit PAE\r |
| 529a5a86 MK |
546 | @return PageTable Address\r |
| 547 | \r | |
| 548 | **/\r | |
| 549 | UINT32\r | |
| 550 | Gen4GPageTable (\r | |
| 053e878b | 551 | IN BOOLEAN Is32BitPageTable\r |
| 529a5a86 MK |
552 | );\r |
| 553 | \r | |
| 529a5a86 MK |
554 | /**\r |
| 555 | Initialize global data for MP synchronization.\r | |
| 556 | \r | |
| 3eb69b08 JY |
557 | @param Stacks Base address of SMI stack buffer for all processors.\r |
| 558 | @param StackSize Stack size for each processor in SMM.\r | |
| 559 | @param ShadowStackSize Shadow Stack size for each processor in SMM.\r | |
| 529a5a86 MK |
560 | \r |
| 561 | **/\r | |
| 562 | UINT32\r | |
| 563 | InitializeMpServiceData (\r | |
| 053e878b MK |
564 | IN VOID *Stacks,\r |
| 565 | IN UINTN StackSize,\r | |
| 566 | IN UINTN ShadowStackSize\r | |
| 529a5a86 MK |
567 | );\r |
| 568 | \r | |
| 569 | /**\r | |
| 570 | Initialize Timer for SMM AP Sync.\r | |
| 571 | \r | |
| 572 | **/\r | |
| 573 | VOID\r | |
| 574 | InitializeSmmTimer (\r | |
| 575 | VOID\r | |
| 576 | );\r | |
| 577 | \r | |
| 578 | /**\r | |
| 579 | Start Timer for SMM AP Sync.\r | |
| 580 | \r | |
| 581 | **/\r | |
| 582 | UINT64\r | |
| 583 | EFIAPI\r | |
| 584 | StartSyncTimer (\r | |
| 585 | VOID\r | |
| 586 | );\r | |
| 587 | \r | |
| 588 | /**\r | |
| 589 | Check if the SMM AP Sync timer is timeout.\r | |
| 590 | \r | |
| 591 | @param Timer The start timer from the begin.\r | |
| 592 | \r | |
| 593 | **/\r | |
| 594 | BOOLEAN\r | |
| 595 | EFIAPI\r | |
| 596 | IsSyncTimerTimeout (\r | |
| 053e878b | 597 | IN UINT64 Timer\r |
| 529a5a86 MK |
598 | );\r |
| 599 | \r | |
| 600 | /**\r | |
| 601 | Initialize IDT for SMM Stack Guard.\r | |
| 602 | \r | |
| 603 | **/\r | |
| 604 | VOID\r | |
| 605 | EFIAPI\r | |
| 606 | InitializeIDTSmmStackGuard (\r | |
| 607 | VOID\r | |
| 608 | );\r | |
| 609 | \r | |
| 455b0347 S |
610 | /**\r |
| 611 | Initialize IDT IST Field.\r | |
| 612 | \r | |
| 613 | @param[in] ExceptionType Exception type.\r | |
| 614 | @param[in] Ist IST value.\r | |
| 615 | \r | |
| 616 | **/\r | |
| 617 | VOID\r | |
| 618 | EFIAPI\r | |
| 619 | InitializeIdtIst (\r | |
| 053e878b MK |
620 | IN EFI_EXCEPTION_TYPE ExceptionType,\r |
| 621 | IN UINT8 Ist\r | |
| 455b0347 S |
622 | );\r |
| 623 | \r | |
| fe5f1949 JY |
624 | /**\r |
| 625 | Initialize Gdt for all processors.\r | |
| 717fb604 | 626 | \r |
| fe5f1949 JY |
627 | @param[in] Cr3 CR3 value.\r |
| 628 | @param[out] GdtStepSize The step size for GDT table.\r | |
| 629 | \r | |
| 630 | @return GdtBase for processor 0.\r | |
| 631 | GdtBase for processor X is: GdtBase + (GdtStepSize * X)\r | |
| 632 | **/\r | |
| 633 | VOID *\r | |
| 634 | InitGdt (\r | |
| 635 | IN UINTN Cr3,\r | |
| 636 | OUT UINTN *GdtStepSize\r | |
| 637 | );\r | |
| 638 | \r | |
| 529a5a86 MK |
639 | /**\r |
| 640 | \r | |
| 641 | Register the SMM Foundation entry point.\r | |
| 642 | \r | |
| 643 | @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance\r | |
| 644 | @param SmmEntryPoint SMM Foundation EntryPoint\r | |
| 645 | \r | |
| 646 | @retval EFI_SUCCESS Successfully to register SMM foundation entry point\r | |
| 647 | \r | |
| 648 | **/\r | |
| 649 | EFI_STATUS\r | |
| 650 | EFIAPI\r | |
| 651 | RegisterSmmEntry (\r | |
| 652 | IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,\r | |
| 653 | IN EFI_SMM_ENTRY_POINT SmmEntryPoint\r | |
| 654 | );\r | |
| 655 | \r | |
| 656 | /**\r | |
| 657 | Create PageTable for SMM use.\r | |
| 658 | \r | |
| 659 | @return PageTable Address\r | |
| 660 | \r | |
| 661 | **/\r | |
| 662 | UINT32\r | |
| 663 | SmmInitPageTable (\r | |
| 664 | VOID\r | |
| 665 | );\r | |
| 666 | \r | |
| 667 | /**\r | |
| 668 | Schedule a procedure to run on the specified CPU.\r | |
| 669 | \r | |
| 670 | @param Procedure The address of the procedure to run\r | |
| 671 | @param CpuIndex Target CPU number\r | |
| 672 | @param ProcArguments The parameter to pass to the procedure\r | |
| 673 | \r | |
| 674 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
| 675 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
| 676 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
| 677 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
| 678 | @retval EFI_SUCCESS - The procedure has been successfully scheduled\r | |
| 679 | \r | |
| 680 | **/\r | |
| 681 | EFI_STATUS\r | |
| 682 | EFIAPI\r | |
| 683 | SmmStartupThisAp (\r | |
| 053e878b MK |
684 | IN EFI_AP_PROCEDURE Procedure,\r |
| 685 | IN UINTN CpuIndex,\r | |
| 686 | IN OUT VOID *ProcArguments OPTIONAL\r | |
| 529a5a86 MK |
687 | );\r |
| 688 | \r | |
| 689 | /**\r | |
| 690 | Schedule a procedure to run on the specified CPU in a blocking fashion.\r | |
| 691 | \r | |
| 692 | @param Procedure The address of the procedure to run\r | |
| 693 | @param CpuIndex Target CPU Index\r | |
| 694 | @param ProcArguments The parameter to pass to the procedure\r | |
| 695 | \r | |
| 696 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
| 697 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
| 698 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
| 699 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
| 700 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
| 701 | \r | |
| 702 | **/\r | |
| 703 | EFI_STATUS\r | |
| 704 | EFIAPI\r | |
| 705 | SmmBlockingStartupThisAp (\r | |
| 053e878b MK |
706 | IN EFI_AP_PROCEDURE Procedure,\r |
| 707 | IN UINTN CpuIndex,\r | |
| 708 | IN OUT VOID *ProcArguments OPTIONAL\r | |
| 529a5a86 MK |
709 | );\r |
| 710 | \r | |
| e4435f71 JY |
711 | /**\r |
| 712 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
| 713 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 714 | \r | |
| 715 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 716 | @param[in] Length The size in bytes of the memory region.\r | |
| 717 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
| 718 | \r | |
| 719 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
| 720 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 721 | BaseAddress and Length cannot be modified.\r | |
| 722 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 723 | Attributes specified an illegal combination of attributes that\r | |
| 724 | cannot be set together.\r | |
| 725 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 726 | the memory resource range.\r | |
| 727 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 728 | resource range specified by BaseAddress and Length.\r | |
| 729 | The bit mask of attributes is not support for the memory resource\r | |
| 730 | range specified by BaseAddress and Length.\r | |
| 731 | \r | |
| 732 | **/\r | |
| 733 | EFI_STATUS\r | |
| e4435f71 | 734 | SmmSetMemoryAttributes (\r |
| 053e878b MK |
735 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
| 736 | IN UINT64 Length,\r | |
| 737 | IN UINT64 Attributes\r | |
| e4435f71 JY |
738 | );\r |
| 739 | \r | |
| 740 | /**\r | |
| 741 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
| 742 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 743 | \r | |
| 744 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 745 | @param[in] Length The size in bytes of the memory region.\r | |
| 746 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
| 747 | \r | |
| 748 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
| 749 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 750 | BaseAddress and Length cannot be modified.\r | |
| 751 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 752 | Attributes specified an illegal combination of attributes that\r | |
| 753 | cannot be set together.\r | |
| 754 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 755 | the memory resource range.\r | |
| 756 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 757 | resource range specified by BaseAddress and Length.\r | |
| 758 | The bit mask of attributes is not support for the memory resource\r | |
| 759 | range specified by BaseAddress and Length.\r | |
| 760 | \r | |
| 761 | **/\r | |
| 762 | EFI_STATUS\r | |
| e4435f71 | 763 | SmmClearMemoryAttributes (\r |
| 053e878b MK |
764 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
| 765 | IN UINT64 Length,\r | |
| 766 | IN UINT64 Attributes\r | |
| e4435f71 JY |
767 | );\r |
| 768 | \r | |
| 529a5a86 MK |
769 | /**\r |
| 770 | Initialize MP synchronization data.\r | |
| 771 | \r | |
| 772 | **/\r | |
| 773 | VOID\r | |
| 774 | EFIAPI\r | |
| 775 | InitializeMpSyncData (\r | |
| 776 | VOID\r | |
| 777 | );\r | |
| 778 | \r | |
| 779 | /**\r | |
| 780 | \r | |
| 781 | Find out SMRAM information including SMRR base and SMRR size.\r | |
| 782 | \r | |
| 783 | @param SmrrBase SMRR base\r | |
| 784 | @param SmrrSize SMRR size\r | |
| 785 | \r | |
| 786 | **/\r | |
| 787 | VOID\r | |
| 788 | FindSmramInfo (\r | |
| 053e878b MK |
789 | OUT UINT32 *SmrrBase,\r |
| 790 | OUT UINT32 *SmrrSize\r | |
| 529a5a86 MK |
791 | );\r |
| 792 | \r | |
| 793 | /**\r | |
| 0bdc9e75 | 794 | Relocate SmmBases for each processor.\r |
| 529a5a86 | 795 | \r |
| 0bdc9e75 | 796 | Execute on first boot and all S3 resumes\r |
| 529a5a86 MK |
797 | \r |
| 798 | **/\r | |
| 799 | VOID\r | |
| 0bdc9e75 SZ |
800 | EFIAPI\r |
| 801 | SmmRelocateBases (\r | |
| 529a5a86 MK |
802 | VOID\r |
| 803 | );\r | |
| 804 | \r | |
| 805 | /**\r | |
| 806 | Page Fault handler for SMM use.\r | |
| 807 | \r | |
| 808 | @param InterruptType Defines the type of interrupt or exception that\r | |
| 809 | occurred on the processor.This parameter is processor architecture specific.\r | |
| 810 | @param SystemContext A pointer to the processor context when\r | |
| 811 | the interrupt occurred on the processor.\r | |
| 812 | **/\r | |
| 813 | VOID\r | |
| 814 | EFIAPI\r | |
| 815 | SmiPFHandler (\r | |
| 053e878b MK |
816 | IN EFI_EXCEPTION_TYPE InterruptType,\r |
| 817 | IN EFI_SYSTEM_CONTEXT SystemContext\r | |
| 529a5a86 MK |
818 | );\r |
| 819 | \r | |
| 820 | /**\r | |
| 821 | Perform the remaining tasks.\r | |
| 822 | \r | |
| 823 | **/\r | |
| 824 | VOID\r | |
| 825 | PerformRemainingTasks (\r | |
| 826 | VOID\r | |
| 827 | );\r | |
| 828 | \r | |
| 9f419739 JY |
829 | /**\r |
| 830 | Perform the pre tasks.\r | |
| 831 | \r | |
| 832 | **/\r | |
| 833 | VOID\r | |
| 834 | PerformPreTasks (\r | |
| 835 | VOID\r | |
| 836 | );\r | |
| 837 | \r | |
| 529a5a86 MK |
838 | /**\r |
| 839 | Initialize MSR spin lock by MSR index.\r | |
| 840 | \r | |
| 841 | @param MsrIndex MSR index value.\r | |
| 842 | \r | |
| 843 | **/\r | |
| 844 | VOID\r | |
| 845 | InitMsrSpinLockByIndex (\r | |
| 053e878b | 846 | IN UINT32 MsrIndex\r |
| 529a5a86 MK |
847 | );\r |
| 848 | \r | |
| 849 | /**\r | |
| 850 | Hook return address of SMM Save State so that semaphore code\r | |
| 851 | can be executed immediately after AP exits SMM to indicate to\r | |
| 852 | the BSP that an AP has exited SMM after SMBASE relocation.\r | |
| 853 | \r | |
| 854 | @param[in] CpuIndex The processor index.\r | |
| 855 | @param[in] RebasedFlag A pointer to a flag that is set to TRUE\r | |
| 856 | immediately after AP exits SMM.\r | |
| 857 | \r | |
| 858 | **/\r | |
| 859 | VOID\r | |
| 860 | SemaphoreHook (\r | |
| 861 | IN UINTN CpuIndex,\r | |
| 862 | IN volatile BOOLEAN *RebasedFlag\r | |
| 863 | );\r | |
| 864 | \r | |
| 865 | /**\r | |
| 866 | Configure SMM Code Access Check feature for all processors.\r | |
| 867 | SMM Feature Control MSR will be locked after configuration.\r | |
| 868 | **/\r | |
| 869 | VOID\r | |
| 870 | ConfigSmmCodeAccessCheck (\r | |
| 871 | VOID\r | |
| 872 | );\r | |
| 873 | \r | |
| 874 | /**\r | |
| 875 | Hook the code executed immediately after an RSM instruction on the currently\r | |
| 876 | executing CPU. The mode of code executed immediately after RSM must be\r | |
| 877 | detected, and the appropriate hook must be selected. Always clear the auto\r | |
| 878 | HALT restart flag if it is set.\r | |
| 879 | \r | |
| 880 | @param[in] CpuIndex The processor index for the currently\r | |
| 881 | executing CPU.\r | |
| 882 | @param[in] CpuState Pointer to SMRAM Save State Map for the\r | |
| 883 | currently executing CPU.\r | |
| 884 | @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to\r | |
| 885 | 32-bit mode from 64-bit SMM.\r | |
| 886 | @param[in] NewInstructionPointer Instruction pointer to use if resuming to\r | |
| 887 | same mode as SMM.\r | |
| 888 | \r | |
| 889 | @retval The value of the original instruction pointer before it was hooked.\r | |
| 890 | \r | |
| 891 | **/\r | |
| 892 | UINT64\r | |
| 893 | EFIAPI\r | |
| 894 | HookReturnFromSmm (\r | |
| 895 | IN UINTN CpuIndex,\r | |
| 896 | SMRAM_SAVE_STATE_MAP *CpuState,\r | |
| 897 | UINT64 NewInstructionPointer32,\r | |
| 898 | UINT64 NewInstructionPointer\r | |
| 899 | );\r | |
| 900 | \r | |
| 901 | /**\r | |
| 902 | Get the size of the SMI Handler in bytes.\r | |
| 903 | \r | |
| 904 | @retval The size, in bytes, of the SMI Handler.\r | |
| 905 | \r | |
| 906 | **/\r | |
| 907 | UINTN\r | |
| 908 | EFIAPI\r | |
| 909 | GetSmiHandlerSize (\r | |
| 910 | VOID\r | |
| 911 | );\r | |
| 912 | \r | |
| 913 | /**\r | |
| 914 | Install the SMI handler for the CPU specified by CpuIndex. This function\r | |
| 915 | is called by the CPU that was elected as monarch during System Management\r | |
| 916 | Mode initialization.\r | |
| 917 | \r | |
| 918 | @param[in] CpuIndex The index of the CPU to install the custom SMI handler.\r | |
| 919 | The value must be between 0 and the NumberOfCpus field\r | |
| 920 | in the System Management System Table (SMST).\r | |
| 921 | @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.\r | |
| 922 | @param[in] SmiStack The stack to use when an SMI is processed by the\r | |
| 923 | the CPU specified by CpuIndex.\r | |
| 924 | @param[in] StackSize The size, in bytes, if the stack used when an SMI is\r | |
| 925 | processed by the CPU specified by CpuIndex.\r | |
| 926 | @param[in] GdtBase The base address of the GDT to use when an SMI is\r | |
| 927 | processed by the CPU specified by CpuIndex.\r | |
| 928 | @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is\r | |
| 929 | processed by the CPU specified by CpuIndex.\r | |
| 930 | @param[in] IdtBase The base address of the IDT to use when an SMI is\r | |
| 931 | processed by the CPU specified by CpuIndex.\r | |
| 932 | @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is\r | |
| 933 | processed by the CPU specified by CpuIndex.\r | |
| 934 | @param[in] Cr3 The base address of the page tables to use when an SMI\r | |
| 935 | is processed by the CPU specified by CpuIndex.\r | |
| 936 | **/\r | |
| 937 | VOID\r | |
| 938 | EFIAPI\r | |
| 939 | InstallSmiHandler (\r | |
| 940 | IN UINTN CpuIndex,\r | |
| 941 | IN UINT32 SmBase,\r | |
| 942 | IN VOID *SmiStack,\r | |
| 943 | IN UINTN StackSize,\r | |
| 944 | IN UINTN GdtBase,\r | |
| 945 | IN UINTN GdtSize,\r | |
| 946 | IN UINTN IdtBase,\r | |
| 947 | IN UINTN IdtSize,\r | |
| 948 | IN UINT32 Cr3\r | |
| 949 | );\r | |
| 950 | \r | |
| 951 | /**\r | |
| 952 | Search module name by input IP address and output it.\r | |
| 953 | \r | |
| 954 | @param CallerIpAddress Caller instruction pointer.\r | |
| 955 | \r | |
| 956 | **/\r | |
| 957 | VOID\r | |
| 958 | DumpModuleInfoByIp (\r | |
| 053e878b | 959 | IN UINTN CallerIpAddress\r |
| 529a5a86 | 960 | );\r |
| 21c17193 | 961 | \r |
| 717fb604 JY |
962 | /**\r |
| 963 | This function sets memory attribute according to MemoryAttributesTable.\r | |
| 964 | **/\r | |
| 965 | VOID\r | |
| 966 | SetMemMapAttributes (\r | |
| 967 | VOID\r | |
| 968 | );\r | |
| 969 | \r | |
| d2fc7711 JY |
970 | /**\r |
| 971 | This function sets UEFI memory attribute according to UEFI memory map.\r | |
| 972 | **/\r | |
| 973 | VOID\r | |
| 974 | SetUefiMemMapAttributes (\r | |
| 975 | VOID\r | |
| 976 | );\r | |
| 977 | \r | |
| 978 | /**\r | |
| 979 | Return if the Address is forbidden as SMM communication buffer.\r | |
| 980 | \r | |
| 981 | @param[in] Address the address to be checked\r | |
| 982 | \r | |
| 983 | @return TRUE The address is forbidden as SMM communication buffer.\r | |
| 984 | @return FALSE The address is allowed as SMM communication buffer.\r | |
| 985 | **/\r | |
| 986 | BOOLEAN\r | |
| 987 | IsSmmCommBufferForbiddenAddress (\r | |
| 988 | IN UINT64 Address\r | |
| 989 | );\r | |
| 990 | \r | |
| 991 | /**\r | |
| 992 | This function caches the UEFI memory map information.\r | |
| 993 | **/\r | |
| 994 | VOID\r | |
| 995 | GetUefiMemoryMap (\r | |
| 996 | VOID\r | |
| 997 | );\r | |
| 998 | \r | |
| 717fb604 JY |
999 | /**\r |
| 1000 | This function sets memory attribute for page table.\r | |
| 1001 | **/\r | |
| 1002 | VOID\r | |
| 1003 | SetPageTableAttributes (\r | |
| 1004 | VOID\r | |
| 1005 | );\r | |
| 1006 | \r | |
| 717fb604 JY |
1007 | /**\r |
| 1008 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
| 1009 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 1010 | \r | |
| 7b475490 DT |
1011 | @param[in] PageTableBase The page table base.\r |
| 1012 | @param[in] EnablePML5Paging If PML5 paging is enabled.\r | |
| 717fb604 JY |
1013 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r |
| 1014 | @param[in] Length The size in bytes of the memory region.\r | |
| 1015 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
| 1016 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
| 1017 | \r | |
| 1018 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
| 1019 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 1020 | BaseAddress and Length cannot be modified.\r | |
| 1021 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 1022 | Attributes specified an illegal combination of attributes that\r | |
| 1023 | cannot be set together.\r | |
| 1024 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 1025 | the memory resource range.\r | |
| 1026 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 1027 | resource range specified by BaseAddress and Length.\r | |
| 1028 | The bit mask of attributes is not support for the memory resource\r | |
| 1029 | range specified by BaseAddress and Length.\r | |
| 1030 | \r | |
| 1031 | **/\r | |
| 1032 | EFI_STATUS\r | |
| 717fb604 | 1033 | SmmSetMemoryAttributesEx (\r |
| 7b475490 DT |
1034 | IN UINTN PageTableBase,\r |
| 1035 | IN BOOLEAN EnablePML5Paging,\r | |
| 053e878b MK |
1036 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
| 1037 | IN UINT64 Length,\r | |
| 1038 | IN UINT64 Attributes,\r | |
| 1039 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
| 717fb604 JY |
1040 | );\r |
| 1041 | \r | |
| 1042 | /**\r | |
| 1043 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
| 1044 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 1045 | \r | |
| 7b475490 DT |
1046 | @param[in] PageTableBase The page table base.\r |
| 1047 | @param[in] EnablePML5Paging If PML5 paging is enabled.\r | |
| 717fb604 JY |
1048 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r |
| 1049 | @param[in] Length The size in bytes of the memory region.\r | |
| 1050 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
| 1051 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
| 1052 | \r | |
| 1053 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
| 1054 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 1055 | BaseAddress and Length cannot be modified.\r | |
| 1056 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 1057 | Attributes specified an illegal combination of attributes that\r | |
| 1058 | cannot be set together.\r | |
| 1059 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 1060 | the memory resource range.\r | |
| 1061 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 1062 | resource range specified by BaseAddress and Length.\r | |
| 1063 | The bit mask of attributes is not support for the memory resource\r | |
| 1064 | range specified by BaseAddress and Length.\r | |
| 1065 | \r | |
| 1066 | **/\r | |
| 1067 | EFI_STATUS\r | |
| 717fb604 | 1068 | SmmClearMemoryAttributesEx (\r |
| 7b475490 DT |
1069 | IN UINTN PageTableBase,\r |
| 1070 | IN BOOLEAN EnablePML5Paging,\r | |
| 053e878b MK |
1071 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
| 1072 | IN UINT64 Length,\r | |
| 1073 | IN UINT64 Attributes,\r | |
| 1074 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
| 717fb604 JY |
1075 | );\r |
| 1076 | \r | |
| 21c17193 JY |
1077 | /**\r |
| 1078 | This API provides a way to allocate memory for page table.\r | |
| 1079 | \r | |
| 1080 | This API can be called more once to allocate memory for page tables.\r | |
| 1081 | \r | |
| 1082 | Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r | |
| 1083 | allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r | |
| 1084 | is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r | |
| 1085 | returned.\r | |
| 1086 | \r | |
| 1087 | @param Pages The number of 4 KB pages to allocate.\r | |
| 1088 | \r | |
| 1089 | @return A pointer to the allocated buffer or NULL if allocation fails.\r | |
| 1090 | \r | |
| 1091 | **/\r | |
| 1092 | VOID *\r | |
| 1093 | AllocatePageTableMemory (\r | |
| 053e878b | 1094 | IN UINTN Pages\r |
| 21c17193 JY |
1095 | );\r |
| 1096 | \r | |
| 717fb604 JY |
1097 | /**\r |
| 1098 | Allocate pages for code.\r | |
| 1099 | \r | |
| 1100 | @param[in] Pages Number of pages to be allocated.\r | |
| 1101 | \r | |
| 1102 | @return Allocated memory.\r | |
| 1103 | **/\r | |
| 1104 | VOID *\r | |
| 1105 | AllocateCodePages (\r | |
| 053e878b | 1106 | IN UINTN Pages\r |
| 717fb604 JY |
1107 | );\r |
| 1108 | \r | |
| 1109 | /**\r | |
| 1110 | Allocate aligned pages for code.\r | |
| 1111 | \r | |
| 1112 | @param[in] Pages Number of pages to be allocated.\r | |
| 1113 | @param[in] Alignment The requested alignment of the allocation.\r | |
| 1114 | Must be a power of two.\r | |
| 1115 | If Alignment is zero, then byte alignment is used.\r | |
| 1116 | \r | |
| 1117 | @return Allocated memory.\r | |
| 1118 | **/\r | |
| 1119 | VOID *\r | |
| 1120 | AllocateAlignedCodePages (\r | |
| 053e878b MK |
1121 | IN UINTN Pages,\r |
| 1122 | IN UINTN Alignment\r | |
| 717fb604 JY |
1123 | );\r |
| 1124 | \r | |
| 0bdc9e75 SZ |
1125 | //\r |
| 1126 | // S3 related global variable and function prototype.\r | |
| 1127 | //\r | |
| 1128 | \r | |
| 053e878b | 1129 | extern BOOLEAN mSmmS3Flag;\r |
| 0bdc9e75 SZ |
1130 | \r |
| 1131 | /**\r | |
| 1132 | Initialize SMM S3 resume state structure used during S3 Resume.\r | |
| 1133 | \r | |
| 1134 | @param[in] Cr3 The base address of the page tables to use in SMM.\r | |
| 1135 | \r | |
| 1136 | **/\r | |
| 1137 | VOID\r | |
| 1138 | InitSmmS3ResumeState (\r | |
| 1139 | IN UINT32 Cr3\r | |
| 1140 | );\r | |
| 1141 | \r | |
| 1142 | /**\r | |
| 1143 | Get ACPI CPU data.\r | |
| 1144 | \r | |
| 1145 | **/\r | |
| 1146 | VOID\r | |
| 1147 | GetAcpiCpuData (\r | |
| 1148 | VOID\r | |
| 1149 | );\r | |
| 1150 | \r | |
| 1151 | /**\r | |
| 1152 | Restore SMM Configuration in S3 boot path.\r | |
| 1153 | \r | |
| 1154 | **/\r | |
| 1155 | VOID\r | |
| 1156 | RestoreSmmConfigurationInS3 (\r | |
| 1157 | VOID\r | |
| 1158 | );\r | |
| 1159 | \r | |
| b10d5ddc SZ |
1160 | /**\r |
| 1161 | Get ACPI S3 enable flag.\r | |
| 1162 | \r | |
| 1163 | **/\r | |
| 1164 | VOID\r | |
| 1165 | GetAcpiS3EnableFlag (\r | |
| 1166 | VOID\r | |
| 1167 | );\r | |
| 1168 | \r | |
| 4a0f88dd JF |
1169 | /**\r |
| 1170 | Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.\r | |
| 1171 | \r | |
| 672b80c8 MK |
1172 | @param[in] ApHltLoopCode The address of the safe hlt-loop function.\r |
| 1173 | @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.\r | |
| 1174 | @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.\r | |
| 4a0f88dd JF |
1175 | \r |
| 1176 | **/\r | |
| 1177 | VOID\r | |
| 1178 | TransferApToSafeState (\r | |
| 672b80c8 MK |
1179 | IN UINTN ApHltLoopCode,\r |
| 1180 | IN UINTN TopOfStack,\r | |
| 1181 | IN UINTN NumberToFinishAddress\r | |
| 4a0f88dd JF |
1182 | );\r |
| 1183 | \r | |
| 3eb69b08 JY |
1184 | /**\r |
| 1185 | Set ShadowStack memory.\r | |
| 1186 | \r | |
| 1187 | @param[in] Cr3 The page table base address.\r | |
| 1188 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 1189 | @param[in] Length The size in bytes of the memory region.\r | |
| 1190 | \r | |
| 1191 | @retval EFI_SUCCESS The shadow stack memory is set.\r | |
| 1192 | **/\r | |
| 1193 | EFI_STATUS\r | |
| 1194 | SetShadowStack (\r | |
| 053e878b MK |
1195 | IN UINTN Cr3,\r |
| 1196 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1197 | IN UINT64 Length\r | |
| 3eb69b08 JY |
1198 | );\r |
| 1199 | \r | |
| 1200 | /**\r | |
| 1201 | Set not present memory.\r | |
| 1202 | \r | |
| 1203 | @param[in] Cr3 The page table base address.\r | |
| 1204 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 1205 | @param[in] Length The size in bytes of the memory region.\r | |
| 1206 | \r | |
| 1207 | @retval EFI_SUCCESS The not present memory is set.\r | |
| 1208 | **/\r | |
| 1209 | EFI_STATUS\r | |
| 1210 | SetNotPresentPage (\r | |
| 053e878b MK |
1211 | IN UINTN Cr3,\r |
| 1212 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1213 | IN UINT64 Length\r | |
| 3eb69b08 JY |
1214 | );\r |
| 1215 | \r | |
| 1216 | /**\r | |
| 1217 | Initialize the shadow stack related data structure.\r | |
| 1218 | \r | |
| 1219 | @param CpuIndex The index of CPU.\r | |
| 1220 | @param ShadowStack The bottom of the shadow stack for this CPU.\r | |
| 1221 | **/\r | |
| 1222 | VOID\r | |
| 1223 | InitShadowStack (\r | |
| 1224 | IN UINTN CpuIndex,\r | |
| 1225 | IN VOID *ShadowStack\r | |
| 1226 | );\r | |
| 1227 | \r | |
| 827330cc JW |
1228 | /**\r |
| 1229 | This function set given attributes of the memory region specified by\r | |
| 1230 | BaseAddress and Length.\r | |
| 1231 | \r | |
| 1232 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
| 1233 | @param BaseAddress The physical address that is the start address of\r | |
| 1234 | a memory region.\r | |
| 1235 | @param Length The size in bytes of the memory region.\r | |
| 1236 | @param Attributes The bit mask of attributes to set for the memory\r | |
| 1237 | region.\r | |
| 1238 | \r | |
| 1239 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
| 1240 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 1241 | Attributes specified an illegal combination of\r | |
| 1242 | attributes that cannot be set together.\r | |
| 1243 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
| 1244 | bytes of the memory resource range specified\r | |
| 1245 | by BaseAddress and Length.\r | |
| aae02dcc | 1246 | The bit mask of attributes is not supported for\r |
| 827330cc JW |
1247 | the memory resource range specified by\r |
| 1248 | BaseAddress and Length.\r | |
| 1249 | \r | |
| 1250 | **/\r | |
| 1251 | EFI_STATUS\r | |
| 1252 | EFIAPI\r | |
| 1253 | EdkiiSmmSetMemoryAttributes (\r | |
| 053e878b MK |
1254 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r |
| 1255 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1256 | IN UINT64 Length,\r | |
| 1257 | IN UINT64 Attributes\r | |
| 827330cc JW |
1258 | );\r |
| 1259 | \r | |
| 1260 | /**\r | |
| 1261 | This function clears given attributes of the memory region specified by\r | |
| 1262 | BaseAddress and Length.\r | |
| 1263 | \r | |
| 1264 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
| 1265 | @param BaseAddress The physical address that is the start address of\r | |
| 1266 | a memory region.\r | |
| 1267 | @param Length The size in bytes of the memory region.\r | |
| aae02dcc | 1268 | @param Attributes The bit mask of attributes to clear for the memory\r |
| 827330cc JW |
1269 | region.\r |
| 1270 | \r | |
| aae02dcc | 1271 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r |
| 827330cc JW |
1272 | @retval EFI_INVALID_PARAMETER Length is zero.\r |
| 1273 | Attributes specified an illegal combination of\r | |
| aae02dcc | 1274 | attributes that cannot be cleared together.\r |
| 827330cc JW |
1275 | @retval EFI_UNSUPPORTED The processor does not support one or more\r |
| 1276 | bytes of the memory resource range specified\r | |
| 1277 | by BaseAddress and Length.\r | |
| aae02dcc | 1278 | The bit mask of attributes is not supported for\r |
| 827330cc JW |
1279 | the memory resource range specified by\r |
| 1280 | BaseAddress and Length.\r | |
| 1281 | \r | |
| 1282 | **/\r | |
| 1283 | EFI_STATUS\r | |
| 1284 | EFIAPI\r | |
| 1285 | EdkiiSmmClearMemoryAttributes (\r | |
| 053e878b MK |
1286 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r |
| 1287 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1288 | IN UINT64 Length,\r | |
| 1289 | IN UINT64 Attributes\r | |
| 827330cc JW |
1290 | );\r |
| 1291 | \r | |
| 1292 | /**\r | |
| aae02dcc | 1293 | This function retrieves the attributes of the memory region specified by\r |
| 827330cc JW |
1294 | BaseAddress and Length. If different attributes are got from different part\r |
| 1295 | of the memory region, EFI_NO_MAPPING will be returned.\r | |
| 1296 | \r | |
| 1297 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
| 1298 | @param BaseAddress The physical address that is the start address of\r | |
| 1299 | a memory region.\r | |
| 1300 | @param Length The size in bytes of the memory region.\r | |
| 1301 | @param Attributes Pointer to attributes returned.\r | |
| 1302 | \r | |
| 1303 | @retval EFI_SUCCESS The attributes got for the memory region.\r | |
| 1304 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 1305 | Attributes is NULL.\r | |
| 1306 | @retval EFI_NO_MAPPING Attributes are not consistent cross the memory\r | |
| 1307 | region.\r | |
| 1308 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
| 1309 | bytes of the memory resource range specified\r | |
| 1310 | by BaseAddress and Length.\r | |
| 827330cc JW |
1311 | \r |
| 1312 | **/\r | |
| 1313 | EFI_STATUS\r | |
| 1314 | EFIAPI\r | |
| 1315 | EdkiiSmmGetMemoryAttributes (\r | |
| 053e878b MK |
1316 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r |
| 1317 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1318 | IN UINT64 Length,\r | |
| 1319 | IN UINT64 *Attributes\r | |
| 827330cc JW |
1320 | );\r |
| 1321 | \r | |
| e21e355e LG |
1322 | /**\r |
| 1323 | This function fixes up the address of the global variable or function\r | |
| ef62da4f | 1324 | referred in SmmInit assembly files to be the absolute address.\r |
| e21e355e LG |
1325 | **/\r |
| 1326 | VOID\r | |
| 1327 | EFIAPI\r | |
| 1328 | PiSmmCpuSmmInitFixupAddress (\r | |
| 053e878b | 1329 | );\r |
| e21e355e LG |
1330 | \r |
| 1331 | /**\r | |
| 1332 | This function fixes up the address of the global variable or function\r | |
| ef62da4f | 1333 | referred in SmiEntry assembly files to be the absolute address.\r |
| e21e355e LG |
1334 | **/\r |
| 1335 | VOID\r | |
| 1336 | EFIAPI\r | |
| 1337 | PiSmmCpuSmiEntryFixupAddress (\r | |
| 053e878b | 1338 | );\r |
| e21e355e | 1339 | \r |
| 37f9fea5 VN |
1340 | /**\r |
| 1341 | This function reads CR2 register when on-demand paging is enabled\r | |
| 1342 | for 64 bit and no action for 32 bit.\r | |
| 1343 | \r | |
| 1344 | @param[out] *Cr2 Pointer to variable to hold CR2 register value.\r | |
| 1345 | **/\r | |
| 1346 | VOID\r | |
| 1347 | SaveCr2 (\r | |
| 1348 | OUT UINTN *Cr2\r | |
| 1349 | );\r | |
| 1350 | \r | |
| 1351 | /**\r | |
| 1352 | This function writes into CR2 register when on-demand paging is enabled\r | |
| 1353 | for 64 bit and no action for 32 bit.\r | |
| 1354 | \r | |
| 1355 | @param[in] Cr2 Value to write into CR2 register.\r | |
| 1356 | **/\r | |
| 1357 | VOID\r | |
| 1358 | RestoreCr2 (\r | |
| 1359 | IN UINTN Cr2\r | |
| 1360 | );\r | |
| 1361 | \r | |
| 51dd408a ED |
1362 | /**\r |
| 1363 | Schedule a procedure to run on the specified CPU.\r | |
| 1364 | \r | |
| 1365 | @param[in] Procedure The address of the procedure to run\r | |
| 1366 | @param[in] CpuIndex Target CPU Index\r | |
| 1367 | @param[in,out] ProcArguments The parameter to pass to the procedure\r | |
| 1368 | @param[in,out] Token This is an optional parameter that allows the caller to execute the\r | |
| 1369 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
| 1370 | call is blocking, and the call will not return until the AP has\r | |
| 1371 | completed the procedure. If the token is not NULL, the call will\r | |
| 1372 | return immediately. The caller can check whether the procedure has\r | |
| 1373 | completed with CheckOnProcedure or WaitForProcedure.\r | |
| 1374 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish\r | |
| 1375 | execution of Procedure, either for blocking or non-blocking mode.\r | |
| 1376 | Zero means infinity. If the timeout expires before all APs return\r | |
| 1377 | from Procedure, then Procedure on the failed APs is terminated. If\r | |
| 1378 | the timeout expires in blocking mode, the call returns EFI_TIMEOUT.\r | |
| 1379 | If the timeout expires in non-blocking mode, the timeout determined\r | |
| 1380 | can be through CheckOnProcedure or WaitForProcedure.\r | |
| 1381 | Note that timeout support is optional. Whether an implementation\r | |
| 1382 | supports this feature can be determined via the Attributes data\r | |
| 1383 | member.\r | |
| 073f2ced | 1384 | @param[in,out] CpuStatus This optional pointer may be used to get the status code returned\r |
| 51dd408a ED |
1385 | by Procedure when it completes execution on the target AP, or with\r |
| 1386 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
| 1387 | timeout. The implementation will update this variable with\r | |
| 1388 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
| 1389 | \r | |
| 1390 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
| 1391 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
| 1392 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
| 1393 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
| 1394 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
| 1395 | \r | |
| 1396 | **/\r | |
| 1397 | EFI_STATUS\r | |
| 1398 | InternalSmmStartupThisAp (\r | |
| 053e878b MK |
1399 | IN EFI_AP_PROCEDURE2 Procedure,\r |
| 1400 | IN UINTN CpuIndex,\r | |
| 1401 | IN OUT VOID *ProcArguments OPTIONAL,\r | |
| 1402 | IN OUT MM_COMPLETION *Token,\r | |
| 1403 | IN UINTN TimeoutInMicroseconds,\r | |
| 1404 | IN OUT EFI_STATUS *CpuStatus\r | |
| 51dd408a ED |
1405 | );\r |
| 1406 | \r | |
| 1407 | /**\r | |
| 1408 | Checks whether the input token is the current used token.\r | |
| 1409 | \r | |
| 1410 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
| 1411 | BroadcastProcedure.\r | |
| 1412 | \r | |
| 1413 | @retval TRUE The input token is the current used token.\r | |
| 1414 | @retval FALSE The input token is not the current used token.\r | |
| 1415 | **/\r | |
| 1416 | BOOLEAN\r | |
| 1417 | IsTokenInUse (\r | |
| 053e878b | 1418 | IN SPIN_LOCK *Token\r |
| 51dd408a ED |
1419 | );\r |
| 1420 | \r | |
| 1421 | /**\r | |
| 1422 | Checks status of specified AP.\r | |
| 1423 | \r | |
| 1424 | This function checks whether the specified AP has finished the task assigned\r | |
| 1425 | by StartupThisAP(), and whether timeout expires.\r | |
| 1426 | \r | |
| 1427 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
| 1428 | BroadcastProcedure.\r | |
| 1429 | \r | |
| 1430 | @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r | |
| 1431 | @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r | |
| 1432 | **/\r | |
| 1433 | EFI_STATUS\r | |
| 1434 | IsApReady (\r | |
| 1435 | IN SPIN_LOCK *Token\r | |
| 1436 | );\r | |
| 1437 | \r | |
| 1438 | /**\r | |
| 1439 | Check whether it is an present AP.\r | |
| 1440 | \r | |
| 1441 | @param CpuIndex The AP index which calls this function.\r | |
| 1442 | \r | |
| 1443 | @retval TRUE It's a present AP.\r | |
| 1444 | @retval TRUE This is not an AP or it is not present.\r | |
| 1445 | \r | |
| 1446 | **/\r | |
| 1447 | BOOLEAN\r | |
| 1448 | IsPresentAp (\r | |
| 053e878b | 1449 | IN UINTN CpuIndex\r |
| 51dd408a ED |
1450 | );\r |
| 1451 | \r | |
| 1452 | /**\r | |
| 1453 | Worker function to execute a caller provided function on all enabled APs.\r | |
| 1454 | \r | |
| 1455 | @param[in] Procedure A pointer to the function to be run on\r | |
| 1456 | enabled APs of the system.\r | |
| 1457 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r | |
| 1458 | APs to return from Procedure, either for\r | |
| 1459 | blocking or non-blocking mode.\r | |
| 5ed4c46f | 1460 | @param[in,out] ProcedureArguments The parameter passed into Procedure for\r |
| 51dd408a ED |
1461 | all APs.\r |
| 1462 | @param[in,out] Token This is an optional parameter that allows the caller to execute the\r | |
| 1463 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
| 1464 | call is blocking, and the call will not return until the AP has\r | |
| 1465 | completed the procedure. If the token is not NULL, the call will\r | |
| 1466 | return immediately. The caller can check whether the procedure has\r | |
| 1467 | completed with CheckOnProcedure or WaitForProcedure.\r | |
| 1468 | @param[in,out] CPUStatus This optional pointer may be used to get the status code returned\r | |
| 1469 | by Procedure when it completes execution on the target AP, or with\r | |
| 1470 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
| 1471 | timeout. The implementation will update this variable with\r | |
| 1472 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
| 1473 | \r | |
| 1474 | @retval EFI_SUCCESS In blocking mode, all APs have finished before\r | |
| 1475 | the timeout expired.\r | |
| 1476 | @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r | |
| 1477 | to all enabled APs.\r | |
| 1478 | @retval others Failed to Startup all APs.\r | |
| 1479 | \r | |
| 1480 | **/\r | |
| 1481 | EFI_STATUS\r | |
| 1482 | InternalSmmStartupAllAPs (\r | |
| 053e878b MK |
1483 | IN EFI_AP_PROCEDURE2 Procedure,\r |
| 1484 | IN UINTN TimeoutInMicroseconds,\r | |
| 1485 | IN OUT VOID *ProcedureArguments OPTIONAL,\r | |
| 1486 | IN OUT MM_COMPLETION *Token,\r | |
| 1487 | IN OUT EFI_STATUS *CPUStatus\r | |
| 51dd408a ED |
1488 | );\r |
| 1489 | \r | |
| 1490 | /**\r | |
| 1491 | \r | |
| 1492 | Register the SMM Foundation entry point.\r | |
| 1493 | \r | |
| 1494 | @param[in] Procedure A pointer to the code stream to be run on the designated target AP\r | |
| 1495 | of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2\r | |
| 1496 | with the related definitions of\r | |
| 1497 | EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.\r | |
| 1498 | If caller may pass a value of NULL to deregister any existing\r | |
| 1499 | startup procedure.\r | |
| 1500 | @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is\r | |
| 1501 | run by the AP. It is an optional common mailbox between APs and\r | |
| 1502 | the caller to share information\r | |
| 1503 | \r | |
| 1504 | @retval EFI_SUCCESS The Procedure has been set successfully.\r | |
| 1505 | @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.\r | |
| 1506 | \r | |
| 1507 | **/\r | |
| 1508 | EFI_STATUS\r | |
| 1509 | RegisterStartupProcedure (\r | |
| 053e878b MK |
1510 | IN EFI_AP_PROCEDURE Procedure,\r |
| 1511 | IN OUT VOID *ProcedureArguments OPTIONAL\r | |
| 51dd408a ED |
1512 | );\r |
| 1513 | \r | |
| c14c4719 WJ |
1514 | /**\r |
| 1515 | Initialize PackageBsp Info. Processor specified by mPackageFirstThreadIndex[PackageIndex]\r | |
| 1516 | will do the package-scope register programming. Set default CpuIndex to (UINT32)-1, which\r | |
| 1517 | means not specified yet.\r | |
| 1518 | \r | |
| 1519 | **/\r | |
| 1520 | VOID\r | |
| 1521 | InitPackageFirstThreadIndexInfo (\r | |
| 1522 | VOID\r | |
| 1523 | );\r | |
| 1524 | \r | |
| 51dd408a ED |
1525 | /**\r |
| 1526 | Allocate buffer for SpinLock and Wrapper function buffer.\r | |
| 1527 | \r | |
| 1528 | **/\r | |
| 1529 | VOID\r | |
| 1530 | InitializeDataForMmMp (\r | |
| 1531 | VOID\r | |
| 1532 | );\r | |
| 1533 | \r | |
| 79186ddc RN |
1534 | /**\r |
| 1535 | Return whether access to non-SMRAM is restricted.\r | |
| 1536 | \r | |
| 1537 | @retval TRUE Access to non-SMRAM is restricted.\r | |
| 1538 | @retval FALSE Access to non-SMRAM is not restricted.\r | |
| 9c33f16f | 1539 | **/\r |
| 79186ddc RN |
1540 | BOOLEAN\r |
| 1541 | IsRestrictedMemoryAccess (\r | |
| 1542 | VOID\r | |
| 1543 | );\r | |
| 1544 | \r | |
| 4a68176c LZ |
1545 | /**\r |
| 1546 | Choose blocking or non-blocking mode to Wait for all APs.\r | |
| 1547 | \r | |
| 1548 | @param[in] This A pointer to the EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL instance.\r | |
| 1549 | @param[in] BlockingMode Blocking or non-blocking mode.\r | |
| 1550 | \r | |
| 1551 | @retval EFI_SUCCESS All APs have arrived SMM mode except SMI disabled APs.\r | |
| 1552 | @retval EFI_TIMEOUT There are APs not in SMM mode in given timeout constraint.\r | |
| 1553 | \r | |
| 1554 | **/\r | |
| 1555 | EFI_STATUS\r | |
| 1556 | EFIAPI\r | |
| 1557 | SmmCpuRendezvous (\r | |
| 1558 | IN EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL *This,\r | |
| 1559 | IN BOOLEAN BlockingMode\r | |
| 1560 | );\r | |
| 1561 | \r | |
| 1562 | /**\r | |
| 1563 | Insure when this function returns, no AP will execute normal mode code before entering SMM, except SMI disabled APs.\r | |
| 1564 | \r | |
| 1565 | **/\r | |
| 1566 | VOID\r | |
| 1567 | SmmWaitForApArrival (\r | |
| 1568 | VOID\r | |
| 1569 | );\r | |
| 1570 | \r | |
| 529a5a86 | 1571 | #endif\r |