MdePkg/BaseLib: add PatchInstructionX86()
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmmInit.asm
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1;------------------------------------------------------------------------------ ;\r
2; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
3; This program and the accompanying materials\r
4; are licensed and made available under the terms and conditions of the BSD License\r
5; which accompanies this distribution. The full text of the license may be found at\r
6; http://opensource.org/licenses/bsd-license.php.\r
7;\r
8; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
9; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
10;\r
11; Module Name:\r
12;\r
13; SmmInit.Asm\r
14;\r
15; Abstract:\r
16;\r
17; Functions for relocating SMBASE's for all processors\r
18;\r
19;-------------------------------------------------------------------------------\r
20\r
21EXTERNDEF SmmInitHandler:PROC\r
22EXTERNDEF gSmmCr0:DWORD\r
23EXTERNDEF gSmmCr3:DWORD\r
24EXTERNDEF gSmmCr4:DWORD\r
25EXTERNDEF gSmmJmpAddr:QWORD\r
26EXTERNDEF gcSmmInitTemplate:BYTE\r
27EXTERNDEF gcSmmInitSize:WORD\r
28EXTERNDEF mRebasedFlag:PTR BYTE\r
29EXTERNDEF mSmmRelocationOriginalAddress:QWORD\r
30EXTERNDEF mRebasedFlagAddr32:DWORD\r
31EXTERNDEF mSmmRelocationOriginalAddressPtr32:DWORD\r
32EXTERNDEF gSmmInitStack:QWORD\r
33EXTERNDEF gcSmiInitGdtr:FWORD\r
34\r
35 .code\r
36\r
37gcSmiInitGdtr LABEL FWORD\r
38 DW 0\r
39 DQ 0\r
40\r
41SmmStartup PROC\r
42 DB 66h, 0b8h ; mov eax, imm32\r
43gSmmCr3 DD ?\r
44 mov cr3, rax\r
45 DB 66h, 2eh\r
46 lgdt fword ptr [ebp + (offset gcSmiInitGdtr - SmmStartup)]\r
47 DB 66h, 0b8h ; mov eax, imm32\r
48gSmmCr4 DD ?\r
49 or ah, 2 ; enable XMM registers access\r
50 mov cr4, rax\r
51 DB 66h\r
52 mov ecx, 0c0000080h ; IA32_EFER MSR\r
53 rdmsr\r
54 or ah, 1 ; set LME bit\r
55 wrmsr\r
56 DB 66h, 0b8h ; mov eax, imm32\r
57gSmmCr0 DD ?\r
58 mov cr0, rax ; enable protected mode & paging\r
59 DB 66h, 0eah ; far jmp to long mode\r
60gSmmJmpAddr DQ @LongMode\r
61@LongMode: ; long-mode starts here\r
62 DB 48h, 0bch ; mov rsp, imm64\r
63gSmmInitStack DQ ?\r
64 and sp, 0fff0h ; make sure RSP is 16-byte aligned\r
65 ;\r
66 ; Accoring to X64 calling convention, XMM0~5 are volatile, we need to save\r
67 ; them before calling C-function.\r
68 ;\r
69 sub rsp, 60h\r
70 movdqa [rsp], xmm0\r
71 movdqa [rsp + 10h], xmm1\r
72 movdqa [rsp + 20h], xmm2\r
73 movdqa [rsp + 30h], xmm3\r
74 movdqa [rsp + 40h], xmm4\r
75 movdqa [rsp + 50h], xmm5\r
76\r
77 add rsp, -20h\r
78 call SmmInitHandler\r
79 add rsp, 20h\r
80\r
81 ;\r
82 ; Restore XMM0~5 after calling C-function.\r
83 ;\r
84 movdqa xmm0, [rsp]\r
85 movdqa xmm1, [rsp + 10h]\r
86 movdqa xmm2, [rsp + 20h]\r
87 movdqa xmm3, [rsp + 30h]\r
88 movdqa xmm4, [rsp + 40h]\r
89 movdqa xmm5, [rsp + 50h]\r
90\r
91 rsm\r
92SmmStartup ENDP\r
93\r
94gcSmmInitTemplate LABEL BYTE\r
95\r
96_SmmInitTemplate PROC\r
97 DB 66h, 2eh, 8bh, 2eh ; mov ebp, cs:[@F]\r
98 DW @L1 - _SmmInitTemplate + 8000h\r
99 DB 66h, 81h, 0edh, 00h, 00h, 03h, 00 ; sub ebp, 30000h\r
100 jmp bp ; jmp ebp actually\r
101@L1:\r
102 DQ SmmStartup\r
103_SmmInitTemplate ENDP\r
104\r
105gcSmmInitSize DW $ - gcSmmInitTemplate\r
106\r
107SmmRelocationSemaphoreComplete PROC\r
108 push rax\r
109 mov rax, mRebasedFlag\r
110 mov byte ptr [rax], 1\r
111 pop rax\r
112 jmp [mSmmRelocationOriginalAddress]\r
113SmmRelocationSemaphoreComplete ENDP\r
114\r
115;\r
116; Semaphore code running in 32-bit mode\r
117;\r
118SmmRelocationSemaphoreComplete32 PROC\r
119 ;\r
120 ; mov byte ptr [], 1\r
121 ;\r
122 db 0c6h, 05h\r
123mRebasedFlagAddr32 dd 0\r
124 db 1\r
125 ;\r
126 ; jmp dword ptr []\r
127 ;\r
128 db 0ffh, 25h\r
129mSmmRelocationOriginalAddressPtr32 dd 0\r
130SmmRelocationSemaphoreComplete32 ENDP\r
131\r
132 END\r