projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| bc252e8e EB |
1 | ;------------------------------------------------------------------------------\r |
| 2 | ; @file\r | |
| 74b7ec58 | 3 | ; First code executed by processor after resetting.\r |
| bc252e8e | 4 | ;\r |
| eee1d2ca | 5 | ; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>\r |
| 0acd8697 | 6 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| bc252e8e EB |
7 | ;\r |
| 8 | ;------------------------------------------------------------------------------\r | |
| 9 | \r | |
| 10 | BITS 16\r | |
| 11 | \r | |
| 12 | ALIGN 16\r | |
| 13 | \r | |
| eee1d2ca JJ |
14 | ;\r |
| 15 | ; Pad the image size to 4k when page tables are in VTF0\r | |
| 16 | ;\r | |
| 17 | ; If the VTF0 image has page tables built in, then we need to make\r | |
| 18 | ; sure the end of VTF0 is 4k above where the page tables end.\r | |
| 19 | ;\r | |
| 20 | ; This is required so the page tables will be 4k aligned when VTF0 is\r | |
| 21 | ; located just below 0x100000000 (4GB) in the firmware device.\r | |
| 22 | ;\r | |
| 23 | %ifdef ALIGN_TOP_TO_4K_FOR_PAGING\r | |
| b9e702c3 DC |
24 | TIMES (0x1000 - ($ - EndOfPageTables)) DB 0\r |
| 25 | ;\r | |
| 26 | ; Pad the VTF0 Reset code for Bsp & Ap to 4k aligned block.\r | |
| 27 | ; Some implementations may need to keep the initial Reset code\r | |
| 28 | ; to be separated out from rest of the code.\r | |
| 29 | ; This padding will make sure lower 4K region below 4 GB may\r | |
| 30 | ; only contains few jmp instructions and data.\r | |
| 31 | ;\r | |
| 32 | TIMES (0x1000 - 0x20) DB 0\r | |
| eee1d2ca JJ |
33 | %endif\r |
| 34 | \r | |
| bc252e8e EB |
35 | applicationProcessorEntryPoint:\r |
| 36 | ;\r | |
| 37 | ; Application Processors entry point\r | |
| 38 | ;\r | |
| 39 | ; GenFv generates code aligned on a 4k boundary which will jump to this\r | |
| 40 | ; location. (0xffffffe0) This allows the Local APIC Startup IPI to be\r | |
| 41 | ; used to wake up the application processors.\r | |
| 42 | ;\r | |
| eee1d2ca | 43 | jmp EarlyApInitReal16\r |
| bc252e8e EB |
44 | \r |
| 45 | ALIGN 8\r | |
| 46 | \r | |
| 47 | DD 0\r | |
| 48 | \r | |
| 49 | ;\r | |
| 50 | ; The VTF signature\r | |
| 51 | ;\r | |
| 52 | ; VTF-0 means that the VTF (Volume Top File) code does not require\r | |
| 53 | ; any fixups.\r | |
| 54 | ;\r | |
| 55 | vtfSignature:\r | |
| 56 | DB 'V', 'T', 'F', 0\r | |
| 57 | \r | |
| 58 | ALIGN 16\r | |
| 59 | \r | |
| 60 | resetVector:\r | |
| 61 | ;\r | |
| 62 | ; Reset Vector\r | |
| 63 | ;\r | |
| 64 | ; This is where the processor will begin execution\r | |
| 65 | ;\r | |
| 8332983e | 66 | nop\r |
| 67 | nop\r | |
| eee1d2ca | 68 | jmp EarlyBspInitReal16\r |
| bc252e8e EB |
69 | \r |
| 70 | ALIGN 16\r | |
| 71 | \r | |
| 72 | fourGigabytes:\r | |
| 73 | \r |