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1 | ;------------------------------------------------------------------------------\r |
2 | ; @file\r | |
3 | ; First code exectuted by processor after resetting.\r | |
4 | ;\r | |
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5 | ; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r |
6 | ; This program and the accompanying materials\r | |
bc252e8e EB |
7 | ; are licensed and made available under the terms and conditions of the BSD License\r |
8 | ; which accompanies this distribution. The full text of the license may be found at\r | |
9 | ; http://opensource.org/licenses/bsd-license.php\r | |
10 | ;\r | |
11 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | ;\r | |
14 | ;------------------------------------------------------------------------------\r | |
15 | \r | |
16 | BITS 16\r | |
17 | \r | |
18 | ALIGN 16\r | |
19 | \r | |
20 | applicationProcessorEntryPoint:\r | |
21 | ;\r | |
22 | ; Application Processors entry point\r | |
23 | ;\r | |
24 | ; GenFv generates code aligned on a 4k boundary which will jump to this\r | |
25 | ; location. (0xffffffe0) This allows the Local APIC Startup IPI to be\r | |
26 | ; used to wake up the application processors.\r | |
27 | ;\r | |
28 | jmp short EarlyApInitReal16\r | |
29 | \r | |
30 | ALIGN 8\r | |
31 | \r | |
32 | DD 0\r | |
33 | \r | |
34 | ;\r | |
35 | ; The VTF signature\r | |
36 | ;\r | |
37 | ; VTF-0 means that the VTF (Volume Top File) code does not require\r | |
38 | ; any fixups.\r | |
39 | ;\r | |
40 | vtfSignature:\r | |
41 | DB 'V', 'T', 'F', 0\r | |
42 | \r | |
43 | ALIGN 16\r | |
44 | \r | |
45 | resetVector:\r | |
46 | ;\r | |
47 | ; Reset Vector\r | |
48 | ;\r | |
49 | ; This is where the processor will begin execution\r | |
50 | ;\r | |
51 | wbinvd\r | |
52 | jmp short EarlyBspInitReal16\r | |
53 | \r | |
54 | ALIGN 16\r | |
55 | \r | |
56 | fourGigabytes:\r | |
57 | \r |