[mirror_edk2.git] / UefiCpuPkg / SecCore / SecMain.c

/** @file\r
  C functions in SEC\r
\r
  Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "SecMain.h"\r
\r
EFI_PEI_TEMPORARY_RAM_DONE_PPI gSecTemporaryRamDonePpi = {\r
  SecTemporaryRamDone\r
};\r
\r
EFI_SEC_PLATFORM_INFORMATION_PPI  mSecPlatformInformationPpi = { SecPlatformInformation };\r
\r
EFI_PEI_PPI_DESCRIPTOR            mPeiSecPlatformInformationPpi[] = {\r
  {\r
    //\r
    // SecPerformance PPI notify descriptor.\r
    //\r
    EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK,\r
    &gPeiSecPerformancePpiGuid,\r
    (VOID *) (UINTN) SecPerformancePpiCallBack\r
  },\r
  {\r
    EFI_PEI_PPI_DESCRIPTOR_PPI,\r
    &gEfiTemporaryRamDonePpiGuid,\r
    &gSecTemporaryRamDonePpi\r
  },\r
  {\r
    (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
    &gEfiSecPlatformInformationPpiGuid,\r
    &mSecPlatformInformationPpi\r
  }\r
};\r
\r
//\r
// These are IDT entries pointing to 10:FFFFFFE4h.\r
//\r
UINT64  mIdtEntryTemplate = 0xffff8e000010ffe4ULL;\r
\r
/**\r
  Caller provided function to be invoked at the end of InitializeDebugAgent().\r
\r
  Entry point to the C language phase of SEC. After the SEC assembly\r
  code has initialized some temporary memory and set up the stack,\r
  the control is transferred to this function.\r
\r
  @param[in] Context    The first input parameter of InitializeDebugAgent().\r
\r
**/\r
VOID\r
NORETURN\r
EFIAPI\r
SecStartupPhase2(\r
  IN VOID                     *Context\r
  );\r
\r
/**\r
  Entry point of the notification callback function itself within the PEIM.\r
  It is to get SEC performance data and build HOB to convey the SEC performance\r
  data to DXE phase.\r
\r
  @param  PeiServices      Indirect reference to the PEI Services Table.\r
  @param  NotifyDescriptor Address of the notification descriptor data structure.\r
  @param  Ppi              Address of the PPI that was installed.\r
\r
  @return Status of the notification.\r
          The status code returned from this function is ignored.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SecPerformancePpiCallBack (\r
  IN EFI_PEI_SERVICES           **PeiServices,\r
  IN EFI_PEI_NOTIFY_DESCRIPTOR  *NotifyDescriptor,\r
  IN VOID                       *Ppi\r
  )\r
{\r
  EFI_STATUS                    Status;\r
  PEI_SEC_PERFORMANCE_PPI       *SecPerf;\r
  FIRMWARE_SEC_PERFORMANCE      Performance;\r
\r
  SecPerf = (PEI_SEC_PERFORMANCE_PPI *) Ppi;\r
  Status = SecPerf->GetPerformance ((CONST EFI_PEI_SERVICES **) PeiServices, SecPerf, &Performance);\r
  if (!EFI_ERROR (Status)) {\r
    BuildGuidDataHob (\r
      &gEfiFirmwarePerformanceGuid,\r
      &Performance,\r
      sizeof (FIRMWARE_SEC_PERFORMANCE)\r
    );\r
    DEBUG ((DEBUG_INFO, "FPDT: SEC Performance Hob ResetEnd = %ld\n", Performance.ResetEnd));\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
\r
  Entry point to the C language phase of SEC. After the SEC assembly\r
  code has initialized some temporary memory and set up the stack,\r
  the control is transferred to this function.\r
\r
\r
  @param SizeOfRam           Size of the temporary memory available for use.\r
  @param TempRamBase         Base address of temporary ram\r
  @param BootFirmwareVolume  Base address of the Boot Firmware Volume.\r
**/\r
VOID\r
EFIAPI\r
SecStartup (\r
  IN UINT32                   SizeOfRam,\r
  IN UINT32                   TempRamBase,\r
  IN VOID                     *BootFirmwareVolume\r
  )\r
{\r
  EFI_SEC_PEI_HAND_OFF        SecCoreData;\r
  IA32_DESCRIPTOR             IdtDescriptor;\r
  SEC_IDT_TABLE               IdtTableInStack;\r
  UINT32                      Index;\r
  UINT32                      PeiStackSize;\r
  EFI_STATUS                  Status;\r
\r
  //\r
  // Report Status Code to indicate entering SEC core\r
  //\r
  REPORT_STATUS_CODE (\r
    EFI_PROGRESS_CODE,\r
    EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_ENTRY_POINT\r
    );\r
\r
  PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);\r
  if (PeiStackSize == 0) {\r
    PeiStackSize = (SizeOfRam >> 1);\r
  }\r
\r
  ASSERT (PeiStackSize < SizeOfRam);\r
\r
  //\r
  // Process all libraries constructor function linked to SecCore.\r
  //\r
  ProcessLibraryConstructorList ();\r
\r
  //\r
  // Initialize floating point operating environment\r
  // to be compliant with UEFI spec.\r
  //\r
  InitializeFloatingPointUnits ();\r
\r
  // |-------------------|---->\r
  // |IDT Table          |\r
  // |-------------------|\r
  // |PeiService Pointer |    PeiStackSize\r
  // |-------------------|\r
  // |                   |\r
  // |      Stack        |\r
  // |-------------------|---->\r
  // |                   |\r
  // |                   |\r
  // |      Heap         |    PeiTemporayRamSize\r
  // |                   |\r
  // |                   |\r
  // |-------------------|---->  TempRamBase\r
\r
  IdtTableInStack.PeiService = 0;\r
  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
    CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));\r
  }\r
\r
  IdtDescriptor.Base  = (UINTN) &IdtTableInStack.IdtTable;\r
  IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
\r
  AsmWriteIdtr (&IdtDescriptor);\r
\r
  //\r
  // Setup the default exception handlers\r
  //\r
  Status = InitializeCpuExceptionHandlers (NULL);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  //\r
  // Update the base address and length of Pei temporary memory\r
  //\r
  SecCoreData.DataSize               = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
  SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
  SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
  SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;\r
  SecCoreData.TemporaryRamSize       = SizeOfRam;\r
  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
  SecCoreData.PeiTemporaryRamSize    = SizeOfRam - PeiStackSize;\r
  SecCoreData.StackBase              = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
  SecCoreData.StackSize              = PeiStackSize;\r
\r
  //\r
  // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
  //\r
  InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
}\r
\r
/**\r
  Caller provided function to be invoked at the end of InitializeDebugAgent().\r
\r
  Entry point to the C language phase of SEC. After the SEC assembly\r
  code has initialized some temporary memory and set up the stack,\r
  the control is transferred to this function.\r
\r
  @param[in] Context    The first input parameter of InitializeDebugAgent().\r
\r
**/\r
VOID\r
NORETURN\r
EFIAPI\r
SecStartupPhase2(\r
  IN VOID                     *Context\r
  )\r
{\r
  EFI_SEC_PEI_HAND_OFF        *SecCoreData;\r
  EFI_PEI_PPI_DESCRIPTOR      *PpiList;\r
  UINT32                      Index;\r
  EFI_PEI_PPI_DESCRIPTOR      *AllSecPpiList;\r
  EFI_PEI_CORE_ENTRY_POINT    PeiCoreEntryPoint;\r
\r
  SecCoreData   = (EFI_SEC_PEI_HAND_OFF *) Context;\r
  AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;\r
  //\r
  // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
  // is enabled.\r
  //\r
  FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);\r
  if (PeiCoreEntryPoint == NULL)\r
  {\r
    CpuDeadLoop ();\r
  }\r
\r
  //\r
  // Perform platform specific initialization before entering PeiCore.\r
  //\r
  PpiList = SecPlatformMain (SecCoreData);\r
  if (PpiList != NULL) {\r
    //\r
    // Remove the terminal flag from the terminal PPI\r
    //\r
    CopyMem (AllSecPpiList, mPeiSecPlatformInformationPpi, sizeof (mPeiSecPlatformInformationPpi));\r
    Index = sizeof (mPeiSecPlatformInformationPpi) / sizeof (EFI_PEI_PPI_DESCRIPTOR) - 1;\r
    AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
\r
    //\r
    // Append the platform additional PPI list\r
    //\r
    Index += 1;\r
    while (((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {\r
      CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
      Index++;\r
      PpiList++;\r
    }\r
\r
    //\r
    // Add the terminal PPI\r
    //\r
    CopyMem (&AllSecPpiList[Index ++], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
\r
    //\r
    // Set PpiList to the total PPI\r
    //\r
    PpiList = AllSecPpiList;\r
\r
    //\r
    // Adjust PEI TEMP RAM Range.\r
    //\r
    ASSERT (SecCoreData->PeiTemporaryRamSize > Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
    SecCoreData->PeiTemporaryRamBase = (VOID *)((UINTN) SecCoreData->PeiTemporaryRamBase + Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
    SecCoreData->PeiTemporaryRamSize = SecCoreData->PeiTemporaryRamSize - Index * sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
    //\r
    // Adjust the Base and Size to be 8-byte aligned as HOB which has 8byte aligned requirement\r
    // will be built based on them in PEI phase.\r
    //\r
    SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
    SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
  } else {\r
    //\r
    // No addition PPI, PpiList directly point to the common PPI list.\r
    //\r
    PpiList = &mPeiSecPlatformInformationPpi[0];\r
  }\r
\r
  DEBUG ((\r
    DEBUG_INFO,\r
    "%a() Stack Base: 0x%p, Stack Size: 0x%x\n",\r
    __FUNCTION__,\r
    SecCoreData->StackBase,\r
    (UINT32) SecCoreData->StackSize\r
    ));\r
\r
  //\r
  // Report Status Code to indicate transferring to PEI core\r
  //\r
  REPORT_STATUS_CODE (\r
    EFI_PROGRESS_CODE,\r
    EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_HANDOFF_TO_NEXT\r
    );\r
\r
  //\r
  // Transfer the control to the PEI core\r
  //\r
  ASSERT (PeiCoreEntryPoint != NULL);\r
  (*PeiCoreEntryPoint) (SecCoreData, PpiList);\r
\r
  //\r
  // Should not come here.\r
  //\r
  UNREACHABLE ();\r
}\r
\r
/**\r
  TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked\r
  by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.\r
\r
  @retval EFI_SUCCESS           Use of Temporary RAM was disabled.\r
  @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
SecTemporaryRamDone (\r
  VOID\r
  )\r
{\r
  BOOLEAN  State;\r
\r
  //\r
  // Republish Sec Platform Information(2) PPI\r
  //\r
  RepublishSecPlatformInformationPpi ();\r
\r
  //\r
  // Migrate DebugAgentContext.\r
  //\r
  InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
\r
  //\r
  // Disable interrupts and save current interrupt state\r
  //\r
  State = SaveAndDisableInterrupts();\r
\r
  //\r
  // Disable Temporary RAM after Stack and Heap have been migrated at this point.\r
  //\r
  SecPlatformDisableTemporaryMemory ();\r
\r
  //\r
  // Restore original interrupt state\r
  //\r
  SetInterruptState (State);\r
\r
  return EFI_SUCCESS;\r
}\r
Commit	Line	Data
1921695e MK	1	/** @file\r
	2	C functions in SEC\r
	3	\r
9e9ca210	4	Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
1921695e MK	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include "SecMain.h"\r
	16	\r
	17	EFI_PEI_TEMPORARY_RAM_DONE_PPI gSecTemporaryRamDonePpi = {\r
	18	SecTemporaryRamDone\r
	19	};\r
	20	\r
	21	EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = { SecPlatformInformation };\r
	22	\r
	23	EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {\r
f2e70629 SZ	24	{\r
	25	//\r
	26	// SecPerformance PPI notify descriptor.\r
	27	//\r
	28	EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK,\r
	29	&gPeiSecPerformancePpiGuid,\r
	30	(VOID *) (UINTN) SecPerformancePpiCallBack\r
	31	},\r
1921695e MK	32	{\r
	33	EFI_PEI_PPI_DESCRIPTOR_PPI,\r
	34	&gEfiTemporaryRamDonePpiGuid,\r
	35	&gSecTemporaryRamDonePpi\r
	36	},\r
	37	{\r
	38	(EFI_PEI_PPI_DESCRIPTOR_PPI \| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
	39	&gEfiSecPlatformInformationPpiGuid,\r
	40	&mSecPlatformInformationPpi\r
	41	}\r
	42	};\r
	43	\r
	44	//\r
	45	// These are IDT entries pointing to 10:FFFFFFE4h.\r
	46	//\r
	47	UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;\r
	48	\r
	49	/**\r
	50	Caller provided function to be invoked at the end of InitializeDebugAgent().\r
	51	\r
	52	Entry point to the C language phase of SEC. After the SEC assembly\r
	53	code has initialized some temporary memory and set up the stack,\r
	54	the control is transferred to this function.\r
	55	\r
	56	@param[in] Context The first input parameter of InitializeDebugAgent().\r
	57	\r
	58	**/\r
	59	VOID\r
61257251	60	NORETURN\r
1921695e MK	61	EFIAPI\r
	62	SecStartupPhase2(\r
	63	IN VOID *Context\r
	64	);\r
	65	\r
f2e70629 SZ	66	/**\r
	67	Entry point of the notification callback function itself within the PEIM.\r
	68	It is to get SEC performance data and build HOB to convey the SEC performance\r
	69	data to DXE phase.\r
	70	\r
	71	@param PeiServices Indirect reference to the PEI Services Table.\r
	72	@param NotifyDescriptor Address of the notification descriptor data structure.\r
	73	@param Ppi Address of the PPI that was installed.\r
	74	\r
	75	@return Status of the notification.\r
	76	The status code returned from this function is ignored.\r
	77	**/\r
	78	EFI_STATUS\r
	79	EFIAPI\r
	80	SecPerformancePpiCallBack (\r
	81	IN EFI_PEI_SERVICES **PeiServices,\r
	82	IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
	83	IN VOID *Ppi\r
	84	)\r
	85	{\r
	86	EFI_STATUS Status;\r
	87	PEI_SEC_PERFORMANCE_PPI *SecPerf;\r
	88	FIRMWARE_SEC_PERFORMANCE Performance;\r
	89	\r
	90	SecPerf = (PEI_SEC_PERFORMANCE_PPI *) Ppi;\r
	91	Status = SecPerf->GetPerformance ((CONST EFI_PEI_SERVICES **) PeiServices, SecPerf, &Performance);\r
	92	if (!EFI_ERROR (Status)) {\r
	93	BuildGuidDataHob (\r
	94	&gEfiFirmwarePerformanceGuid,\r
	95	&Performance,\r
	96	sizeof (FIRMWARE_SEC_PERFORMANCE)\r
	97	);\r
	98	DEBUG ((DEBUG_INFO, "FPDT: SEC Performance Hob ResetEnd = %ld\n", Performance.ResetEnd));\r
	99	}\r
	100	\r
	101	return Status;\r
	102	}\r
	103	\r
1921695e MK	104	/**\r
	105	\r
	106	Entry point to the C language phase of SEC. After the SEC assembly\r
	107	code has initialized some temporary memory and set up the stack,\r
	108	the control is transferred to this function.\r
	109	\r
	110	\r
	111	@param SizeOfRam Size of the temporary memory available for use.\r
	112	@param TempRamBase Base address of temporary ram\r
	113	@param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
	114	**/\r
	115	VOID\r
	116	EFIAPI\r
	117	SecStartup (\r
	118	IN UINT32 SizeOfRam,\r
	119	IN UINT32 TempRamBase,\r
	120	IN VOID *BootFirmwareVolume\r
	121	)\r
	122	{\r
	123	EFI_SEC_PEI_HAND_OFF SecCoreData;\r
	124	IA32_DESCRIPTOR IdtDescriptor;\r
	125	SEC_IDT_TABLE IdtTableInStack;\r
	126	UINT32 Index;\r
	127	UINT32 PeiStackSize;\r
	128	EFI_STATUS Status;\r
	129	\r
	130	//\r
	131	// Report Status Code to indicate entering SEC core\r
	132	//\r
	133	REPORT_STATUS_CODE (\r
	134	EFI_PROGRESS_CODE,\r
	135	EFI_SOFTWARE_SEC \| EFI_SW_SEC_PC_ENTRY_POINT\r
	136	);\r
	137	\r
	138	PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);\r
	139	if (PeiStackSize == 0) {\r
	140	PeiStackSize = (SizeOfRam >> 1);\r
	141	}\r
	142	\r
	143	ASSERT (PeiStackSize < SizeOfRam);\r
	144	\r
	145	//\r
	146	// Process all libraries constructor function linked to SecCore.\r
	147	//\r
	148	ProcessLibraryConstructorList ();\r
	149	\r
	150	//\r
	151	// Initialize floating point operating environment\r
	152	// to be compliant with UEFI spec.\r
	153	//\r
	154	InitializeFloatingPointUnits ();\r
	155	\r
	156	// \|-------------------\|---->\r
	157	// \|IDT Table \|\r
	158	// \|-------------------\|\r
	159	// \|PeiService Pointer \| PeiStackSize\r
	160	// \|-------------------\|\r
	161	// \| \|\r
	162	// \| Stack \|\r
	163	// \|-------------------\|---->\r
	164	// \| \|\r
	165	// \| \|\r
	166	// \| Heap \| PeiTemporayRamSize\r
	167	// \| \|\r
168	// \| \|\r
169	// \|-------------------\|----> TempRamBase\r
170	\r
171	IdtTableInStack.PeiService = 0;\r
172	for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
173	CopyMem ((VOID)&IdtTableInStack.IdtTable[Index], (VOID)&mIdtEntryTemplate, sizeof (UINT64));\r
174	}\r
175	\r
176	IdtDescriptor.Base = (UINTN) &IdtTableInStack.IdtTable;\r
177	IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
178	\r
179	AsmWriteIdtr (&IdtDescriptor);\r
180	\r
181	//\r
182	// Setup the default exception handlers\r
183	//\r
184	Status = InitializeCpuExceptionHandlers (NULL);\r
185	ASSERT_EFI_ERROR (Status);\r
186	\r
187	//\r
188	// Update the base address and length of Pei temporary memory\r
189	//\r
190	SecCoreData.DataSize = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
191	SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
f0162959	192	SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
1921695e MK	193	SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;\r
	194	SecCoreData.TemporaryRamSize = SizeOfRam;\r
	195	SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;\r
	196	SecCoreData.PeiTemporaryRamSize = SizeOfRam - PeiStackSize;\r
	197	SecCoreData.StackBase = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
	198	SecCoreData.StackSize = PeiStackSize;\r
	199	\r
	200	//\r
	201	// Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
	202	//\r
	203	InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
	204	}\r
	205	\r
	206	/**\r
	207	Caller provided function to be invoked at the end of InitializeDebugAgent().\r
	208	\r
	209	Entry point to the C language phase of SEC. After the SEC assembly\r
	210	code has initialized some temporary memory and set up the stack,\r
	211	the control is transferred to this function.\r
	212	\r
	213	@param[in] Context The first input parameter of InitializeDebugAgent().\r
	214	\r
	215	**/\r
	216	VOID\r
61257251	217	NORETURN\r
1921695e MK	218	EFIAPI\r
	219	SecStartupPhase2(\r
	220	IN VOID *Context\r
	221	)\r
	222	{\r
	223	EFI_SEC_PEI_HAND_OFF *SecCoreData;\r
	224	EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
	225	UINT32 Index;\r
	226	EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList;\r
	227	EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;\r
	228	\r
	229	SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;\r
	230	AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;\r
	231	//\r
	232	// Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
	233	// is enabled.\r
	234	//\r
	235	FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);\r
	236	if (PeiCoreEntryPoint == NULL)\r
	237	{\r
	238	CpuDeadLoop ();\r
	239	}\r
	240	\r
	241	//\r
	242	// Perform platform specific initialization before entering PeiCore.\r
	243	//\r
	244	PpiList = SecPlatformMain (SecCoreData);\r
	245	if (PpiList != NULL) {\r
	246	//\r
	247	// Remove the terminal flag from the terminal PPI\r
	248	//\r
	249	CopyMem (AllSecPpiList, mPeiSecPlatformInformationPpi, sizeof (mPeiSecPlatformInformationPpi));\r
	250	Index = sizeof (mPeiSecPlatformInformationPpi) / sizeof (EFI_PEI_PPI_DESCRIPTOR) - 1;\r
	251	AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
	252	\r
	253	//\r
	254	// Append the platform additional PPI list\r
	255	//\r
	256	Index += 1;\r
	257	while (((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {\r
	258	CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	259	Index++;\r
	260	PpiList++;\r
	261	}\r
	262	\r
	263	//\r
	264	// Add the terminal PPI\r
	265	//\r
	266	CopyMem (&AllSecPpiList[Index ++], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	267	\r
	268	//\r
	269	// Set PpiList to the total PPI\r
	270	//\r
	271	PpiList = AllSecPpiList;\r
	272	\r
	273	//\r
	274	// Adjust PEI TEMP RAM Range.\r
	275	//\r
	276	ASSERT (SecCoreData->PeiTemporaryRamSize > Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	277	SecCoreData->PeiTemporaryRamBase = (VOID )((UINTN) SecCoreData->PeiTemporaryRamBase + Index sizeof (EFI_PEI_PPI_DESCRIPTOR));\r
	278	SecCoreData->PeiTemporaryRamSize = SecCoreData->PeiTemporaryRamSize - Index * sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
9e9ca210 SZ	279	//\r
	280	// Adjust the Base and Size to be 8-byte aligned as HOB which has 8byte aligned requirement\r
	281	// will be built based on them in PEI phase.\r
	282	//\r
	283	SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
59d3fad3	284	SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
1921695e MK	285	} else {\r
	286	//\r
	287	// No addition PPI, PpiList directly point to the common PPI list.\r
	288	//\r
	289	PpiList = &mPeiSecPlatformInformationPpi[0];\r
	290	}\r
	291	\r
af34c106 JF	292	DEBUG ((\r
af34c106 JF	293	DEBUG_INFO,\r
ec16deea	294	"%a() Stack Base: 0x%p, Stack Size: 0x%x\n",\r
af34c106 JF	295	__FUNCTION__,\r
af34c106 JF	296	SecCoreData->StackBase,\r
ec16deea	297	(UINT32) SecCoreData->StackSize\r
af34c106 JF	298	));\r
af34c106 JF	299	\r
1921695e MK	300	//\r
	301	// Report Status Code to indicate transferring to PEI core\r
	302	//\r
	303	REPORT_STATUS_CODE (\r
	304	EFI_PROGRESS_CODE,\r
	305	EFI_SOFTWARE_SEC \| EFI_SW_SEC_PC_HANDOFF_TO_NEXT\r
	306	);\r
	307	\r
	308	//\r
	309	// Transfer the control to the PEI core\r
	310	//\r
	311	ASSERT (PeiCoreEntryPoint != NULL);\r
	312	(*PeiCoreEntryPoint) (SecCoreData, PpiList);\r
	313	\r
	314	//\r
	315	// Should not come here.\r
	316	//\r
61257251	317	UNREACHABLE ();\r
1921695e MK	318	}\r
	319	\r
	320	/**\r
	321	TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked\r
	322	by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.\r
	323	\r
	324	@retval EFI_SUCCESS Use of Temporary RAM was disabled.\r
	325	@retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.\r
	326	\r
	327	**/\r
	328	EFI_STATUS\r
	329	EFIAPI\r
	330	SecTemporaryRamDone (\r
	331	VOID\r
	332	)\r
	333	{\r
	334	BOOLEAN State;\r
	335	\r
8a5b8cef JF	336	//\r
	337	// Republish Sec Platform Information(2) PPI\r
	338	//\r
	339	RepublishSecPlatformInformationPpi ();\r
	340	\r
1921695e MK	341	//\r
	342	// Migrate DebugAgentContext.\r
	343	//\r
	344	InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
	345	\r
	346	//\r
	347	// Disable interrupts and save current interrupt state\r
	348	//\r
	349	State = SaveAndDisableInterrupts();\r
	350	\r
	351	//\r
	352	// Disable Temporary RAM after Stack and Heap have been migrated at this point.\r
	353	//\r
	354	SecPlatformDisableTemporaryMemory ();\r
	355	\r
	356	//\r
	357	// Restore original interrupt state\r
	358	//\r
	359	SetInterruptState (State);\r
	360	\r
	361	return EFI_SUCCESS;\r
	362	}\r