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7798fb83 1## @file UefiCpuPkg.dec\r
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2# This Package provides UEFI compatible CPU modules and libraries.\r
3#\r
7eee4e1e 4# Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>\r
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5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License which accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14##\r
15\r
16[Defines]\r
17 DEC_SPECIFICATION = 0x00010005\r
18 PACKAGE_NAME = UefiCpuPkg\r
abae030a 19 PACKAGE_UNI_FILE = UefiCpuPkg.uni\r
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20 PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23\r
21 PACKAGE_VERSION = 0.3\r
22\r
23[Includes]\r
24 Include\r
25\r
26[LibraryClasses]\r
27 ## @libraryclass Defines some routines that are generic for IA32 family CPU\r
28 ## to be UEFI specification compliant.\r
29 ##\r
30 UefiCpuLib|Include/Library/UefiCpuLib.h\r
31\r
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32 ## @libraryclass Defines some routines that are used to register/manage/program\r
33 ## CPU features.\r
34 ##\r
245e98bf 35 RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h\r
548013c0 36\r
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37[LibraryClasses.IA32, LibraryClasses.X64]\r
38 ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.\r
39 ##\r
40 MtrrLib|Include/Library/MtrrLib.h\r
41\r
42 ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.\r
43 ##\r
44 LocalApicLib|Include/Library/LocalApicLib.h\r
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45\r
46 ## @libraryclass Provides platform specific initialization functions in the SEC phase.\r
47 ##\r
48 PlatformSecLib|Include/Library/PlatformSecLib.h\r
529a5a86 49\r
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50 ## @libraryclass Public include file for the SMM CPU Platform Hook Library.\r
51 ##\r
52 SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h\r
529a5a86 53\r
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54 ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.\r
55 ##\r
56 SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h\r
57\r
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58 ## @libraryclass Provides functions to support MP services on CpuMpPei and CpuDxe module.\r
59 ##\r
60 MpInitLib|Include/Library/MpInitLib.h\r
61\r
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62 ## @libraryclass Provides services to access Microcode region on flash device.\r
63 #\r
64 MicrocodeFlashAccessLib|Include/Library/MicrocodeFlashAccessLib.h\r
65\r
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66[Guids]\r
67 gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}\r
f7c11c53 68 gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}\r
7798fb83 69\r
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70 ## Include/Guid/MicrocodeFmp.h\r
71 gMicrocodeFmpImageTypeIdGuid = { 0x96d4fdcd, 0x1502, 0x424d, { 0x9d, 0x4c, 0x9b, 0x12, 0xd2, 0xdc, 0xae, 0x5c } }\r
72\r
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73 ## Include/Guid/CpuFeaturesSetDone.h\r
74 gEdkiiCpuFeaturesSetDoneGuid = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}\r
75\r
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76 ## Include/Guid/CpuFeaturesInitDone.h\r
77 gEdkiiCpuFeaturesInitDoneGuid = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }}\r
78\r
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79[Protocols]\r
80 ## Include/Protocol/SmmCpuService.h\r
81 gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}\r
529a5a86 82\r
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83 ## Include/Protocol/SmMonitorInit.h\r
84 gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}\r
85\r
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86#\r
87# [Error.gUefiCpuPkgTokenSpaceGuid]\r
88# 0x80000001 | Invalid value provided.\r
89#\r
90\r
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91[PcdsFeatureFlag]\r
92 ## Indicates if SMM Profile will be enabled.\r
93 # If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.\r
94 # This PCD is only for validation purpose. It should be set to false in production.<BR><BR>\r
95 # TRUE - SMM Profile will be enabled.<BR>\r
96 # FALSE - SMM Profile will be disabled.<BR>\r
97 # @Prompt Enable SMM Profile.\r
98 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109\r
99\r
100 ## Indicates if the SMM profile log buffer is a ring buffer.\r
101 # If disabled, no additional log can be done when the buffer is full.<BR><BR>\r
102 # TRUE - the SMM profile log buffer is a ring buffer.<BR>\r
103 # FALSE - the SMM profile log buffer is a normal buffer.<BR>\r
104 # @Prompt The SMM profile log buffer is a ring buffer.\r
105 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a\r
106\r
107 ## Indicates if SMM Startup AP in a blocking fashion.\r
108 # TRUE - SMM Startup AP in a blocking fashion.<BR>\r
109 # FALSE - SMM Startup AP in a non-blocking fashion.<BR>\r
110 # @Prompt SMM Startup AP in a blocking fashion.\r
111 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108\r
112\r
113 ## Indicates if SMM Stack Guard will be enabled.\r
509f8425 114 # If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR>\r
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115 # TRUE - SMM Stack Guard will be enabled.<BR>\r
116 # FALSE - SMM Stack Guard will be disabled.<BR>\r
117 # @Prompt Enable SMM Stack Guard.\r
509f8425 118 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C\r
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119\r
120 ## Indicates if BSP election in SMM will be enabled.\r
121 # If enabled, a BSP will be dynamically elected among all processors in each SMI.\r
122 # Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>\r
123 # TRUE - BSP election in SMM will be enabled.<BR>\r
124 # FALSE - BSP election in SMM will be disabled.<BR>\r
125 # @Prompt Enable BSP election in SMM.\r
126 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106\r
127\r
128 ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>\r
129 # TRUE - SMM CPU hot-plug will be enabled.<BR>\r
130 # FALSE - SMM CPU hot-plug will be disabled.<BR>\r
131 # @Prompt SMM CPU hot-plug.\r
132 gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C\r
133\r
134 ## Indicates if SMM Debug will be enabled.\r
135 # If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>\r
136 # TRUE - SMM Debug will be enabled.<BR>\r
137 # FALSE - SMM Debug will be disabled.<BR>\r
138 # @Prompt Enable SMM Debug.\r
139 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B\r
140\r
141 ## Indicates if lock SMM Feature Control MSR.<BR><BR>\r
142 # TRUE - SMM Feature Control MSR will be locked.<BR>\r
143 # FALSE - SMM Feature Control MSR will not be locked.<BR>\r
144 # @Prompt Lock SMM Feature Control MSR.\r
145 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B\r
146\r
7798fb83 147[PcdsFixedAtBuild, PcdsPatchableInModule]\r
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148 ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.\r
149 # @Prompt Configure base address of CPU Local APIC\r
abae030a 150 # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0\r
7798fb83 151 gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001\r
529a5a86 152\r
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153 ## Specifies delay value in microseconds after sending out an INIT IPI.\r
154 # @Prompt Configure delay value after send an INIT IPI\r
cf1eb6e6 155 gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002\r
529a5a86 156\r
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157 ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must\r
158 ## aligns the address on a 4-KByte boundary.\r
159 # @Prompt Configure stack size for Application Processor (AP)\r
160 gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003\r
7798fb83 161\r
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162 ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.\r
163 # @Prompt Stack size in the temporary RAM.\r
164 gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003\r
165\r
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166 ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.\r
167 # @Prompt SMM profile data buffer size.\r
168 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107\r
169\r
170 ## Specifies stack size in bytes for each processor in SMM.\r
171 # @Prompt Processor stack size in SMM.\r
172 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105\r
173\r
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174 ## Indicates if SMM Code Access Check is enabled.\r
175 # If enabled, the SMM handler cannot execute the code outside SMM regions.\r
176 # This PCD is suggested to TRUE in production image.<BR><BR>\r
177 # TRUE - SMM Code Access Check will be enabled.<BR>\r
178 # FALSE - SMM Code Access Check will be disabled.<BR>\r
179 # @Prompt SMM Code Access Check.\r
180 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013\r
181\r
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182 ## Specifies the number of variable MTRRs reserved for OS use. The default number of\r
183 # MTRRs reserved for OS use is 2.\r
184 # @Prompt Number of reserved variable MTRRs.\r
185 gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015\r
186\r
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187 ## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB.\r
188 # @Prompt STM exception stack size.\r
189 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111\r
190\r
191 ## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB.\r
192 # @Prompt MSEG size.\r
193 gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112\r
194\r
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195 ## Specifies the supported CPU features bit in array.\r
196 # @Prompt Supported CPU features.\r
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197 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x00000016\r
198\r
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199 ## Specifies if CPU features will be initialized after SMM relocation.\r
200 # @Prompt If CPU features will be initialized after SMM relocation.\r
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201 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitAfterSmmRelocation|FALSE|BOOLEAN|0x0000001C\r
202\r
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203 ## Specifies if CPU features will be initialized during S3 resume.\r
204 # @Prompt If CPU features will be initialized during S3 resume.\r
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205 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D\r
206\r
f79fcf45 207[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
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208 ## Specifies max supported number of Logical Processors.\r
209 # @Prompt Configure max supported number of Logical Processors\r
210 gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002\r
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211 ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.\r
212 # @Prompt Timeout for the BSP to detect all APs for the first time.\r
213 gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004\r
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214 ## Specifies the base address of the first microcode Patch in the microcode Region.\r
215 # @Prompt Microcode Region base address.\r
216 gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005\r
217 ## Specifies the size of the microcode Region.\r
218 # @Prompt Microcode Region size.\r
219 gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006\r
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220 ## Specifies the AP wait loop state during POST phase.\r
221 # The value is defined as below.<BR><BR>\r
222 # 1: Place AP in the Hlt-Loop state.<BR>\r
223 # 2: Place AP in the Mwait-Loop state.<BR>\r
224 # 3: Place AP in the Run-Loop state.<BR>\r
225 # @Prompt The AP wait loop state.\r
226 # @ValidRange 0x80000001 | 1 - 3\r
227 gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006\r
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228 ## Specifies the AP target C-state for Mwait during POST phase.\r
229 # The default value 0 means C1 state.\r
230 # The value is defined as below.<BR><BR>\r
231 # @Prompt The specified AP target C-state for Mwait.\r
232 gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007\r
f79fcf45 233\r
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234 ## Indicates if SMM uses static page table.\r
235 # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.<BR><BR>\r
236 # This flag only impacts X64 build, because SMM alway builds static page table for IA32.\r
237 # TRUE - SMM uses static page table for all memory.<BR>\r
238 # FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.<BR>\r
239 # @Prompt Use static page table for all memory in SMM.\r
240 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D\r
241\r
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242 ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.\r
243 # @Prompt AP synchronization timeout value in SMM.\r
244 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104\r
245\r
246 ## Indicates the CPU synchronization method used when processing an SMI.\r
247 # 0x00 - Traditional CPU synchronization method.<BR>\r
248 # 0x01 - Relaxed CPU synchronization method.<BR>\r
249 # @Prompt SMM CPU Synchronization Method.\r
250 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014\r
251\r
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252 ## Specifies user's desired settings for enabling/disabling processor features.\r
253 # @Prompt User settings for enabling/disabling processor features.\r
254 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000017\r
255\r
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256 ## Specifies the On-demand clock modulation duty cycle when ACPI feature is enabled.\r
257 # @Prompt The encoded values for target duty cycle modulation.\r
258 # @ValidRange 0x80000001 | 0 - 15\r
259 gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x0000001A\r
260\r
261 ## Indicates if the current boot is a power-on reset.<BR><BR>\r
262 # TRUE - Current boot is a power-on reset.<BR>\r
263 # FALSE - Current boot is not a power-on reset.<BR>\r
264 # @Prompt Current boot is a power-on reset.\r
265 gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B\r
266\r
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267[PcdsDynamic, PcdsDynamicEx]\r
268 ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.\r
269 # @Prompt The pointer to a CPU S3 data buffer.\r
270 # @ValidList 0x80000001 | 0\r
271 gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010\r
272\r
273 ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.\r
274 # @Prompt The pointer to CPU Hot Plug Data.\r
275 # @ValidList 0x80000001 | 0\r
276 gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011\r
277\r
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278 ## Indicates processor feature capabilities, each bit corresponding to a specific feature.\r
279 # @Prompt Processor feature capabilities.\r
280 # @ValidList 0x80000001 | 0\r
281 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018\r
282\r
283 ## Specifies actual settings for processor features, each bit corresponding to a specific feature.\r
284 # @Prompt Actual processor feature settings.\r
285 # @ValidList 0x80000001 | 0\r
286 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019\r
287\r
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288[UserExtensions.TianoCore."ExtraFiles"]\r
289 UefiCpuPkgExtra.uni\r