Commit | Line | Data |
---|---|---|
7798fb83 | 1 | ## @file UefiCpuPkg.dec\r |
7798fb83 HT |
2 | # This Package provides UEFI compatible CPU modules and libraries.\r |
3 | #\r | |
f79fcf45 | 4 | # Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r |
7798fb83 HT |
5 | #\r |
6 | # This program and the accompanying materials are licensed and made available under\r | |
7 | # the terms and conditions of the BSD License which accompanies this distribution.\r | |
8 | # The full text of the license may be found at\r | |
9 | # http://opensource.org/licenses/bsd-license.php\r | |
10 | #\r | |
11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | #\r | |
14 | ##\r | |
15 | \r | |
16 | [Defines]\r | |
17 | DEC_SPECIFICATION = 0x00010005\r | |
18 | PACKAGE_NAME = UefiCpuPkg\r | |
abae030a | 19 | PACKAGE_UNI_FILE = UefiCpuPkg.uni\r |
7798fb83 HT |
20 | PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23\r |
21 | PACKAGE_VERSION = 0.3\r | |
22 | \r | |
23 | [Includes]\r | |
24 | Include\r | |
25 | \r | |
26 | [LibraryClasses]\r | |
27 | ## @libraryclass Defines some routines that are generic for IA32 family CPU\r | |
28 | ## to be UEFI specification compliant.\r | |
29 | ##\r | |
30 | UefiCpuLib|Include/Library/UefiCpuLib.h\r | |
31 | \r | |
32 | [LibraryClasses.IA32, LibraryClasses.X64]\r | |
33 | ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.\r | |
34 | ##\r | |
35 | MtrrLib|Include/Library/MtrrLib.h\r | |
36 | \r | |
37 | ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.\r | |
38 | ##\r | |
39 | LocalApicLib|Include/Library/LocalApicLib.h\r | |
d947a4cc MK |
40 | \r |
41 | ## @libraryclass Provides platform specific initialization functions in the SEC phase.\r | |
42 | ##\r | |
43 | PlatformSecLib|Include/Library/PlatformSecLib.h\r | |
7798fb83 | 44 | \r |
406c7200 MK |
45 | ## @libraryclass Public include file for the SMM CPU Platform Hook Library.\r |
46 | ##\r | |
47 | SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h\r | |
48 | \r | |
49 | ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.\r | |
50 | ##\r | |
51 | SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h\r | |
52 | \r | |
7798fb83 HT |
53 | [Guids]\r |
54 | gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}\r | |
55 | \r | |
406c7200 MK |
56 | [Protocols]\r |
57 | ## Include/Protocol/SmmCpuService.h\r | |
58 | gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}\r | |
59 | \r | |
abae030a LG |
60 | #\r |
61 | # [Error.gUefiCpuPkgTokenSpaceGuid]\r | |
62 | # 0x80000001 | Invalid value provided.\r | |
63 | #\r | |
64 | \r | |
7798fb83 | 65 | [PcdsFixedAtBuild, PcdsPatchableInModule]\r |
abae030a LG |
66 | ## This value is the CPU Local Apic base address, which aligns the address on a 4-KByte boundary.\r |
67 | # @Prompt Configure base address of CPU Local Apic\r | |
68 | # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0\r | |
7798fb83 | 69 | gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001\r |
abae030a LG |
70 | ## Specifies delay value in microseconds after sending out an INIT IPI.\r |
71 | # @Prompt Configure delay value after send an INIT IPI\r | |
cf1eb6e6 | 72 | gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002\r |
6a26a597 CF |
73 | ## Specifies max supported number of Logical Processors.\r |
74 | # @Prompt Configure max supported number of Logical Processorss\r | |
75 | gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002\r | |
76 | ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must\r | |
77 | ## aligns the address on a 4-KByte boundary.\r | |
78 | # @Prompt Configure stack size for Application Processor (AP)\r | |
79 | gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003\r | |
7798fb83 | 80 | \r |
d947a4cc MK |
81 | ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.\r |
82 | # @Prompt Stack size in the temporary RAM.\r | |
83 | gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003\r | |
84 | \r | |
f79fcf45 JF |
85 | [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r |
86 | ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.\r | |
87 | # @Prompt Timeout for the BSP to detect all APs for the first time.\r | |
88 | gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004\r | |
30314463 JF |
89 | ## Specifies the base address of the first microcode Patch in the microcode Region.\r |
90 | # @Prompt Microcode Region base address.\r | |
91 | gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005\r | |
92 | ## Specifies the size of the microcode Region.\r | |
93 | # @Prompt Microcode Region size.\r | |
94 | gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006\r | |
f79fcf45 | 95 | \r |
abae030a LG |
96 | [UserExtensions.TianoCore."ExtraFiles"]\r |
97 | UefiCpuPkgExtra.uni\r |