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UefiCpuPkg: Add PiSmmCpuDxeSmm module no IA32/X64 files
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7798fb83 1## @file UefiCpuPkg.dec\r
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2# This Package provides UEFI compatible CPU modules and libraries.\r
3#\r
f79fcf45 4# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
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5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License which accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14##\r
15\r
16[Defines]\r
17 DEC_SPECIFICATION = 0x00010005\r
18 PACKAGE_NAME = UefiCpuPkg\r
abae030a 19 PACKAGE_UNI_FILE = UefiCpuPkg.uni\r
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20 PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23\r
21 PACKAGE_VERSION = 0.3\r
22\r
23[Includes]\r
24 Include\r
25\r
26[LibraryClasses]\r
27 ## @libraryclass Defines some routines that are generic for IA32 family CPU\r
28 ## to be UEFI specification compliant.\r
29 ##\r
30 UefiCpuLib|Include/Library/UefiCpuLib.h\r
31\r
32[LibraryClasses.IA32, LibraryClasses.X64]\r
33 ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.\r
34 ##\r
35 MtrrLib|Include/Library/MtrrLib.h\r
36\r
37 ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.\r
38 ##\r
39 LocalApicLib|Include/Library/LocalApicLib.h\r
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40\r
41 ## @libraryclass Provides platform specific initialization functions in the SEC phase.\r
42 ##\r
43 PlatformSecLib|Include/Library/PlatformSecLib.h\r
529a5a86 44\r
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45 ## @libraryclass Public include file for the SMM CPU Platform Hook Library.\r
46 ##\r
47 SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h\r
529a5a86 48\r
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49 ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.\r
50 ##\r
51 SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h\r
52\r
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53[Guids]\r
54 gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}\r
55\r
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56[Protocols]\r
57 ## Include/Protocol/SmmCpuService.h\r
58 gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}\r
529a5a86 59\r
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60#\r
61# [Error.gUefiCpuPkgTokenSpaceGuid]\r
62# 0x80000001 | Invalid value provided.\r
63#\r
64\r
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65[PcdsFeatureFlag]\r
66 ## Indicates if SMM Profile will be enabled.\r
67 # If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.\r
68 # This PCD is only for validation purpose. It should be set to false in production.<BR><BR>\r
69 # TRUE - SMM Profile will be enabled.<BR>\r
70 # FALSE - SMM Profile will be disabled.<BR>\r
71 # @Prompt Enable SMM Profile.\r
72 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109\r
73\r
74 ## Indicates if the SMM profile log buffer is a ring buffer.\r
75 # If disabled, no additional log can be done when the buffer is full.<BR><BR>\r
76 # TRUE - the SMM profile log buffer is a ring buffer.<BR>\r
77 # FALSE - the SMM profile log buffer is a normal buffer.<BR>\r
78 # @Prompt The SMM profile log buffer is a ring buffer.\r
79 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a\r
80\r
81 ## Indicates if SMM Startup AP in a blocking fashion.\r
82 # TRUE - SMM Startup AP in a blocking fashion.<BR>\r
83 # FALSE - SMM Startup AP in a non-blocking fashion.<BR>\r
84 # @Prompt SMM Startup AP in a blocking fashion.\r
85 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108\r
86\r
87 ## Indicates if SMM Stack Guard will be enabled.\r
88 # If enabled, stack overflow in SMM can be caught which eases debugging.<BR><BR>\r
89 # TRUE - SMM Stack Guard will be enabled.<BR>\r
90 # FALSE - SMM Stack Guard will be disabled.<BR>\r
91 # @Prompt Enable SMM Stack Guard.\r
92 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|FALSE|BOOLEAN|0x1000001C\r
93\r
94 ## Indicates if BSP election in SMM will be enabled.\r
95 # If enabled, a BSP will be dynamically elected among all processors in each SMI.\r
96 # Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>\r
97 # TRUE - BSP election in SMM will be enabled.<BR>\r
98 # FALSE - BSP election in SMM will be disabled.<BR>\r
99 # @Prompt Enable BSP election in SMM.\r
100 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106\r
101\r
102 ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>\r
103 # TRUE - SMM CPU hot-plug will be enabled.<BR>\r
104 # FALSE - SMM CPU hot-plug will be disabled.<BR>\r
105 # @Prompt SMM CPU hot-plug.\r
106 gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C\r
107\r
108 ## Indicates if SMM Debug will be enabled.\r
109 # If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>\r
110 # TRUE - SMM Debug will be enabled.<BR>\r
111 # FALSE - SMM Debug will be disabled.<BR>\r
112 # @Prompt Enable SMM Debug.\r
113 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B\r
114\r
115 ## Indicates if lock SMM Feature Control MSR.<BR><BR>\r
116 # TRUE - SMM Feature Control MSR will be locked.<BR>\r
117 # FALSE - SMM Feature Control MSR will not be locked.<BR>\r
118 # @Prompt Lock SMM Feature Control MSR.\r
119 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B\r
120\r
7798fb83 121[PcdsFixedAtBuild, PcdsPatchableInModule]\r
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122 ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.\r
123 # @Prompt Configure base address of CPU Local APIC\r
abae030a 124 # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0\r
7798fb83 125 gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001\r
529a5a86 126\r
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127 ## Specifies delay value in microseconds after sending out an INIT IPI.\r
128 # @Prompt Configure delay value after send an INIT IPI\r
cf1eb6e6 129 gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002\r
529a5a86 130\r
6a26a597 131 ## Specifies max supported number of Logical Processors.\r
529a5a86 132 # @Prompt Configure max supported number of Logical Processors\r
6a26a597 133 gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002\r
529a5a86 134\r
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135 ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must\r
136 ## aligns the address on a 4-KByte boundary.\r
137 # @Prompt Configure stack size for Application Processor (AP)\r
138 gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003\r
7798fb83 139\r
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140 ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.\r
141 # @Prompt Stack size in the temporary RAM.\r
142 gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003\r
143\r
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144 ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.\r
145 # @Prompt SMM profile data buffer size.\r
146 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107\r
147\r
148 ## Specifies stack size in bytes for each processor in SMM.\r
149 # @Prompt Processor stack size in SMM.\r
150 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105\r
151\r
152 ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.\r
153 # @Prompt AP synchronization timeout value in SMM.\r
154 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104\r
155\r
156 ## Indicates if SMM Code Access Check is enabled.\r
157 # If enabled, the SMM handler cannot execute the code outside SMM regions.\r
158 # This PCD is suggested to TRUE in production image.<BR><BR>\r
159 # TRUE - SMM Code Access Check will be enabled.<BR>\r
160 # FALSE - SMM Code Access Check will be disabled.<BR>\r
161 # @Prompt SMM Code Access Check.\r
162 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013\r
163\r
164 ## Indicates the CPU synchronization method used when processing an SMI.\r
165 # 0x00 - Traditional CPU synchronization method.<BR>\r
166 # 0x01 - Relaxed CPU synchronization method.<BR>\r
167 # @Prompt SMM CPU Synchronization Method.\r
168 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014\r
169\r
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170[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
171 ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.\r
172 # @Prompt Timeout for the BSP to detect all APs for the first time.\r
173 gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004\r
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174 ## Specifies the base address of the first microcode Patch in the microcode Region.\r
175 # @Prompt Microcode Region base address.\r
176 gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005\r
177 ## Specifies the size of the microcode Region.\r
178 # @Prompt Microcode Region size.\r
179 gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006\r
f79fcf45 180\r
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181[PcdsDynamic, PcdsDynamicEx]\r
182 ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.\r
183 # @Prompt The pointer to a CPU S3 data buffer.\r
184 # @ValidList 0x80000001 | 0\r
185 gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010\r
186\r
187 ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.\r
188 # @Prompt The pointer to CPU Hot Plug Data.\r
189 # @ValidList 0x80000001 | 0\r
190 gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011\r
191\r
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192[UserExtensions.TianoCore."ExtraFiles"]\r
193 UefiCpuPkgExtra.uni\r