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1f569620 1/** @file\r
e48e0742 2 This module produces the EFI_PEI_S3_RESUME2_PPI.\r
1f569620 3 This module works with StandAloneBootScriptExecutor to S3 resume to OS.\r
438f1766 4 This module will execute the boot script saved during last boot and after that,\r
1f569620 5 control is passed to OS waking up handler.\r
6\r
c5719579 7 Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
787a085b 8 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
1f569620 9\r
10 This program and the accompanying materials\r
11 are licensed and made available under the terms and conditions\r
12 of the BSD License which accompanies this distribution. The\r
13 full text of the license may be found at\r
14 http://opensource.org/licenses/bsd-license.php\r
15\r
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
18\r
19**/\r
20\r
21#include <PiPei.h>\r
22\r
23#include <Guid/AcpiS3Context.h>\r
24#include <Guid/BootScriptExecutorVariable.h>\r
25#include <Guid/Performance.h>\r
a85e7127 26#include <Guid/EndOfS3Resume.h>\r
1f569620 27#include <Ppi/ReadOnlyVariable2.h>\r
28#include <Ppi/S3Resume2.h>\r
29#include <Ppi/SmmAccess.h>\r
30#include <Ppi/PostBootScriptTable.h>\r
31#include <Ppi/EndOfPeiPhase.h>\r
18b13fab
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32#include <Ppi/SmmCommunication.h>\r
33\r
1f569620 34#include <Library/DebugLib.h>\r
35#include <Library/BaseLib.h>\r
36#include <Library/TimerLib.h>\r
37#include <Library/PeimEntryPoint.h>\r
38#include <Library/PeiServicesLib.h>\r
39#include <Library/HobLib.h>\r
40#include <Library/PerformanceLib.h>\r
41#include <Library/PeiServicesTablePointerLib.h>\r
42#include <Library/IoLib.h>\r
43#include <Library/BaseMemoryLib.h>\r
44#include <Library/MemoryAllocationLib.h>\r
45#include <Library/PcdLib.h>\r
46#include <Library/DebugAgentLib.h>\r
47#include <Library/LocalApicLib.h>\r
48#include <Library/ReportStatusCodeLib.h>\r
49#include <Library/PrintLib.h>\r
c56b6566 50#include <Library/HobLib.h>\r
1f569620 51#include <Library/LockBoxLib.h>\r
52#include <IndustryStandard/Acpi.h>\r
53\r
f98f5ec3
LE
54/**\r
55 This macro aligns the address of a variable with auto storage\r
56 duration down to CPU_STACK_ALIGNMENT.\r
57\r
58 Since the stack grows downward, the result preserves more of the\r
59 stack than the original address (or the same amount), not less.\r
60**/\r
61#define STACK_ALIGN_DOWN(Ptr) \\r
62 ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))\r
63\r
787a085b
LD
64#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r
65\r
1f569620 66#pragma pack(1)\r
67typedef union {\r
68 struct {\r
69 UINT32 LimitLow : 16;\r
70 UINT32 BaseLow : 16;\r
71 UINT32 BaseMid : 8;\r
72 UINT32 Type : 4;\r
73 UINT32 System : 1;\r
74 UINT32 Dpl : 2;\r
75 UINT32 Present : 1;\r
76 UINT32 LimitHigh : 4;\r
77 UINT32 Software : 1;\r
78 UINT32 Reserved : 1;\r
79 UINT32 DefaultSize : 1;\r
80 UINT32 Granularity : 1;\r
81 UINT32 BaseHigh : 8;\r
82 } Bits;\r
83 UINT64 Uint64;\r
84} IA32_GDT;\r
85\r
86//\r
87// Page-Map Level-4 Offset (PML4) and\r
88// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB\r
89//\r
90typedef union {\r
91 struct {\r
92 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
93 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
94 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
95 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
96 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
97 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
98 UINT64 Reserved:1; // Reserved\r
99 UINT64 MustBeZero:2; // Must Be Zero\r
100 UINT64 Available:3; // Available for use by system software\r
101 UINT64 PageTableBaseAddress:40; // Page Table Base Address\r
102 UINT64 AvabilableHigh:11; // Available for use by system software\r
103 UINT64 Nx:1; // No Execute bit\r
104 } Bits;\r
105 UINT64 Uint64;\r
106} PAGE_MAP_AND_DIRECTORY_POINTER;\r
107\r
108//\r
109// Page Table Entry 2MB\r
110//\r
111typedef union {\r
112 struct {\r
113 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
114 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
115 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
116 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
117 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
118 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
119 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
120 UINT64 MustBe1:1; // Must be 1 \r
121 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
122 UINT64 Available:3; // Available for use by system software\r
123 UINT64 PAT:1; //\r
124 UINT64 MustBeZero:8; // Must be zero;\r
125 UINT64 PageTableBaseAddress:31; // Page Table Base Address\r
126 UINT64 AvabilableHigh:11; // Available for use by system software\r
127 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
128 } Bits;\r
129 UINT64 Uint64;\r
130} PAGE_TABLE_ENTRY;\r
131\r
c56b6566
JY
132//\r
133// Page Table Entry 1GB\r
134//\r
135typedef union {\r
136 struct {\r
137 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
138 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
139 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
140 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
141 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
142 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
143 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
144 UINT64 MustBe1:1; // Must be 1 \r
145 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
146 UINT64 Available:3; // Available for use by system software\r
147 UINT64 PAT:1; //\r
148 UINT64 MustBeZero:17; // Must be zero;\r
149 UINT64 PageTableBaseAddress:22; // Page Table Base Address\r
150 UINT64 AvabilableHigh:11; // Available for use by system software\r
151 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
152 } Bits;\r
153 UINT64 Uint64;\r
154} PAGE_TABLE_1G_ENTRY;\r
155\r
18b13fab
ED
156//\r
157// Define two type of smm communicate headers.\r
a85e7127 158// One for 32 bits PEI + 64 bits DXE, the other for 32 bits PEI + 32 bits DXE case.\r
18b13fab
ED
159//\r
160typedef struct {\r
161 EFI_GUID HeaderGuid;\r
162 UINT32 MessageLength;\r
163 UINT8 Data[1];\r
164} SMM_COMMUNICATE_HEADER_32;\r
165\r
166typedef struct {\r
167 EFI_GUID HeaderGuid;\r
168 UINT64 MessageLength;\r
169 UINT8 Data[1];\r
170} SMM_COMMUNICATE_HEADER_64;\r
171\r
1f569620 172#pragma pack()\r
173\r
174//\r
175// Function prototypes\r
176//\r
177/**\r
178 a ASM function to transfer control to OS.\r
179 \r
180 @param S3WakingVector The S3 waking up vector saved in ACPI Facs table\r
181 @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer \r
182**/\r
183typedef\r
184VOID\r
185(EFIAPI *ASM_TRANSFER_CONTROL) (\r
186 IN UINT32 S3WakingVector,\r
187 IN UINT32 AcpiLowMemoryBase\r
188 );\r
189\r
190/**\r
191 Restores the platform to its preboot configuration for an S3 resume and\r
192 jumps to the OS waking vector.\r
193\r
194 This function will restore the platform to its pre-boot configuration that was\r
195 pre-stored in the boot script table and transfer control to OS waking vector.\r
196 Upon invocation, this function is responsible for locating the following\r
197 information before jumping to OS waking vector:\r
198 - ACPI tables\r
199 - boot script table\r
200 - any other information that it needs\r
201\r
202 The S3RestoreConfig() function then executes the pre-stored boot script table\r
203 and transitions the platform to the pre-boot state. The boot script is recorded\r
204 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r
205 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r
206 transfers control to the OS waking vector. If the OS supports only a real-mode\r
207 waking vector, this function will switch from flat mode to real mode before\r
208 jumping to the waking vector. If all platform pre-boot configurations are\r
209 successfully restored and all other necessary information is ready, this\r
210 function will never return and instead will directly jump to the OS waking\r
211 vector. If this function returns, it indicates that the attempt to resume\r
212 from the ACPI S3 sleep state failed.\r
213\r
214 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r
215\r
216 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r
217 @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r
218 resume boot path could not be located.\r
219\r
220**/\r
221EFI_STATUS\r
222EFIAPI\r
223S3RestoreConfig2 (\r
224 IN EFI_PEI_S3_RESUME2_PPI *This\r
225 );\r
226\r
abef469f 227/**\r
228 Set data segment selectors value including DS/ES/FS/GS/SS.\r
229\r
230 @param[in] SelectorValue Segment selector value to be set.\r
231\r
232**/\r
233VOID\r
234EFIAPI\r
235AsmSetDataSelectors (\r
236 IN UINT16 SelectorValue\r
237 );\r
238\r
1f569620 239//\r
240// Globals\r
241//\r
242EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };\r
243\r
244EFI_PEI_PPI_DESCRIPTOR mPpiList = {\r
245 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
246 &gEfiPeiS3Resume2PpiGuid,\r
247 &mS3ResumePpi\r
248};\r
249\r
250EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {\r
251 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
252 &gPeiPostScriptTablePpiGuid,\r
253 0\r
254};\r
255\r
256EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {\r
257 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
258 &gEfiEndOfPeiSignalPpiGuid,\r
259 0\r
260};\r
261\r
262//\r
263// Global Descriptor Table (GDT)\r
264//\r
265GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r
266/* selector { Global Segment Descriptor } */\r
267/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
268/* 0x08 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
269/* 0x10 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},\r
270/* 0x18 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},\r
271/* 0x20 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
272/* 0x28 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},\r
273/* 0x30 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},\r
274/* 0x38 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}},\r
275/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
276};\r
277\r
abef469f 278#define DATA_SEGEMENT_SELECTOR 0x18\r
279\r
1f569620 280//\r
281// IA32 Gdt register\r
282//\r
283GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {\r
284 sizeof (mGdtEntries) - 1,\r
285 (UINTN) mGdtEntries\r
286 };\r
287\r
288/**\r
289 Performance measure function to get S3 detailed performance data.\r
290\r
291 This function will getS3 detailed performance data and saved in pre-reserved ACPI memory.\r
292**/\r
293VOID\r
294WriteToOsS3PerformanceData (\r
295 VOID\r
296 )\r
297{\r
298 EFI_STATUS Status;\r
299 EFI_PHYSICAL_ADDRESS mAcpiLowMemoryBase;\r
300 PERF_HEADER *PerfHeader;\r
301 PERF_DATA *PerfData;\r
302 UINT64 Ticker;\r
303 UINTN Index;\r
304 EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;\r
305 UINTN VarSize;\r
306 UINTN LogEntryKey;\r
307 CONST VOID *Handle;\r
308 CONST CHAR8 *Token;\r
309 CONST CHAR8 *Module;\r
310 UINT64 StartTicker;\r
311 UINT64 EndTicker;\r
312 UINT64 StartValue;\r
313 UINT64 EndValue;\r
314 BOOLEAN CountUp;\r
315 UINT64 Freq;\r
316\r
317 //\r
438f1766 318 // Retrieve time stamp count as early as possible\r
1f569620 319 //\r
320 Ticker = GetPerformanceCounter ();\r
321\r
322 Freq = GetPerformanceCounterProperties (&StartValue, &EndValue);\r
323\r
324 Freq = DivU64x32 (Freq, 1000);\r
325\r
326 Status = PeiServicesLocatePpi (\r
327 &gEfiPeiReadOnlyVariable2PpiGuid,\r
328 0,\r
329 NULL,\r
330 (VOID **) &VariableServices\r
331 );\r
40ef06fc
SZ
332 if (EFI_ERROR (Status)) {\r
333 return;\r
334 }\r
1f569620 335\r
336 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r
337 Status = VariableServices->GetVariable (\r
338 VariableServices,\r
339 L"PerfDataMemAddr",\r
340 &gPerformanceProtocolGuid,\r
341 NULL,\r
342 &VarSize,\r
343 &mAcpiLowMemoryBase\r
344 );\r
345 if (EFI_ERROR (Status)) {\r
346 DEBUG ((EFI_D_ERROR, "Fail to retrieve variable to log S3 performance data \n"));\r
347 return;\r
348 }\r
349\r
350 PerfHeader = (PERF_HEADER *) (UINTN) mAcpiLowMemoryBase;\r
351\r
352 if (PerfHeader->Signiture != PERFORMANCE_SIGNATURE) {\r
353 DEBUG ((EFI_D_ERROR, "Performance data in ACPI memory get corrupted! \n"));\r
354 return;\r
355 }\r
356\r
357 //\r
358 // Record total S3 resume time.\r
359 //\r
360 if (EndValue >= StartValue) {\r
361 PerfHeader->S3Resume = Ticker - StartValue;\r
362 CountUp = TRUE;\r
363 } else {\r
364 PerfHeader->S3Resume = StartValue - Ticker;\r
365 CountUp = FALSE;\r
366 }\r
367\r
368 //\r
369 // Get S3 detailed performance data\r
370 //\r
371 Index = 0;\r
372 LogEntryKey = 0;\r
373 while ((LogEntryKey = GetPerformanceMeasurement (\r
374 LogEntryKey,\r
375 &Handle,\r
376 &Token,\r
377 &Module,\r
378 &StartTicker,\r
379 &EndTicker)) != 0) {\r
380 if (EndTicker != 0) {\r
381 PerfData = &PerfHeader->S3Entry[Index];\r
382\r
383 //\r
384 // Use File Handle to specify the different performance log for PEIM.\r
385 // File Handle is the base address of PEIM FFS file.\r
386 //\r
387 if ((AsciiStrnCmp (Token, "PEIM", PEI_PERFORMANCE_STRING_SIZE) == 0) && (Handle != NULL)) {\r
388 AsciiSPrint (PerfData->Token, PERF_TOKEN_LENGTH, "0x%11p", Handle);\r
389 } else {\r
c1fd37cd 390 AsciiStrnCpyS (PerfData->Token, PERF_TOKEN_SIZE, Token, PERF_TOKEN_LENGTH);\r
1f569620 391 }\r
392 if (StartTicker == 1) {\r
393 StartTicker = StartValue;\r
394 }\r
395 if (EndTicker == 1) {\r
396 EndTicker = StartValue;\r
397 }\r
398 Ticker = CountUp? (EndTicker - StartTicker) : (StartTicker - EndTicker);\r
399 PerfData->Duration = (UINT32) DivU64x32 (Ticker, (UINT32) Freq);\r
400\r
401 //\r
402 // Only Record > 1ms performance data so that more big performance can be recorded.\r
403 //\r
404 if ((Ticker > Freq) && (++Index >= PERF_PEI_ENTRY_MAX_NUM)) {\r
405 //\r
406 // Reach the maximum number of PEI performance log entries.\r
407 //\r
408 break;\r
409 }\r
410 }\r
411 }\r
412 PerfHeader->S3EntryNum = (UINT32) Index;\r
413}\r
414\r
d0bf5623
JY
415/**\r
416 The function will check if current waking vector is long mode.\r
417\r
418 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
419\r
420 @retval TRUE Current context need long mode waking vector.\r
421 @retval FALSE Current context need not long mode waking vector.\r
422**/\r
423BOOLEAN\r
424IsLongModeWakingVector (\r
425 IN ACPI_S3_CONTEXT *AcpiS3Context\r
426 )\r
427{\r
428 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r
429\r
430 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r
431 if ((Facs == NULL) ||\r
432 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r
433 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r
434 // Something wrong with FACS\r
435 return FALSE;\r
436 }\r
437 if (Facs->XFirmwareWakingVector != 0) {\r
438 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r
439 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r
440 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r
441 // Both BIOS and OS wants 64bit vector\r
442 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
443 return TRUE;\r
444 }\r
445 }\r
446 }\r
447 return FALSE;\r
448}\r
449\r
18b13fab
ED
450/**\r
451 Send EndOfS3Resume event to SmmCore through communication buffer way.\r
452\r
453 @retval EFI_SUCCESS Return send the event success.\r
454**/\r
455EFI_STATUS\r
456SignalEndOfS3Resume (\r
457 VOID\r
458 )\r
459{\r
460 EFI_STATUS Status;\r
461 EFI_PEI_SMM_COMMUNICATION_PPI *SmmCommunicationPpi;\r
462 UINTN CommSize;\r
463 SMM_COMMUNICATE_HEADER_32 Header32;\r
464 SMM_COMMUNICATE_HEADER_64 Header64;\r
465 VOID *CommBuffer;\r
466\r
152e8d76 467 DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Enter\n"));\r
18b13fab
ED
468\r
469 //\r
470 // This buffer consumed in DXE phase, so base on DXE mode to prepare communicate buffer.\r
471 // Detect whether DXE is 64 bits mode.\r
472 // if (sizeof(UINTN) == sizeof(UINT64), PEI already 64 bits, assume DXE also 64 bits.\r
a85e7127 473 // or (FeaturePcdGet (PcdDxeIplSwitchToLongMode)), DXE will switch to 64 bits.\r
18b13fab
ED
474 //\r
475 if ((sizeof(UINTN) == sizeof(UINT64)) || (FeaturePcdGet (PcdDxeIplSwitchToLongMode))) {\r
476 CommBuffer = &Header64;\r
477 Header64.MessageLength = 0;\r
478 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_64, Data);\r
479 } else {\r
480 CommBuffer = &Header32;\r
481 Header32.MessageLength = 0;\r
482 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_32, Data);\r
483 }\r
a85e7127 484 CopyGuid (CommBuffer, &gEdkiiEndOfS3ResumeGuid);\r
18b13fab 485\r
18b13fab
ED
486 Status = PeiServicesLocatePpi (\r
487 &gEfiPeiSmmCommunicationPpiGuid,\r
488 0,\r
489 NULL,\r
490 (VOID **)&SmmCommunicationPpi\r
491 );\r
152e8d76
ED
492 if (EFI_ERROR (Status)) {\r
493 DEBUG ((DEBUG_ERROR, "Locate Smm Communicate Ppi failed (%r)!\n", Status));\r
494 return Status;\r
495 }\r
18b13fab 496\r
18b13fab
ED
497 Status = SmmCommunicationPpi->Communicate (\r
498 SmmCommunicationPpi,\r
499 (VOID *)CommBuffer,\r
500 &CommSize\r
501 );\r
152e8d76
ED
502 if (EFI_ERROR (Status)) {\r
503 DEBUG ((DEBUG_ERROR, "SmmCommunicationPpi->Communicate return failure (%r)!\n", Status));\r
504 }\r
18b13fab 505\r
152e8d76 506 DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Exit (%r)\n", Status));\r
18b13fab
ED
507 return Status;\r
508}\r
509\r
1f569620 510/**\r
511 Jump to OS waking vector.\r
512 The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.\r
513\r
514 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
515 @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE\r
516**/\r
517VOID\r
518EFIAPI\r
519S3ResumeBootOs (\r
520 IN ACPI_S3_CONTEXT *AcpiS3Context,\r
521 IN PEI_S3_RESUME_STATE *PeiS3ResumeState\r
522 )\r
523{\r
524 EFI_STATUS Status;\r
525 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r
526 ASM_TRANSFER_CONTROL AsmTransferControl;\r
527 UINTN TempStackTop;\r
528 UINTN TempStack[0x10];\r
529\r
530 //\r
531 // Restore IDT\r
532 //\r
533 AsmWriteIdtr (&PeiS3ResumeState->Idtr);\r
534\r
f6d5cbe7 535 if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {\r
536 //\r
537 // Report Status code that boot script execution is failed\r
538 //\r
539 REPORT_STATUS_CODE (\r
540 EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
541 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)\r
542 );\r
543 }\r
544\r
f5c941b1 545 //\r
546 // NOTE: Because Debug Timer interrupt and system interrupts will be disabled \r
547 // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted\r
548 // by soft debugger.\r
549 //\r
550\r
5c0687cc
SZ
551 PERF_END (NULL, "ScriptExec", NULL, 0);\r
552\r
1f569620 553 //\r
554 // Install BootScriptDonePpi\r
555 //\r
556 Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);\r
557 ASSERT_EFI_ERROR (Status);\r
558\r
559 //\r
560 // Get ACPI Table Address\r
561 //\r
562 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r
563\r
564 if ((Facs == NULL) ||\r
565 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r
566 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r
f6d5cbe7 567 //\r
568 // Report Status code that no valid vector is found\r
569 //\r
570 REPORT_STATUS_CODE (\r
571 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
572 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r
573 );\r
1f569620 574 CpuDeadLoop ();\r
575 return ;\r
576 }\r
577\r
1f569620 578 //\r
579 // Install EndOfPeiPpi\r
580 //\r
581 Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);\r
582 ASSERT_EFI_ERROR (Status);\r
583\r
18b13fab
ED
584 //\r
585 // Signal EndOfS3Resume event.\r
586 //\r
152e8d76 587 SignalEndOfS3Resume ();\r
18b13fab 588\r
26c0ba77
SZ
589 //\r
590 // report status code on S3 resume\r
591 //\r
592 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);\r
593\r
1f569620 594 PERF_CODE (\r
595 WriteToOsS3PerformanceData ();\r
596 );\r
597\r
598 AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;\r
599 if (Facs->XFirmwareWakingVector != 0) {\r
600 //\r
601 // Switch to native waking vector\r
602 //\r
603 TempStackTop = (UINTN)&TempStack + sizeof(TempStack);\r
af34c106
JF
604 DEBUG ((\r
605 DEBUG_INFO,\r
606 "%a() Stack Base: 0x%x, Stack Size: 0x%x\n",\r
607 __FUNCTION__,\r
608 TempStackTop,\r
609 sizeof (TempStack)\r
610 ));\r
1f569620 611 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r
612 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r
613 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r
614 //\r
615 // X64 long mode waking vector\r
616 //\r
c5719579 617 DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r
1f569620 618 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
619 AsmEnablePaging64 (\r
620 0x38,\r
621 Facs->XFirmwareWakingVector,\r
622 0,\r
623 0,\r
624 (UINT64)(UINTN)TempStackTop\r
625 );\r
626 } else {\r
f6d5cbe7 627 //\r
628 // Report Status code that no valid waking vector is found\r
629 //\r
630 REPORT_STATUS_CODE (\r
631 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
632 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r
633 );\r
1f569620 634 DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));\r
635 ASSERT (FALSE);\r
f6d5cbe7 636 CpuDeadLoop ();\r
637 return ;\r
1f569620 638 }\r
639 } else {\r
640 //\r
641 // IA32 protected mode waking vector (Page disabled)\r
642 //\r
c5719579 643 DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r
1f569620 644 SwitchStack (\r
645 (SWITCH_STACK_ENTRY_POINT) (UINTN) Facs->XFirmwareWakingVector,\r
646 NULL,\r
647 NULL,\r
648 (VOID *)(UINTN)TempStackTop\r
649 );\r
650 }\r
651 } else {\r
652 //\r
653 // 16bit Realmode waking vector\r
654 //\r
c5719579 655 DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));\r
1f569620 656 AsmTransferControl (Facs->FirmwareWakingVector, 0x0);\r
657 }\r
658\r
f6d5cbe7 659 //\r
660 // Report Status code the failure of S3Resume\r
661 //\r
662 REPORT_STATUS_CODE (\r
663 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
664 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r
665 );\r
666\r
1f569620 667 //\r
668 // Never run to here\r
669 //\r
670 CpuDeadLoop();\r
671}\r
672\r
673/**\r
674 Restore S3 page table because we do not trust ACPINvs content.\r
675 If BootScriptExector driver will not run in 64-bit mode, this function will do nothing. \r
676\r
677 @param S3NvsPageTableAddress PageTableAddress in ACPINvs\r
d0bf5623 678 @param Build4GPageTableOnly If BIOS just build 4G page table only\r
1f569620 679**/\r
680VOID\r
681RestoreS3PageTables (\r
d0bf5623
JY
682 IN UINTN S3NvsPageTableAddress,\r
683 IN BOOLEAN Build4GPageTableOnly\r
1f569620 684 )\r
685{\r
686 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
687 UINT32 RegEax;\r
c56b6566 688 UINT32 RegEdx;\r
1f569620 689 UINT8 PhysicalAddressBits;\r
690 EFI_PHYSICAL_ADDRESS PageAddress;\r
691 UINTN IndexOfPml4Entries;\r
692 UINTN IndexOfPdpEntries;\r
693 UINTN IndexOfPageDirectoryEntries;\r
c56b6566
JY
694 UINT32 NumberOfPml4EntriesNeeded;\r
695 UINT32 NumberOfPdpEntriesNeeded;\r
1f569620 696 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;\r
697 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r
698 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r
699 PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
c56b6566
JY
700 VOID *Hob;\r
701 BOOLEAN Page1GSupport;\r
702 PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;\r
787a085b
LD
703 UINT64 AddressEncMask;\r
704\r
705 //\r
706 // Make sure AddressEncMask is contained to smallest supported address field\r
707 //\r
708 AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;\r
1f569620 709\r
710 //\r
711 // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.\r
712 // The whole page table is too large to be saved in SMRAM.\r
713 //\r
438f1766 714 // The assumption is : whole page table is allocated in CONTINUOUS memory and CR3 points to TOP page.\r
1f569620 715 //\r
c5719579 716 DEBUG ((DEBUG_INFO, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));\r
1f569620 717\r
718 //\r
438f1766 719 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.\r
1f569620 720 //\r
721 PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r
722 S3NvsPageTableAddress += SIZE_4KB;\r
723 \r
c56b6566 724 Page1GSupport = FALSE;\r
378175d2
JY
725 if (PcdGetBool(PcdUse1GPageTable)) {\r
726 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
727 if (RegEax >= 0x80000001) {\r
728 AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r
729 if ((RegEdx & BIT26) != 0) {\r
730 Page1GSupport = TRUE;\r
731 }\r
c56b6566
JY
732 }\r
733 }\r
734 \r
1f569620 735 //\r
736 // Get physical address bits supported.\r
737 //\r
c56b6566
JY
738 Hob = GetFirstHob (EFI_HOB_TYPE_CPU);\r
739 if (Hob != NULL) {\r
740 PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;\r
1f569620 741 } else {\r
c56b6566
JY
742 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
743 if (RegEax >= 0x80000008) {\r
744 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
745 PhysicalAddressBits = (UINT8) RegEax;\r
746 } else {\r
747 PhysicalAddressBits = 36;\r
748 }\r
1f569620 749 }\r
750 \r
c56b6566
JY
751 //\r
752 // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.\r
753 //\r
754 ASSERT (PhysicalAddressBits <= 52);\r
755 if (PhysicalAddressBits > 48) {\r
756 PhysicalAddressBits = 48;\r
757 }\r
758\r
d0bf5623
JY
759 //\r
760 // NOTE: In order to save time to create full page table, we just create 4G page table by default.\r
761 // And let PF handler in BootScript driver to create more on request.\r
762 //\r
763 if (Build4GPageTableOnly) {\r
764 PhysicalAddressBits = 32;\r
765 ZeroMem (PageMap, EFI_PAGES_TO_SIZE(2));\r
766 }\r
1f569620 767 //\r
768 // Calculate the table entries needed.\r
769 //\r
770 if (PhysicalAddressBits <= 39) {\r
771 NumberOfPml4EntriesNeeded = 1;\r
c56b6566 772 NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));\r
1f569620 773 } else {\r
c56b6566 774 NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));\r
1f569620 775 NumberOfPdpEntriesNeeded = 512;\r
776 }\r
777 \r
778 PageMapLevel4Entry = PageMap;\r
779 PageAddress = 0;\r
780 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r
781 //\r
782 // Each PML4 entry points to a page of Page Directory Pointer entires.\r
783 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.\r
784 //\r
785 PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r
786 S3NvsPageTableAddress += SIZE_4KB;\r
787 \r
788 //\r
789 // Make a PML4 Entry\r
790 //\r
787a085b 791 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;\r
1f569620 792 PageMapLevel4Entry->Bits.ReadWrite = 1;\r
793 PageMapLevel4Entry->Bits.Present = 1;\r
c56b6566
JY
794\r
795 if (Page1GSupport) {\r
54d3b84e 796 PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;\r
1f569620 797 \r
c56b6566 798 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {\r
1f569620 799 //\r
800 // Fill in the Page Directory entries\r
801 //\r
787a085b 802 PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
c56b6566
JY
803 PageDirectory1GEntry->Bits.ReadWrite = 1;\r
804 PageDirectory1GEntry->Bits.Present = 1;\r
805 PageDirectory1GEntry->Bits.MustBe1 = 1;\r
806 }\r
807 } else {\r
808 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
809 //\r
810 // Each Directory Pointer entries points to a page of Page Directory entires.\r
811 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r
812 // \r
813 PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;\r
814 S3NvsPageTableAddress += SIZE_4KB;\r
815 \r
816 //\r
817 // Fill in a Page Directory Pointer Entries\r
818 //\r
787a085b 819 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r
c56b6566
JY
820 PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r
821 PageDirectoryPointerEntry->Bits.Present = 1;\r
822 \r
823 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {\r
824 //\r
825 // Fill in the Page Directory entries\r
826 //\r
787a085b 827 PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
c56b6566
JY
828 PageDirectoryEntry->Bits.ReadWrite = 1;\r
829 PageDirectoryEntry->Bits.Present = 1;\r
830 PageDirectoryEntry->Bits.MustBe1 = 1;\r
831 }\r
1f569620 832 }\r
833 }\r
834 }\r
835 return ;\r
836 } else {\r
837 //\r
838 // If DXE is running 32-bit mode, no need to establish page table.\r
839 //\r
840 return ;\r
841 }\r
842}\r
843\r
844/**\r
845 Jump to boot script executor driver.\r
846\r
847 The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.\r
848\r
849 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
850 @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in\r
851 boot script execute driver\r
852**/\r
853VOID\r
854EFIAPI\r
855S3ResumeExecuteBootScript (\r
856 IN ACPI_S3_CONTEXT *AcpiS3Context,\r
857 IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable\r
858 )\r
859{\r
860 EFI_STATUS Status;\r
861 PEI_SMM_ACCESS_PPI *SmmAccess;\r
862 UINTN Index;\r
863 VOID *GuidHob;\r
864 IA32_DESCRIPTOR *IdtDescriptor;\r
865 VOID *IdtBuffer;\r
866 PEI_S3_RESUME_STATE *PeiS3ResumeState;\r
abef469f 867 BOOLEAN InterruptStatus;\r
1f569620 868\r
c5719579 869 DEBUG ((DEBUG_INFO, "S3ResumeExecuteBootScript()\n"));\r
1f569620 870\r
871 //\r
872 // Attempt to use content from SMRAM first\r
873 //\r
874 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r
875 if (GuidHob != NULL) {\r
876 //\r
877 // Last step for SMM - send SMI for initialization\r
878 //\r
879\r
880 //\r
881 // Send SMI to APs\r
882 // \r
883 SendSmiIpiAllExcludingSelf ();\r
884 //\r
885 // Send SMI to BSP\r
886 //\r
887 SendSmiIpi (GetApicId ());\r
888\r
889 Status = PeiServicesLocatePpi (\r
890 &gPeiSmmAccessPpiGuid,\r
891 0,\r
892 NULL,\r
893 (VOID **) &SmmAccess\r
894 );\r
40ef06fc 895 if (!EFI_ERROR (Status)) {\r
c5719579 896 DEBUG ((DEBUG_INFO, "Close all SMRAM regions before executing boot script\n"));\r
40ef06fc
SZ
897 \r
898 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r
899 Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r
900 }\r
1f569620 901\r
c5719579 902 DEBUG ((DEBUG_INFO, "Lock all SMRAM regions before executing boot script\n"));\r
40ef06fc
SZ
903 \r
904 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r
905 Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r
906 }\r
1f569620 907 }\r
908 }\r
909\r
910 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
1f569620 911 AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);\r
912 }\r
913\r
914 if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {\r
915 //\r
916 // On some platform, such as ECP, a dispatch node in boot script table may execute a 32-bit PEIM which may need PeiServices\r
917 // pointer. So PeiServices need preserve in (IDTBase- sizeof (UINTN)). \r
918 //\r
919 IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);\r
920 //\r
438f1766 921 // Make sure the newly allocated IDT align with 16-bytes\r
1f569620 922 // \r
923 IdtBuffer = AllocatePages (EFI_SIZE_TO_PAGES((IdtDescriptor->Limit + 1) + 16));\r
6f9760d8
SZ
924 if (IdtBuffer == NULL) {\r
925 REPORT_STATUS_CODE (\r
926 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
927 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)\r
928 );\r
929 ASSERT (FALSE);\r
930 }\r
e47459e6 931 //\r
932 // Additional 16 bytes allocated to save IA32 IDT descriptor and Pei Service Table Pointer\r
933 // IA32 IDT descriptor will be used to setup IA32 IDT table for 32-bit Framework Boot Script code\r
934 // \r
935 ZeroMem (IdtBuffer, 16);\r
936 AsmReadIdtr ((IA32_DESCRIPTOR *)IdtBuffer);\r
1f569620 937 CopyMem ((VOID*)((UINT8*)IdtBuffer + 16),(VOID*)(IdtDescriptor->Base), (IdtDescriptor->Limit + 1));\r
938 IdtDescriptor->Base = (UINTN)((UINT8*)IdtBuffer + 16);\r
939 *(UINTN*)(IdtDescriptor->Base - sizeof(UINTN)) = (UINTN)GetPeiServicesTablePointer ();\r
940 }\r
941\r
abef469f 942 InterruptStatus = SaveAndDisableInterrupts ();\r
1f569620 943 //\r
944 // Need to make sure the GDT is loaded with values that support long mode and real mode.\r
945 //\r
946 AsmWriteGdtr (&mGdt);\r
abef469f 947 //\r
948 // update segment selectors per the new GDT.\r
949 //\r
950 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r
951 //\r
952 // Restore interrupt state.\r
953 //\r
954 SetInterruptState (InterruptStatus);\r
1f569620 955\r
956 //\r
957 // Prepare data for return back\r
958 //\r
959 PeiS3ResumeState = AllocatePool (sizeof(*PeiS3ResumeState));\r
6f9760d8
SZ
960 if (PeiS3ResumeState == NULL) {\r
961 REPORT_STATUS_CODE (\r
962 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
963 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)\r
964 );\r
965 ASSERT (FALSE);\r
966 }\r
c5719579 967 DEBUG ((DEBUG_INFO, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));\r
1f569620 968 PeiS3ResumeState->ReturnCs = 0x10;\r
969 PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;\r
f98f5ec3 970 PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r
1f569620 971 //\r
972 // Save IDT\r
973 //\r
974 AsmReadIdtr (&PeiS3ResumeState->Idtr);\r
f6d5cbe7 975 \r
976 //\r
977 // Report Status Code to indicate S3 boot script execution\r
978 //\r
979 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);\r
1f569620 980\r
5c0687cc
SZ
981 PERF_START (NULL, "ScriptExec", NULL, 0);\r
982\r
1f569620 983 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
984 //\r
985 // X64 S3 Resume\r
986 //\r
c5719579 987 DEBUG ((DEBUG_INFO, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));\r
1f569620 988\r
989 //\r
990 // Switch to long mode to complete resume.\r
991 //\r
992 AsmEnablePaging64 (\r
993 0x38,\r
994 EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r
995 (UINT64)(UINTN)AcpiS3Context,\r
996 (UINT64)(UINTN)PeiS3ResumeState,\r
997 (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r
998 );\r
999 } else {\r
1000 //\r
1001 // IA32 S3 Resume\r
1002 //\r
c5719579 1003 DEBUG ((DEBUG_INFO, "transfer control to Standalone Boot Script Executor\r\n"));\r
1f569620 1004 SwitchStack (\r
1005 (SWITCH_STACK_ENTRY_POINT) (UINTN) EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r
1006 (VOID *)AcpiS3Context,\r
1007 (VOID *)PeiS3ResumeState,\r
1008 (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r
1009 );\r
1010 }\r
1011\r
1012 //\r
1013 // Never run to here\r
1014 //\r
1015 CpuDeadLoop();\r
1016}\r
1017/**\r
1018 Restores the platform to its preboot configuration for an S3 resume and\r
1019 jumps to the OS waking vector.\r
1020\r
1021 This function will restore the platform to its pre-boot configuration that was\r
1022 pre-stored in the boot script table and transfer control to OS waking vector.\r
1023 Upon invocation, this function is responsible for locating the following\r
1024 information before jumping to OS waking vector:\r
1025 - ACPI tables\r
1026 - boot script table\r
1027 - any other information that it needs\r
1028\r
1029 The S3RestoreConfig() function then executes the pre-stored boot script table\r
1030 and transitions the platform to the pre-boot state. The boot script is recorded\r
1031 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r
1032 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r
1033 transfers control to the OS waking vector. If the OS supports only a real-mode\r
1034 waking vector, this function will switch from flat mode to real mode before\r
1035 jumping to the waking vector. If all platform pre-boot configurations are\r
1036 successfully restored and all other necessary information is ready, this\r
1037 function will never return and instead will directly jump to the OS waking\r
1038 vector. If this function returns, it indicates that the attempt to resume\r
1039 from the ACPI S3 sleep state failed.\r
1040\r
1041 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r
1042\r
1043 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r
1044 @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r
1045 resume boot path could not be located.\r
1046\r
1047**/\r
1048EFI_STATUS\r
1049EFIAPI\r
1050S3RestoreConfig2 (\r
1051 IN EFI_PEI_S3_RESUME2_PPI *This\r
1052 )\r
1053{\r
1054 EFI_STATUS Status;\r
1055 PEI_SMM_ACCESS_PPI *SmmAccess;\r
1056 UINTN Index;\r
1057 ACPI_S3_CONTEXT *AcpiS3Context;\r
1f569620 1058 EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;\r
1059 EFI_PHYSICAL_ADDRESS TempAcpiS3Context;\r
1060 BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;\r
1061 UINTN VarSize;\r
1062 EFI_SMRAM_DESCRIPTOR *SmramDescriptor;\r
1063 SMM_S3_RESUME_STATE *SmmS3ResumeState;\r
1064 VOID *GuidHob;\r
d0bf5623 1065 BOOLEAN Build4GPageTableOnly;\r
abef469f 1066 BOOLEAN InterruptStatus;\r
1f569620 1067\r
48ee8e3e
SZ
1068 TempAcpiS3Context = 0;\r
1069 TempEfiBootScriptExecutorVariable = 0;\r
1070\r
c5719579 1071 DEBUG ((DEBUG_INFO, "Enter S3 PEIM\r\n"));\r
1f569620 1072\r
1f569620 1073 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r
1074 Status = RestoreLockBox (\r
1075 &gEfiAcpiVariableGuid,\r
1076 &TempAcpiS3Context,\r
1077 &VarSize\r
1078 );\r
1079 ASSERT_EFI_ERROR (Status);\r
1080\r
1f569620 1081 Status = RestoreLockBox (\r
1082 &gEfiAcpiS3ContextGuid,\r
1083 NULL,\r
1084 NULL\r
1085 );\r
1086 ASSERT_EFI_ERROR (Status);\r
1087\r
48ee8e3e
SZ
1088 AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;\r
1089 ASSERT (AcpiS3Context != NULL);\r
1090\r
1091 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r
1f569620 1092 Status = RestoreLockBox (\r
1093 &gEfiBootScriptExecutorVariableGuid,\r
1094 &TempEfiBootScriptExecutorVariable,\r
1095 &VarSize\r
1096 );\r
1097 ASSERT_EFI_ERROR (Status);\r
1098\r
1099 Status = RestoreLockBox (\r
1100 &gEfiBootScriptExecutorContextGuid,\r
1101 NULL,\r
1102 NULL\r
1103 );\r
1104 ASSERT_EFI_ERROR (Status);\r
1105\r
1106 EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *) (UINTN) TempEfiBootScriptExecutorVariable;\r
48ee8e3e 1107 ASSERT (EfiBootScriptExecutorVariable != NULL);\r
1f569620 1108\r
c5719579
JF
1109 DEBUG (( DEBUG_INFO, "AcpiS3Context = %x\n", AcpiS3Context));\r
1110 DEBUG (( DEBUG_INFO, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));\r
1111 DEBUG (( DEBUG_INFO, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));\r
1112 DEBUG (( DEBUG_INFO, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile)); \r
1113 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));\r
1114 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));\r
1115 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));\r
1116 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));\r
1117 DEBUG (( DEBUG_INFO, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));\r
1f569620 1118\r
1119 //\r
1120 // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.\r
1121 // Script dispatch image and context (parameter) are handled by platform.\r
1122 // We just use restore all lock box in place, no need restore one by one.\r
1123 //\r
1124 Status = RestoreAllLockBoxInPlace ();\r
1125 ASSERT_EFI_ERROR (Status);\r
1126 if (EFI_ERROR (Status)) {\r
1127 // Something wrong\r
1128 CpuDeadLoop ();\r
1129 }\r
1130\r
3a69f7cb 1131 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
1132 //\r
1133 // Need reconstruct page table here, since we do not trust ACPINvs.\r
1134 //\r
d0bf5623
JY
1135 if (IsLongModeWakingVector (AcpiS3Context)) {\r
1136 Build4GPageTableOnly = FALSE;\r
1137 } else {\r
1138 Build4GPageTableOnly = TRUE;\r
1139 }\r
1140 RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);\r
3a69f7cb 1141 }\r
1142\r
1f569620 1143 //\r
1144 // Attempt to use content from SMRAM first\r
1145 //\r
1146 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r
1147 if (GuidHob != NULL) {\r
40ef06fc
SZ
1148 Status = PeiServicesLocatePpi (\r
1149 &gPeiSmmAccessPpiGuid,\r
1150 0,\r
1151 NULL,\r
1152 (VOID **) &SmmAccess\r
1153 );\r
1154 for (Index = 0; !EFI_ERROR (Status); Index++) {\r
1155 Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r
1156 }\r
1157\r
1f569620 1158 SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);\r
1159 SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;\r
1160\r
1161 SmmS3ResumeState->ReturnCs = AsmReadCs ();\r
1162 SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;\r
1163 SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;\r
1164 SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;\r
f98f5ec3 1165 SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r
1f569620 1166\r
c5719579
JF
1167 DEBUG (( DEBUG_INFO, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));\r
1168 DEBUG (( DEBUG_INFO, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));\r
1169 DEBUG (( DEBUG_INFO, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));\r
1170 DEBUG (( DEBUG_INFO, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));\r
1171 DEBUG (( DEBUG_INFO, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));\r
1172 DEBUG (( DEBUG_INFO, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));\r
1173 DEBUG (( DEBUG_INFO, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));\r
1174 DEBUG (( DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));\r
1175 DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));\r
1176 DEBUG (( DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));\r
1177 DEBUG (( DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));\r
1178 DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));\r
1179 DEBUG (( DEBUG_INFO, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));\r
1f569620 1180\r
1f569620 1181 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {\r
1182 SwitchStack (\r
1183 (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,\r
1184 (VOID *)AcpiS3Context,\r
1185 0,\r
1186 (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)\r
1187 );\r
1188 }\r
1189 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {\r
1190 //\r
1191 // Switch to long mode to complete resume.\r
1192 //\r
1193\r
abef469f 1194 InterruptStatus = SaveAndDisableInterrupts ();\r
1f569620 1195 //\r
1196 // Need to make sure the GDT is loaded with values that support long mode and real mode.\r
1197 //\r
1198 AsmWriteGdtr (&mGdt);\r
abef469f 1199 //\r
1200 // update segment selectors per the new GDT.\r
1201 // \r
1202 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r
1203 //\r
1204 // Restore interrupt state.\r
1205 //\r
1206 SetInterruptState (InterruptStatus);\r
1207\r
1f569620 1208 AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);\r
f5c941b1 1209\r
1210 //\r
1211 // Disable interrupt of Debug timer, since IDT table cannot work in long mode.\r
1212 // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,\r
1213 // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.\r
1214 //\r
1215 SaveAndSetDebugTimerInterrupt (FALSE);\r
1216\r
1f569620 1217 AsmEnablePaging64 (\r
1218 0x38,\r
1219 SmmS3ResumeState->SmmS3ResumeEntryPoint,\r
1220 (UINT64)(UINTN)AcpiS3Context,\r
1221 0,\r
1222 SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize\r
1223 );\r
1224 }\r
1225\r
1226 }\r
1227\r
1228 S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable );\r
1229 return EFI_SUCCESS;\r
1230}\r
1231/**\r
1232 Main entry for S3 Resume PEIM.\r
1233\r
1234 This routine is to install EFI_PEI_S3_RESUME2_PPI.\r
1235 \r
1236 @param FileHandle Handle of the file being invoked.\r
1237 @param PeiServices Pointer to PEI Services table.\r
1238\r
1239 @retval EFI_SUCCESS S3Resume Ppi is installed successfully.\r
1240\r
1241**/\r
1242EFI_STATUS\r
1243EFIAPI\r
1244PeimS3ResumeEntryPoint (\r
1245 IN EFI_PEI_FILE_HANDLE FileHandle,\r
1246 IN CONST EFI_PEI_SERVICES **PeiServices\r
1247 )\r
1248{\r
1249 EFI_STATUS Status;\r
1250\r
1251 //\r
1252 // Install S3 Resume Ppi\r
1253 //\r
1254 Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);\r
1255 ASSERT_EFI_ERROR (Status);\r
1256\r
1257 return EFI_SUCCESS;\r
1258}\r
1259\r