]>
Commit | Line | Data |
---|---|---|
1f569620 | 1 | /** @file\r |
e48e0742 | 2 | This module produces the EFI_PEI_S3_RESUME2_PPI.\r |
1f569620 | 3 | This module works with StandAloneBootScriptExecutor to S3 resume to OS.\r |
438f1766 | 4 | This module will execute the boot script saved during last boot and after that,\r |
1f569620 | 5 | control is passed to OS waking up handler.\r |
6 | \r | |
c5719579 | 7 | Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r |
787a085b | 8 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
1f569620 | 9 | \r |
10 | This program and the accompanying materials\r | |
11 | are licensed and made available under the terms and conditions\r | |
12 | of the BSD License which accompanies this distribution. The\r | |
13 | full text of the license may be found at\r | |
14 | http://opensource.org/licenses/bsd-license.php\r | |
15 | \r | |
16 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
17 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
21 | #include <PiPei.h>\r | |
22 | \r | |
23 | #include <Guid/AcpiS3Context.h>\r | |
24 | #include <Guid/BootScriptExecutorVariable.h>\r | |
25 | #include <Guid/Performance.h>\r | |
26 | #include <Ppi/ReadOnlyVariable2.h>\r | |
27 | #include <Ppi/S3Resume2.h>\r | |
28 | #include <Ppi/SmmAccess.h>\r | |
29 | #include <Ppi/PostBootScriptTable.h>\r | |
30 | #include <Ppi/EndOfPeiPhase.h>\r | |
18b13fab ED |
31 | #include <Ppi/SmmCommunication.h>\r |
32 | \r | |
33 | #include <Protocol/SmmEndOfS3Resume.h>\r | |
1f569620 | 34 | \r |
35 | #include <Library/DebugLib.h>\r | |
36 | #include <Library/BaseLib.h>\r | |
37 | #include <Library/TimerLib.h>\r | |
38 | #include <Library/PeimEntryPoint.h>\r | |
39 | #include <Library/PeiServicesLib.h>\r | |
40 | #include <Library/HobLib.h>\r | |
41 | #include <Library/PerformanceLib.h>\r | |
42 | #include <Library/PeiServicesTablePointerLib.h>\r | |
43 | #include <Library/IoLib.h>\r | |
44 | #include <Library/BaseMemoryLib.h>\r | |
45 | #include <Library/MemoryAllocationLib.h>\r | |
46 | #include <Library/PcdLib.h>\r | |
47 | #include <Library/DebugAgentLib.h>\r | |
48 | #include <Library/LocalApicLib.h>\r | |
49 | #include <Library/ReportStatusCodeLib.h>\r | |
50 | #include <Library/PrintLib.h>\r | |
c56b6566 | 51 | #include <Library/HobLib.h>\r |
1f569620 | 52 | #include <Library/LockBoxLib.h>\r |
53 | #include <IndustryStandard/Acpi.h>\r | |
54 | \r | |
f98f5ec3 LE |
55 | /**\r |
56 | This macro aligns the address of a variable with auto storage\r | |
57 | duration down to CPU_STACK_ALIGNMENT.\r | |
58 | \r | |
59 | Since the stack grows downward, the result preserves more of the\r | |
60 | stack than the original address (or the same amount), not less.\r | |
61 | **/\r | |
62 | #define STACK_ALIGN_DOWN(Ptr) \\r | |
63 | ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))\r | |
64 | \r | |
787a085b LD |
65 | #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r |
66 | \r | |
1f569620 | 67 | #pragma pack(1)\r |
68 | typedef union {\r | |
69 | struct {\r | |
70 | UINT32 LimitLow : 16;\r | |
71 | UINT32 BaseLow : 16;\r | |
72 | UINT32 BaseMid : 8;\r | |
73 | UINT32 Type : 4;\r | |
74 | UINT32 System : 1;\r | |
75 | UINT32 Dpl : 2;\r | |
76 | UINT32 Present : 1;\r | |
77 | UINT32 LimitHigh : 4;\r | |
78 | UINT32 Software : 1;\r | |
79 | UINT32 Reserved : 1;\r | |
80 | UINT32 DefaultSize : 1;\r | |
81 | UINT32 Granularity : 1;\r | |
82 | UINT32 BaseHigh : 8;\r | |
83 | } Bits;\r | |
84 | UINT64 Uint64;\r | |
85 | } IA32_GDT;\r | |
86 | \r | |
87 | //\r | |
88 | // Page-Map Level-4 Offset (PML4) and\r | |
89 | // Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB\r | |
90 | //\r | |
91 | typedef union {\r | |
92 | struct {\r | |
93 | UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r | |
94 | UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r | |
95 | UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r | |
96 | UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r | |
97 | UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r | |
98 | UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r | |
99 | UINT64 Reserved:1; // Reserved\r | |
100 | UINT64 MustBeZero:2; // Must Be Zero\r | |
101 | UINT64 Available:3; // Available for use by system software\r | |
102 | UINT64 PageTableBaseAddress:40; // Page Table Base Address\r | |
103 | UINT64 AvabilableHigh:11; // Available for use by system software\r | |
104 | UINT64 Nx:1; // No Execute bit\r | |
105 | } Bits;\r | |
106 | UINT64 Uint64;\r | |
107 | } PAGE_MAP_AND_DIRECTORY_POINTER;\r | |
108 | \r | |
109 | //\r | |
110 | // Page Table Entry 2MB\r | |
111 | //\r | |
112 | typedef union {\r | |
113 | struct {\r | |
114 | UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r | |
115 | UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r | |
116 | UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r | |
117 | UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r | |
118 | UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r | |
119 | UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r | |
120 | UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r | |
121 | UINT64 MustBe1:1; // Must be 1 \r | |
122 | UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r | |
123 | UINT64 Available:3; // Available for use by system software\r | |
124 | UINT64 PAT:1; //\r | |
125 | UINT64 MustBeZero:8; // Must be zero;\r | |
126 | UINT64 PageTableBaseAddress:31; // Page Table Base Address\r | |
127 | UINT64 AvabilableHigh:11; // Available for use by system software\r | |
128 | UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r | |
129 | } Bits;\r | |
130 | UINT64 Uint64;\r | |
131 | } PAGE_TABLE_ENTRY;\r | |
132 | \r | |
c56b6566 JY |
133 | //\r |
134 | // Page Table Entry 1GB\r | |
135 | //\r | |
136 | typedef union {\r | |
137 | struct {\r | |
138 | UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r | |
139 | UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r | |
140 | UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r | |
141 | UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r | |
142 | UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r | |
143 | UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r | |
144 | UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r | |
145 | UINT64 MustBe1:1; // Must be 1 \r | |
146 | UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r | |
147 | UINT64 Available:3; // Available for use by system software\r | |
148 | UINT64 PAT:1; //\r | |
149 | UINT64 MustBeZero:17; // Must be zero;\r | |
150 | UINT64 PageTableBaseAddress:22; // Page Table Base Address\r | |
151 | UINT64 AvabilableHigh:11; // Available for use by system software\r | |
152 | UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r | |
153 | } Bits;\r | |
154 | UINT64 Uint64;\r | |
155 | } PAGE_TABLE_1G_ENTRY;\r | |
156 | \r | |
18b13fab ED |
157 | //\r |
158 | // Define two type of smm communicate headers.\r | |
159 | // One for 32 bits PEI + 64 bits DXE, the other for 32 bits PEI + 32 bits DXE case.\r | |
160 | //\r | |
161 | typedef struct {\r | |
162 | EFI_GUID HeaderGuid;\r | |
163 | UINT32 MessageLength;\r | |
164 | UINT8 Data[1];\r | |
165 | } SMM_COMMUNICATE_HEADER_32;\r | |
166 | \r | |
167 | typedef struct {\r | |
168 | EFI_GUID HeaderGuid;\r | |
169 | UINT64 MessageLength;\r | |
170 | UINT8 Data[1];\r | |
171 | } SMM_COMMUNICATE_HEADER_64;\r | |
172 | \r | |
1f569620 | 173 | #pragma pack()\r |
174 | \r | |
175 | //\r | |
176 | // Function prototypes\r | |
177 | //\r | |
178 | /**\r | |
179 | a ASM function to transfer control to OS.\r | |
180 | \r | |
181 | @param S3WakingVector The S3 waking up vector saved in ACPI Facs table\r | |
182 | @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer \r | |
183 | **/\r | |
184 | typedef\r | |
185 | VOID\r | |
186 | (EFIAPI *ASM_TRANSFER_CONTROL) (\r | |
187 | IN UINT32 S3WakingVector,\r | |
188 | IN UINT32 AcpiLowMemoryBase\r | |
189 | );\r | |
190 | \r | |
191 | /**\r | |
192 | Restores the platform to its preboot configuration for an S3 resume and\r | |
193 | jumps to the OS waking vector.\r | |
194 | \r | |
195 | This function will restore the platform to its pre-boot configuration that was\r | |
196 | pre-stored in the boot script table and transfer control to OS waking vector.\r | |
197 | Upon invocation, this function is responsible for locating the following\r | |
198 | information before jumping to OS waking vector:\r | |
199 | - ACPI tables\r | |
200 | - boot script table\r | |
201 | - any other information that it needs\r | |
202 | \r | |
203 | The S3RestoreConfig() function then executes the pre-stored boot script table\r | |
204 | and transitions the platform to the pre-boot state. The boot script is recorded\r | |
205 | during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r | |
206 | EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r | |
207 | transfers control to the OS waking vector. If the OS supports only a real-mode\r | |
208 | waking vector, this function will switch from flat mode to real mode before\r | |
209 | jumping to the waking vector. If all platform pre-boot configurations are\r | |
210 | successfully restored and all other necessary information is ready, this\r | |
211 | function will never return and instead will directly jump to the OS waking\r | |
212 | vector. If this function returns, it indicates that the attempt to resume\r | |
213 | from the ACPI S3 sleep state failed.\r | |
214 | \r | |
215 | @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r | |
216 | \r | |
217 | @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r | |
218 | @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r | |
219 | resume boot path could not be located.\r | |
220 | \r | |
221 | **/\r | |
222 | EFI_STATUS\r | |
223 | EFIAPI\r | |
224 | S3RestoreConfig2 (\r | |
225 | IN EFI_PEI_S3_RESUME2_PPI *This\r | |
226 | );\r | |
227 | \r | |
abef469f | 228 | /**\r |
229 | Set data segment selectors value including DS/ES/FS/GS/SS.\r | |
230 | \r | |
231 | @param[in] SelectorValue Segment selector value to be set.\r | |
232 | \r | |
233 | **/\r | |
234 | VOID\r | |
235 | EFIAPI\r | |
236 | AsmSetDataSelectors (\r | |
237 | IN UINT16 SelectorValue\r | |
238 | );\r | |
239 | \r | |
1f569620 | 240 | //\r |
241 | // Globals\r | |
242 | //\r | |
243 | EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };\r | |
244 | \r | |
245 | EFI_PEI_PPI_DESCRIPTOR mPpiList = {\r | |
246 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
247 | &gEfiPeiS3Resume2PpiGuid,\r | |
248 | &mS3ResumePpi\r | |
249 | };\r | |
250 | \r | |
251 | EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {\r | |
252 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
253 | &gPeiPostScriptTablePpiGuid,\r | |
254 | 0\r | |
255 | };\r | |
256 | \r | |
257 | EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {\r | |
258 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
259 | &gEfiEndOfPeiSignalPpiGuid,\r | |
260 | 0\r | |
261 | };\r | |
262 | \r | |
263 | //\r | |
264 | // Global Descriptor Table (GDT)\r | |
265 | //\r | |
266 | GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r | |
267 | /* selector { Global Segment Descriptor } */\r | |
268 | /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r | |
269 | /* 0x08 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r | |
270 | /* 0x10 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},\r | |
271 | /* 0x18 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},\r | |
272 | /* 0x20 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r | |
273 | /* 0x28 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},\r | |
274 | /* 0x30 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},\r | |
275 | /* 0x38 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}},\r | |
276 | /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r | |
277 | };\r | |
278 | \r | |
abef469f | 279 | #define DATA_SEGEMENT_SELECTOR 0x18\r |
280 | \r | |
1f569620 | 281 | //\r |
282 | // IA32 Gdt register\r | |
283 | //\r | |
284 | GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {\r | |
285 | sizeof (mGdtEntries) - 1,\r | |
286 | (UINTN) mGdtEntries\r | |
287 | };\r | |
288 | \r | |
289 | /**\r | |
290 | Performance measure function to get S3 detailed performance data.\r | |
291 | \r | |
292 | This function will getS3 detailed performance data and saved in pre-reserved ACPI memory.\r | |
293 | **/\r | |
294 | VOID\r | |
295 | WriteToOsS3PerformanceData (\r | |
296 | VOID\r | |
297 | )\r | |
298 | {\r | |
299 | EFI_STATUS Status;\r | |
300 | EFI_PHYSICAL_ADDRESS mAcpiLowMemoryBase;\r | |
301 | PERF_HEADER *PerfHeader;\r | |
302 | PERF_DATA *PerfData;\r | |
303 | UINT64 Ticker;\r | |
304 | UINTN Index;\r | |
305 | EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;\r | |
306 | UINTN VarSize;\r | |
307 | UINTN LogEntryKey;\r | |
308 | CONST VOID *Handle;\r | |
309 | CONST CHAR8 *Token;\r | |
310 | CONST CHAR8 *Module;\r | |
311 | UINT64 StartTicker;\r | |
312 | UINT64 EndTicker;\r | |
313 | UINT64 StartValue;\r | |
314 | UINT64 EndValue;\r | |
315 | BOOLEAN CountUp;\r | |
316 | UINT64 Freq;\r | |
317 | \r | |
318 | //\r | |
438f1766 | 319 | // Retrieve time stamp count as early as possible\r |
1f569620 | 320 | //\r |
321 | Ticker = GetPerformanceCounter ();\r | |
322 | \r | |
323 | Freq = GetPerformanceCounterProperties (&StartValue, &EndValue);\r | |
324 | \r | |
325 | Freq = DivU64x32 (Freq, 1000);\r | |
326 | \r | |
327 | Status = PeiServicesLocatePpi (\r | |
328 | &gEfiPeiReadOnlyVariable2PpiGuid,\r | |
329 | 0,\r | |
330 | NULL,\r | |
331 | (VOID **) &VariableServices\r | |
332 | );\r | |
40ef06fc SZ |
333 | if (EFI_ERROR (Status)) {\r |
334 | return;\r | |
335 | }\r | |
1f569620 | 336 | \r |
337 | VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r | |
338 | Status = VariableServices->GetVariable (\r | |
339 | VariableServices,\r | |
340 | L"PerfDataMemAddr",\r | |
341 | &gPerformanceProtocolGuid,\r | |
342 | NULL,\r | |
343 | &VarSize,\r | |
344 | &mAcpiLowMemoryBase\r | |
345 | );\r | |
346 | if (EFI_ERROR (Status)) {\r | |
347 | DEBUG ((EFI_D_ERROR, "Fail to retrieve variable to log S3 performance data \n"));\r | |
348 | return;\r | |
349 | }\r | |
350 | \r | |
351 | PerfHeader = (PERF_HEADER *) (UINTN) mAcpiLowMemoryBase;\r | |
352 | \r | |
353 | if (PerfHeader->Signiture != PERFORMANCE_SIGNATURE) {\r | |
354 | DEBUG ((EFI_D_ERROR, "Performance data in ACPI memory get corrupted! \n"));\r | |
355 | return;\r | |
356 | }\r | |
357 | \r | |
358 | //\r | |
359 | // Record total S3 resume time.\r | |
360 | //\r | |
361 | if (EndValue >= StartValue) {\r | |
362 | PerfHeader->S3Resume = Ticker - StartValue;\r | |
363 | CountUp = TRUE;\r | |
364 | } else {\r | |
365 | PerfHeader->S3Resume = StartValue - Ticker;\r | |
366 | CountUp = FALSE;\r | |
367 | }\r | |
368 | \r | |
369 | //\r | |
370 | // Get S3 detailed performance data\r | |
371 | //\r | |
372 | Index = 0;\r | |
373 | LogEntryKey = 0;\r | |
374 | while ((LogEntryKey = GetPerformanceMeasurement (\r | |
375 | LogEntryKey,\r | |
376 | &Handle,\r | |
377 | &Token,\r | |
378 | &Module,\r | |
379 | &StartTicker,\r | |
380 | &EndTicker)) != 0) {\r | |
381 | if (EndTicker != 0) {\r | |
382 | PerfData = &PerfHeader->S3Entry[Index];\r | |
383 | \r | |
384 | //\r | |
385 | // Use File Handle to specify the different performance log for PEIM.\r | |
386 | // File Handle is the base address of PEIM FFS file.\r | |
387 | //\r | |
388 | if ((AsciiStrnCmp (Token, "PEIM", PEI_PERFORMANCE_STRING_SIZE) == 0) && (Handle != NULL)) {\r | |
389 | AsciiSPrint (PerfData->Token, PERF_TOKEN_LENGTH, "0x%11p", Handle);\r | |
390 | } else {\r | |
c1fd37cd | 391 | AsciiStrnCpyS (PerfData->Token, PERF_TOKEN_SIZE, Token, PERF_TOKEN_LENGTH);\r |
1f569620 | 392 | }\r |
393 | if (StartTicker == 1) {\r | |
394 | StartTicker = StartValue;\r | |
395 | }\r | |
396 | if (EndTicker == 1) {\r | |
397 | EndTicker = StartValue;\r | |
398 | }\r | |
399 | Ticker = CountUp? (EndTicker - StartTicker) : (StartTicker - EndTicker);\r | |
400 | PerfData->Duration = (UINT32) DivU64x32 (Ticker, (UINT32) Freq);\r | |
401 | \r | |
402 | //\r | |
403 | // Only Record > 1ms performance data so that more big performance can be recorded.\r | |
404 | //\r | |
405 | if ((Ticker > Freq) && (++Index >= PERF_PEI_ENTRY_MAX_NUM)) {\r | |
406 | //\r | |
407 | // Reach the maximum number of PEI performance log entries.\r | |
408 | //\r | |
409 | break;\r | |
410 | }\r | |
411 | }\r | |
412 | }\r | |
413 | PerfHeader->S3EntryNum = (UINT32) Index;\r | |
414 | }\r | |
415 | \r | |
d0bf5623 JY |
416 | /**\r |
417 | The function will check if current waking vector is long mode.\r | |
418 | \r | |
419 | @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r | |
420 | \r | |
421 | @retval TRUE Current context need long mode waking vector.\r | |
422 | @retval FALSE Current context need not long mode waking vector.\r | |
423 | **/\r | |
424 | BOOLEAN\r | |
425 | IsLongModeWakingVector (\r | |
426 | IN ACPI_S3_CONTEXT *AcpiS3Context\r | |
427 | )\r | |
428 | {\r | |
429 | EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r | |
430 | \r | |
431 | Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r | |
432 | if ((Facs == NULL) ||\r | |
433 | (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r | |
434 | ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r | |
435 | // Something wrong with FACS\r | |
436 | return FALSE;\r | |
437 | }\r | |
438 | if (Facs->XFirmwareWakingVector != 0) {\r | |
439 | if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r | |
440 | ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r | |
441 | ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r | |
442 | // Both BIOS and OS wants 64bit vector\r | |
443 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r | |
444 | return TRUE;\r | |
445 | }\r | |
446 | }\r | |
447 | }\r | |
448 | return FALSE;\r | |
449 | }\r | |
450 | \r | |
18b13fab ED |
451 | /**\r |
452 | Send EndOfS3Resume event to SmmCore through communication buffer way.\r | |
453 | \r | |
454 | @retval EFI_SUCCESS Return send the event success.\r | |
455 | **/\r | |
456 | EFI_STATUS\r | |
457 | SignalEndOfS3Resume (\r | |
458 | VOID\r | |
459 | )\r | |
460 | {\r | |
461 | EFI_STATUS Status;\r | |
462 | EFI_PEI_SMM_COMMUNICATION_PPI *SmmCommunicationPpi;\r | |
463 | UINTN CommSize;\r | |
464 | SMM_COMMUNICATE_HEADER_32 Header32;\r | |
465 | SMM_COMMUNICATE_HEADER_64 Header64;\r | |
466 | VOID *CommBuffer;\r | |
467 | \r | |
152e8d76 | 468 | DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Enter\n"));\r |
18b13fab ED |
469 | \r |
470 | //\r | |
471 | // This buffer consumed in DXE phase, so base on DXE mode to prepare communicate buffer.\r | |
472 | // Detect whether DXE is 64 bits mode.\r | |
473 | // if (sizeof(UINTN) == sizeof(UINT64), PEI already 64 bits, assume DXE also 64 bits.\r | |
474 | // or (FeaturePcdGet (PcdDxeIplSwitchToLongMode)), Dxe will switch to 64 bits.\r | |
475 | //\r | |
476 | if ((sizeof(UINTN) == sizeof(UINT64)) || (FeaturePcdGet (PcdDxeIplSwitchToLongMode))) {\r | |
477 | CommBuffer = &Header64;\r | |
478 | Header64.MessageLength = 0;\r | |
479 | CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_64, Data);\r | |
480 | } else {\r | |
481 | CommBuffer = &Header32;\r | |
482 | Header32.MessageLength = 0;\r | |
483 | CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_32, Data);\r | |
484 | }\r | |
485 | CopyGuid (CommBuffer, &gEdkiiSmmEndOfS3ResumeProtocolGuid);\r | |
486 | \r | |
18b13fab ED |
487 | Status = PeiServicesLocatePpi (\r |
488 | &gEfiPeiSmmCommunicationPpiGuid,\r | |
489 | 0,\r | |
490 | NULL,\r | |
491 | (VOID **)&SmmCommunicationPpi\r | |
492 | );\r | |
152e8d76 ED |
493 | if (EFI_ERROR (Status)) {\r |
494 | DEBUG ((DEBUG_ERROR, "Locate Smm Communicate Ppi failed (%r)!\n", Status));\r | |
495 | return Status;\r | |
496 | }\r | |
18b13fab | 497 | \r |
18b13fab ED |
498 | Status = SmmCommunicationPpi->Communicate (\r |
499 | SmmCommunicationPpi,\r | |
500 | (VOID *)CommBuffer,\r | |
501 | &CommSize\r | |
502 | );\r | |
152e8d76 ED |
503 | if (EFI_ERROR (Status)) {\r |
504 | DEBUG ((DEBUG_ERROR, "SmmCommunicationPpi->Communicate return failure (%r)!\n", Status));\r | |
505 | }\r | |
18b13fab | 506 | \r |
152e8d76 | 507 | DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Exit (%r)\n", Status));\r |
18b13fab ED |
508 | return Status;\r |
509 | }\r | |
510 | \r | |
1f569620 | 511 | /**\r |
512 | Jump to OS waking vector.\r | |
513 | The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.\r | |
514 | \r | |
515 | @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r | |
516 | @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE\r | |
517 | **/\r | |
518 | VOID\r | |
519 | EFIAPI\r | |
520 | S3ResumeBootOs (\r | |
521 | IN ACPI_S3_CONTEXT *AcpiS3Context,\r | |
522 | IN PEI_S3_RESUME_STATE *PeiS3ResumeState\r | |
523 | )\r | |
524 | {\r | |
525 | EFI_STATUS Status;\r | |
526 | EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r | |
527 | ASM_TRANSFER_CONTROL AsmTransferControl;\r | |
528 | UINTN TempStackTop;\r | |
529 | UINTN TempStack[0x10];\r | |
530 | \r | |
531 | //\r | |
532 | // Restore IDT\r | |
533 | //\r | |
534 | AsmWriteIdtr (&PeiS3ResumeState->Idtr);\r | |
535 | \r | |
f6d5cbe7 | 536 | if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {\r |
537 | //\r | |
538 | // Report Status code that boot script execution is failed\r | |
539 | //\r | |
540 | REPORT_STATUS_CODE (\r | |
541 | EFI_ERROR_CODE | EFI_ERROR_MINOR,\r | |
542 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)\r | |
543 | );\r | |
544 | }\r | |
545 | \r | |
f5c941b1 | 546 | //\r |
547 | // NOTE: Because Debug Timer interrupt and system interrupts will be disabled \r | |
548 | // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted\r | |
549 | // by soft debugger.\r | |
550 | //\r | |
551 | \r | |
5c0687cc SZ |
552 | PERF_END (NULL, "ScriptExec", NULL, 0);\r |
553 | \r | |
1f569620 | 554 | //\r |
555 | // Install BootScriptDonePpi\r | |
556 | //\r | |
557 | Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);\r | |
558 | ASSERT_EFI_ERROR (Status);\r | |
559 | \r | |
560 | //\r | |
561 | // Get ACPI Table Address\r | |
562 | //\r | |
563 | Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r | |
564 | \r | |
565 | if ((Facs == NULL) ||\r | |
566 | (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r | |
567 | ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r | |
f6d5cbe7 | 568 | //\r |
569 | // Report Status code that no valid vector is found\r | |
570 | //\r | |
571 | REPORT_STATUS_CODE (\r | |
572 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
573 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r | |
574 | );\r | |
1f569620 | 575 | CpuDeadLoop ();\r |
576 | return ;\r | |
577 | }\r | |
578 | \r | |
1f569620 | 579 | //\r |
580 | // Install EndOfPeiPpi\r | |
581 | //\r | |
582 | Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);\r | |
583 | ASSERT_EFI_ERROR (Status);\r | |
584 | \r | |
18b13fab ED |
585 | //\r |
586 | // Signal EndOfS3Resume event.\r | |
587 | //\r | |
152e8d76 | 588 | SignalEndOfS3Resume ();\r |
18b13fab | 589 | \r |
26c0ba77 SZ |
590 | //\r |
591 | // report status code on S3 resume\r | |
592 | //\r | |
593 | REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);\r | |
594 | \r | |
1f569620 | 595 | PERF_CODE (\r |
596 | WriteToOsS3PerformanceData ();\r | |
597 | );\r | |
598 | \r | |
599 | AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;\r | |
600 | if (Facs->XFirmwareWakingVector != 0) {\r | |
601 | //\r | |
602 | // Switch to native waking vector\r | |
603 | //\r | |
604 | TempStackTop = (UINTN)&TempStack + sizeof(TempStack);\r | |
af34c106 JF |
605 | DEBUG ((\r |
606 | DEBUG_INFO,\r | |
607 | "%a() Stack Base: 0x%x, Stack Size: 0x%x\n",\r | |
608 | __FUNCTION__,\r | |
609 | TempStackTop,\r | |
610 | sizeof (TempStack)\r | |
611 | ));\r | |
1f569620 | 612 | if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r |
613 | ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r | |
614 | ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r | |
615 | //\r | |
616 | // X64 long mode waking vector\r | |
617 | //\r | |
c5719579 | 618 | DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r |
1f569620 | 619 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r |
620 | AsmEnablePaging64 (\r | |
621 | 0x38,\r | |
622 | Facs->XFirmwareWakingVector,\r | |
623 | 0,\r | |
624 | 0,\r | |
625 | (UINT64)(UINTN)TempStackTop\r | |
626 | );\r | |
627 | } else {\r | |
f6d5cbe7 | 628 | //\r |
629 | // Report Status code that no valid waking vector is found\r | |
630 | //\r | |
631 | REPORT_STATUS_CODE (\r | |
632 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
633 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r | |
634 | );\r | |
1f569620 | 635 | DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));\r |
636 | ASSERT (FALSE);\r | |
f6d5cbe7 | 637 | CpuDeadLoop ();\r |
638 | return ;\r | |
1f569620 | 639 | }\r |
640 | } else {\r | |
641 | //\r | |
642 | // IA32 protected mode waking vector (Page disabled)\r | |
643 | //\r | |
c5719579 | 644 | DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r |
1f569620 | 645 | SwitchStack (\r |
646 | (SWITCH_STACK_ENTRY_POINT) (UINTN) Facs->XFirmwareWakingVector,\r | |
647 | NULL,\r | |
648 | NULL,\r | |
649 | (VOID *)(UINTN)TempStackTop\r | |
650 | );\r | |
651 | }\r | |
652 | } else {\r | |
653 | //\r | |
654 | // 16bit Realmode waking vector\r | |
655 | //\r | |
c5719579 | 656 | DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));\r |
1f569620 | 657 | AsmTransferControl (Facs->FirmwareWakingVector, 0x0);\r |
658 | }\r | |
659 | \r | |
f6d5cbe7 | 660 | //\r |
661 | // Report Status code the failure of S3Resume\r | |
662 | //\r | |
663 | REPORT_STATUS_CODE (\r | |
664 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
665 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r | |
666 | );\r | |
667 | \r | |
1f569620 | 668 | //\r |
669 | // Never run to here\r | |
670 | //\r | |
671 | CpuDeadLoop();\r | |
672 | }\r | |
673 | \r | |
674 | /**\r | |
675 | Restore S3 page table because we do not trust ACPINvs content.\r | |
676 | If BootScriptExector driver will not run in 64-bit mode, this function will do nothing. \r | |
677 | \r | |
678 | @param S3NvsPageTableAddress PageTableAddress in ACPINvs\r | |
d0bf5623 | 679 | @param Build4GPageTableOnly If BIOS just build 4G page table only\r |
1f569620 | 680 | **/\r |
681 | VOID\r | |
682 | RestoreS3PageTables (\r | |
d0bf5623 JY |
683 | IN UINTN S3NvsPageTableAddress,\r |
684 | IN BOOLEAN Build4GPageTableOnly\r | |
1f569620 | 685 | )\r |
686 | {\r | |
687 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r | |
688 | UINT32 RegEax;\r | |
c56b6566 | 689 | UINT32 RegEdx;\r |
1f569620 | 690 | UINT8 PhysicalAddressBits;\r |
691 | EFI_PHYSICAL_ADDRESS PageAddress;\r | |
692 | UINTN IndexOfPml4Entries;\r | |
693 | UINTN IndexOfPdpEntries;\r | |
694 | UINTN IndexOfPageDirectoryEntries;\r | |
c56b6566 JY |
695 | UINT32 NumberOfPml4EntriesNeeded;\r |
696 | UINT32 NumberOfPdpEntriesNeeded;\r | |
1f569620 | 697 | PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;\r |
698 | PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r | |
699 | PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r | |
700 | PAGE_TABLE_ENTRY *PageDirectoryEntry;\r | |
c56b6566 JY |
701 | VOID *Hob;\r |
702 | BOOLEAN Page1GSupport;\r | |
703 | PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;\r | |
787a085b LD |
704 | UINT64 AddressEncMask;\r |
705 | \r | |
706 | //\r | |
707 | // Make sure AddressEncMask is contained to smallest supported address field\r | |
708 | //\r | |
709 | AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;\r | |
1f569620 | 710 | \r |
711 | //\r | |
712 | // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.\r | |
713 | // The whole page table is too large to be saved in SMRAM.\r | |
714 | //\r | |
438f1766 | 715 | // The assumption is : whole page table is allocated in CONTINUOUS memory and CR3 points to TOP page.\r |
1f569620 | 716 | //\r |
c5719579 | 717 | DEBUG ((DEBUG_INFO, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));\r |
1f569620 | 718 | \r |
719 | //\r | |
438f1766 | 720 | // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.\r |
1f569620 | 721 | //\r |
722 | PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r | |
723 | S3NvsPageTableAddress += SIZE_4KB;\r | |
724 | \r | |
c56b6566 | 725 | Page1GSupport = FALSE;\r |
378175d2 JY |
726 | if (PcdGetBool(PcdUse1GPageTable)) {\r |
727 | AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r | |
728 | if (RegEax >= 0x80000001) {\r | |
729 | AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r | |
730 | if ((RegEdx & BIT26) != 0) {\r | |
731 | Page1GSupport = TRUE;\r | |
732 | }\r | |
c56b6566 JY |
733 | }\r |
734 | }\r | |
735 | \r | |
1f569620 | 736 | //\r |
737 | // Get physical address bits supported.\r | |
738 | //\r | |
c56b6566 JY |
739 | Hob = GetFirstHob (EFI_HOB_TYPE_CPU);\r |
740 | if (Hob != NULL) {\r | |
741 | PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;\r | |
1f569620 | 742 | } else {\r |
c56b6566 JY |
743 | AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r |
744 | if (RegEax >= 0x80000008) {\r | |
745 | AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r | |
746 | PhysicalAddressBits = (UINT8) RegEax;\r | |
747 | } else {\r | |
748 | PhysicalAddressBits = 36;\r | |
749 | }\r | |
1f569620 | 750 | }\r |
751 | \r | |
c56b6566 JY |
752 | //\r |
753 | // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.\r | |
754 | //\r | |
755 | ASSERT (PhysicalAddressBits <= 52);\r | |
756 | if (PhysicalAddressBits > 48) {\r | |
757 | PhysicalAddressBits = 48;\r | |
758 | }\r | |
759 | \r | |
d0bf5623 JY |
760 | //\r |
761 | // NOTE: In order to save time to create full page table, we just create 4G page table by default.\r | |
762 | // And let PF handler in BootScript driver to create more on request.\r | |
763 | //\r | |
764 | if (Build4GPageTableOnly) {\r | |
765 | PhysicalAddressBits = 32;\r | |
766 | ZeroMem (PageMap, EFI_PAGES_TO_SIZE(2));\r | |
767 | }\r | |
1f569620 | 768 | //\r |
769 | // Calculate the table entries needed.\r | |
770 | //\r | |
771 | if (PhysicalAddressBits <= 39) {\r | |
772 | NumberOfPml4EntriesNeeded = 1;\r | |
c56b6566 | 773 | NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));\r |
1f569620 | 774 | } else {\r |
c56b6566 | 775 | NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));\r |
1f569620 | 776 | NumberOfPdpEntriesNeeded = 512;\r |
777 | }\r | |
778 | \r | |
779 | PageMapLevel4Entry = PageMap;\r | |
780 | PageAddress = 0;\r | |
781 | for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r | |
782 | //\r | |
783 | // Each PML4 entry points to a page of Page Directory Pointer entires.\r | |
784 | // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.\r | |
785 | //\r | |
786 | PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r | |
787 | S3NvsPageTableAddress += SIZE_4KB;\r | |
788 | \r | |
789 | //\r | |
790 | // Make a PML4 Entry\r | |
791 | //\r | |
787a085b | 792 | PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;\r |
1f569620 | 793 | PageMapLevel4Entry->Bits.ReadWrite = 1;\r |
794 | PageMapLevel4Entry->Bits.Present = 1;\r | |
c56b6566 JY |
795 | \r |
796 | if (Page1GSupport) {\r | |
54d3b84e | 797 | PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;\r |
1f569620 | 798 | \r |
c56b6566 | 799 | for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {\r |
1f569620 | 800 | //\r |
801 | // Fill in the Page Directory entries\r | |
802 | //\r | |
787a085b | 803 | PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r |
c56b6566 JY |
804 | PageDirectory1GEntry->Bits.ReadWrite = 1;\r |
805 | PageDirectory1GEntry->Bits.Present = 1;\r | |
806 | PageDirectory1GEntry->Bits.MustBe1 = 1;\r | |
807 | }\r | |
808 | } else {\r | |
809 | for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r | |
810 | //\r | |
811 | // Each Directory Pointer entries points to a page of Page Directory entires.\r | |
812 | // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r | |
813 | // \r | |
814 | PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;\r | |
815 | S3NvsPageTableAddress += SIZE_4KB;\r | |
816 | \r | |
817 | //\r | |
818 | // Fill in a Page Directory Pointer Entries\r | |
819 | //\r | |
787a085b | 820 | PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r |
c56b6566 JY |
821 | PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r |
822 | PageDirectoryPointerEntry->Bits.Present = 1;\r | |
823 | \r | |
824 | for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {\r | |
825 | //\r | |
826 | // Fill in the Page Directory entries\r | |
827 | //\r | |
787a085b | 828 | PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r |
c56b6566 JY |
829 | PageDirectoryEntry->Bits.ReadWrite = 1;\r |
830 | PageDirectoryEntry->Bits.Present = 1;\r | |
831 | PageDirectoryEntry->Bits.MustBe1 = 1;\r | |
832 | }\r | |
1f569620 | 833 | }\r |
834 | }\r | |
835 | }\r | |
836 | return ;\r | |
837 | } else {\r | |
838 | //\r | |
839 | // If DXE is running 32-bit mode, no need to establish page table.\r | |
840 | //\r | |
841 | return ;\r | |
842 | }\r | |
843 | }\r | |
844 | \r | |
845 | /**\r | |
846 | Jump to boot script executor driver.\r | |
847 | \r | |
848 | The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.\r | |
849 | \r | |
850 | @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r | |
851 | @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in\r | |
852 | boot script execute driver\r | |
853 | **/\r | |
854 | VOID\r | |
855 | EFIAPI\r | |
856 | S3ResumeExecuteBootScript (\r | |
857 | IN ACPI_S3_CONTEXT *AcpiS3Context,\r | |
858 | IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable\r | |
859 | )\r | |
860 | {\r | |
861 | EFI_STATUS Status;\r | |
862 | PEI_SMM_ACCESS_PPI *SmmAccess;\r | |
863 | UINTN Index;\r | |
864 | VOID *GuidHob;\r | |
865 | IA32_DESCRIPTOR *IdtDescriptor;\r | |
866 | VOID *IdtBuffer;\r | |
867 | PEI_S3_RESUME_STATE *PeiS3ResumeState;\r | |
abef469f | 868 | BOOLEAN InterruptStatus;\r |
1f569620 | 869 | \r |
c5719579 | 870 | DEBUG ((DEBUG_INFO, "S3ResumeExecuteBootScript()\n"));\r |
1f569620 | 871 | \r |
872 | //\r | |
873 | // Attempt to use content from SMRAM first\r | |
874 | //\r | |
875 | GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r | |
876 | if (GuidHob != NULL) {\r | |
877 | //\r | |
878 | // Last step for SMM - send SMI for initialization\r | |
879 | //\r | |
880 | \r | |
881 | //\r | |
882 | // Send SMI to APs\r | |
883 | // \r | |
884 | SendSmiIpiAllExcludingSelf ();\r | |
885 | //\r | |
886 | // Send SMI to BSP\r | |
887 | //\r | |
888 | SendSmiIpi (GetApicId ());\r | |
889 | \r | |
890 | Status = PeiServicesLocatePpi (\r | |
891 | &gPeiSmmAccessPpiGuid,\r | |
892 | 0,\r | |
893 | NULL,\r | |
894 | (VOID **) &SmmAccess\r | |
895 | );\r | |
40ef06fc | 896 | if (!EFI_ERROR (Status)) {\r |
c5719579 | 897 | DEBUG ((DEBUG_INFO, "Close all SMRAM regions before executing boot script\n"));\r |
40ef06fc SZ |
898 | \r |
899 | for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r | |
900 | Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r | |
901 | }\r | |
1f569620 | 902 | \r |
c5719579 | 903 | DEBUG ((DEBUG_INFO, "Lock all SMRAM regions before executing boot script\n"));\r |
40ef06fc SZ |
904 | \r |
905 | for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r | |
906 | Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r | |
907 | }\r | |
1f569620 | 908 | }\r |
909 | }\r | |
910 | \r | |
911 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r | |
1f569620 | 912 | AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);\r |
913 | }\r | |
914 | \r | |
915 | if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {\r | |
916 | //\r | |
917 | // On some platform, such as ECP, a dispatch node in boot script table may execute a 32-bit PEIM which may need PeiServices\r | |
918 | // pointer. So PeiServices need preserve in (IDTBase- sizeof (UINTN)). \r | |
919 | //\r | |
920 | IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);\r | |
921 | //\r | |
438f1766 | 922 | // Make sure the newly allocated IDT align with 16-bytes\r |
1f569620 | 923 | // \r |
924 | IdtBuffer = AllocatePages (EFI_SIZE_TO_PAGES((IdtDescriptor->Limit + 1) + 16));\r | |
6f9760d8 SZ |
925 | if (IdtBuffer == NULL) {\r |
926 | REPORT_STATUS_CODE (\r | |
927 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
928 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)\r | |
929 | );\r | |
930 | ASSERT (FALSE);\r | |
931 | }\r | |
e47459e6 | 932 | //\r |
933 | // Additional 16 bytes allocated to save IA32 IDT descriptor and Pei Service Table Pointer\r | |
934 | // IA32 IDT descriptor will be used to setup IA32 IDT table for 32-bit Framework Boot Script code\r | |
935 | // \r | |
936 | ZeroMem (IdtBuffer, 16);\r | |
937 | AsmReadIdtr ((IA32_DESCRIPTOR *)IdtBuffer);\r | |
1f569620 | 938 | CopyMem ((VOID*)((UINT8*)IdtBuffer + 16),(VOID*)(IdtDescriptor->Base), (IdtDescriptor->Limit + 1));\r |
939 | IdtDescriptor->Base = (UINTN)((UINT8*)IdtBuffer + 16);\r | |
940 | *(UINTN*)(IdtDescriptor->Base - sizeof(UINTN)) = (UINTN)GetPeiServicesTablePointer ();\r | |
941 | }\r | |
942 | \r | |
abef469f | 943 | InterruptStatus = SaveAndDisableInterrupts ();\r |
1f569620 | 944 | //\r |
945 | // Need to make sure the GDT is loaded with values that support long mode and real mode.\r | |
946 | //\r | |
947 | AsmWriteGdtr (&mGdt);\r | |
abef469f | 948 | //\r |
949 | // update segment selectors per the new GDT.\r | |
950 | //\r | |
951 | AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r | |
952 | //\r | |
953 | // Restore interrupt state.\r | |
954 | //\r | |
955 | SetInterruptState (InterruptStatus);\r | |
1f569620 | 956 | \r |
957 | //\r | |
958 | // Prepare data for return back\r | |
959 | //\r | |
960 | PeiS3ResumeState = AllocatePool (sizeof(*PeiS3ResumeState));\r | |
6f9760d8 SZ |
961 | if (PeiS3ResumeState == NULL) {\r |
962 | REPORT_STATUS_CODE (\r | |
963 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
964 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)\r | |
965 | );\r | |
966 | ASSERT (FALSE);\r | |
967 | }\r | |
c5719579 | 968 | DEBUG ((DEBUG_INFO, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));\r |
1f569620 | 969 | PeiS3ResumeState->ReturnCs = 0x10;\r |
970 | PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;\r | |
f98f5ec3 | 971 | PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r |
1f569620 | 972 | //\r |
973 | // Save IDT\r | |
974 | //\r | |
975 | AsmReadIdtr (&PeiS3ResumeState->Idtr);\r | |
f6d5cbe7 | 976 | \r |
977 | //\r | |
978 | // Report Status Code to indicate S3 boot script execution\r | |
979 | //\r | |
980 | REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);\r | |
1f569620 | 981 | \r |
5c0687cc SZ |
982 | PERF_START (NULL, "ScriptExec", NULL, 0);\r |
983 | \r | |
1f569620 | 984 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r |
985 | //\r | |
986 | // X64 S3 Resume\r | |
987 | //\r | |
c5719579 | 988 | DEBUG ((DEBUG_INFO, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));\r |
1f569620 | 989 | \r |
990 | //\r | |
991 | // Switch to long mode to complete resume.\r | |
992 | //\r | |
993 | AsmEnablePaging64 (\r | |
994 | 0x38,\r | |
995 | EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r | |
996 | (UINT64)(UINTN)AcpiS3Context,\r | |
997 | (UINT64)(UINTN)PeiS3ResumeState,\r | |
998 | (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r | |
999 | );\r | |
1000 | } else {\r | |
1001 | //\r | |
1002 | // IA32 S3 Resume\r | |
1003 | //\r | |
c5719579 | 1004 | DEBUG ((DEBUG_INFO, "transfer control to Standalone Boot Script Executor\r\n"));\r |
1f569620 | 1005 | SwitchStack (\r |
1006 | (SWITCH_STACK_ENTRY_POINT) (UINTN) EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r | |
1007 | (VOID *)AcpiS3Context,\r | |
1008 | (VOID *)PeiS3ResumeState,\r | |
1009 | (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r | |
1010 | );\r | |
1011 | }\r | |
1012 | \r | |
1013 | //\r | |
1014 | // Never run to here\r | |
1015 | //\r | |
1016 | CpuDeadLoop();\r | |
1017 | }\r | |
1018 | /**\r | |
1019 | Restores the platform to its preboot configuration for an S3 resume and\r | |
1020 | jumps to the OS waking vector.\r | |
1021 | \r | |
1022 | This function will restore the platform to its pre-boot configuration that was\r | |
1023 | pre-stored in the boot script table and transfer control to OS waking vector.\r | |
1024 | Upon invocation, this function is responsible for locating the following\r | |
1025 | information before jumping to OS waking vector:\r | |
1026 | - ACPI tables\r | |
1027 | - boot script table\r | |
1028 | - any other information that it needs\r | |
1029 | \r | |
1030 | The S3RestoreConfig() function then executes the pre-stored boot script table\r | |
1031 | and transitions the platform to the pre-boot state. The boot script is recorded\r | |
1032 | during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r | |
1033 | EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r | |
1034 | transfers control to the OS waking vector. If the OS supports only a real-mode\r | |
1035 | waking vector, this function will switch from flat mode to real mode before\r | |
1036 | jumping to the waking vector. If all platform pre-boot configurations are\r | |
1037 | successfully restored and all other necessary information is ready, this\r | |
1038 | function will never return and instead will directly jump to the OS waking\r | |
1039 | vector. If this function returns, it indicates that the attempt to resume\r | |
1040 | from the ACPI S3 sleep state failed.\r | |
1041 | \r | |
1042 | @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r | |
1043 | \r | |
1044 | @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r | |
1045 | @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r | |
1046 | resume boot path could not be located.\r | |
1047 | \r | |
1048 | **/\r | |
1049 | EFI_STATUS\r | |
1050 | EFIAPI\r | |
1051 | S3RestoreConfig2 (\r | |
1052 | IN EFI_PEI_S3_RESUME2_PPI *This\r | |
1053 | )\r | |
1054 | {\r | |
1055 | EFI_STATUS Status;\r | |
1056 | PEI_SMM_ACCESS_PPI *SmmAccess;\r | |
1057 | UINTN Index;\r | |
1058 | ACPI_S3_CONTEXT *AcpiS3Context;\r | |
1f569620 | 1059 | EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;\r |
1060 | EFI_PHYSICAL_ADDRESS TempAcpiS3Context;\r | |
1061 | BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;\r | |
1062 | UINTN VarSize;\r | |
1063 | EFI_SMRAM_DESCRIPTOR *SmramDescriptor;\r | |
1064 | SMM_S3_RESUME_STATE *SmmS3ResumeState;\r | |
1065 | VOID *GuidHob;\r | |
d0bf5623 | 1066 | BOOLEAN Build4GPageTableOnly;\r |
abef469f | 1067 | BOOLEAN InterruptStatus;\r |
1f569620 | 1068 | \r |
48ee8e3e SZ |
1069 | TempAcpiS3Context = 0;\r |
1070 | TempEfiBootScriptExecutorVariable = 0;\r | |
1071 | \r | |
c5719579 | 1072 | DEBUG ((DEBUG_INFO, "Enter S3 PEIM\r\n"));\r |
1f569620 | 1073 | \r |
1f569620 | 1074 | VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r |
1075 | Status = RestoreLockBox (\r | |
1076 | &gEfiAcpiVariableGuid,\r | |
1077 | &TempAcpiS3Context,\r | |
1078 | &VarSize\r | |
1079 | );\r | |
1080 | ASSERT_EFI_ERROR (Status);\r | |
1081 | \r | |
1f569620 | 1082 | Status = RestoreLockBox (\r |
1083 | &gEfiAcpiS3ContextGuid,\r | |
1084 | NULL,\r | |
1085 | NULL\r | |
1086 | );\r | |
1087 | ASSERT_EFI_ERROR (Status);\r | |
1088 | \r | |
48ee8e3e SZ |
1089 | AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;\r |
1090 | ASSERT (AcpiS3Context != NULL);\r | |
1091 | \r | |
1092 | VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r | |
1f569620 | 1093 | Status = RestoreLockBox (\r |
1094 | &gEfiBootScriptExecutorVariableGuid,\r | |
1095 | &TempEfiBootScriptExecutorVariable,\r | |
1096 | &VarSize\r | |
1097 | );\r | |
1098 | ASSERT_EFI_ERROR (Status);\r | |
1099 | \r | |
1100 | Status = RestoreLockBox (\r | |
1101 | &gEfiBootScriptExecutorContextGuid,\r | |
1102 | NULL,\r | |
1103 | NULL\r | |
1104 | );\r | |
1105 | ASSERT_EFI_ERROR (Status);\r | |
1106 | \r | |
1107 | EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *) (UINTN) TempEfiBootScriptExecutorVariable;\r | |
48ee8e3e | 1108 | ASSERT (EfiBootScriptExecutorVariable != NULL);\r |
1f569620 | 1109 | \r |
c5719579 JF |
1110 | DEBUG (( DEBUG_INFO, "AcpiS3Context = %x\n", AcpiS3Context));\r |
1111 | DEBUG (( DEBUG_INFO, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));\r | |
1112 | DEBUG (( DEBUG_INFO, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));\r | |
1113 | DEBUG (( DEBUG_INFO, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile)); \r | |
1114 | DEBUG (( DEBUG_INFO, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));\r | |
1115 | DEBUG (( DEBUG_INFO, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));\r | |
1116 | DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));\r | |
1117 | DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));\r | |
1118 | DEBUG (( DEBUG_INFO, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));\r | |
1f569620 | 1119 | \r |
1120 | //\r | |
1121 | // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.\r | |
1122 | // Script dispatch image and context (parameter) are handled by platform.\r | |
1123 | // We just use restore all lock box in place, no need restore one by one.\r | |
1124 | //\r | |
1125 | Status = RestoreAllLockBoxInPlace ();\r | |
1126 | ASSERT_EFI_ERROR (Status);\r | |
1127 | if (EFI_ERROR (Status)) {\r | |
1128 | // Something wrong\r | |
1129 | CpuDeadLoop ();\r | |
1130 | }\r | |
1131 | \r | |
3a69f7cb | 1132 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r |
1133 | //\r | |
1134 | // Need reconstruct page table here, since we do not trust ACPINvs.\r | |
1135 | //\r | |
d0bf5623 JY |
1136 | if (IsLongModeWakingVector (AcpiS3Context)) {\r |
1137 | Build4GPageTableOnly = FALSE;\r | |
1138 | } else {\r | |
1139 | Build4GPageTableOnly = TRUE;\r | |
1140 | }\r | |
1141 | RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);\r | |
3a69f7cb | 1142 | }\r |
1143 | \r | |
1f569620 | 1144 | //\r |
1145 | // Attempt to use content from SMRAM first\r | |
1146 | //\r | |
1147 | GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r | |
1148 | if (GuidHob != NULL) {\r | |
40ef06fc SZ |
1149 | Status = PeiServicesLocatePpi (\r |
1150 | &gPeiSmmAccessPpiGuid,\r | |
1151 | 0,\r | |
1152 | NULL,\r | |
1153 | (VOID **) &SmmAccess\r | |
1154 | );\r | |
1155 | for (Index = 0; !EFI_ERROR (Status); Index++) {\r | |
1156 | Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r | |
1157 | }\r | |
1158 | \r | |
1f569620 | 1159 | SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);\r |
1160 | SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;\r | |
1161 | \r | |
1162 | SmmS3ResumeState->ReturnCs = AsmReadCs ();\r | |
1163 | SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;\r | |
1164 | SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;\r | |
1165 | SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;\r | |
f98f5ec3 | 1166 | SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r |
1f569620 | 1167 | \r |
c5719579 JF |
1168 | DEBUG (( DEBUG_INFO, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));\r |
1169 | DEBUG (( DEBUG_INFO, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));\r | |
1170 | DEBUG (( DEBUG_INFO, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));\r | |
1171 | DEBUG (( DEBUG_INFO, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));\r | |
1172 | DEBUG (( DEBUG_INFO, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));\r | |
1173 | DEBUG (( DEBUG_INFO, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));\r | |
1174 | DEBUG (( DEBUG_INFO, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));\r | |
1175 | DEBUG (( DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));\r | |
1176 | DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));\r | |
1177 | DEBUG (( DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));\r | |
1178 | DEBUG (( DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));\r | |
1179 | DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));\r | |
1180 | DEBUG (( DEBUG_INFO, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));\r | |
1f569620 | 1181 | \r |
1f569620 | 1182 | if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {\r |
1183 | SwitchStack (\r | |
1184 | (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,\r | |
1185 | (VOID *)AcpiS3Context,\r | |
1186 | 0,\r | |
1187 | (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)\r | |
1188 | );\r | |
1189 | }\r | |
1190 | if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {\r | |
1191 | //\r | |
1192 | // Switch to long mode to complete resume.\r | |
1193 | //\r | |
1194 | \r | |
abef469f | 1195 | InterruptStatus = SaveAndDisableInterrupts ();\r |
1f569620 | 1196 | //\r |
1197 | // Need to make sure the GDT is loaded with values that support long mode and real mode.\r | |
1198 | //\r | |
1199 | AsmWriteGdtr (&mGdt);\r | |
abef469f | 1200 | //\r |
1201 | // update segment selectors per the new GDT.\r | |
1202 | // \r | |
1203 | AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r | |
1204 | //\r | |
1205 | // Restore interrupt state.\r | |
1206 | //\r | |
1207 | SetInterruptState (InterruptStatus);\r | |
1208 | \r | |
1f569620 | 1209 | AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);\r |
f5c941b1 | 1210 | \r |
1211 | //\r | |
1212 | // Disable interrupt of Debug timer, since IDT table cannot work in long mode.\r | |
1213 | // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,\r | |
1214 | // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.\r | |
1215 | //\r | |
1216 | SaveAndSetDebugTimerInterrupt (FALSE);\r | |
1217 | \r | |
1f569620 | 1218 | AsmEnablePaging64 (\r |
1219 | 0x38,\r | |
1220 | SmmS3ResumeState->SmmS3ResumeEntryPoint,\r | |
1221 | (UINT64)(UINTN)AcpiS3Context,\r | |
1222 | 0,\r | |
1223 | SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize\r | |
1224 | );\r | |
1225 | }\r | |
1226 | \r | |
1227 | }\r | |
1228 | \r | |
1229 | S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable );\r | |
1230 | return EFI_SUCCESS;\r | |
1231 | }\r | |
1232 | /**\r | |
1233 | Main entry for S3 Resume PEIM.\r | |
1234 | \r | |
1235 | This routine is to install EFI_PEI_S3_RESUME2_PPI.\r | |
1236 | \r | |
1237 | @param FileHandle Handle of the file being invoked.\r | |
1238 | @param PeiServices Pointer to PEI Services table.\r | |
1239 | \r | |
1240 | @retval EFI_SUCCESS S3Resume Ppi is installed successfully.\r | |
1241 | \r | |
1242 | **/\r | |
1243 | EFI_STATUS\r | |
1244 | EFIAPI\r | |
1245 | PeimS3ResumeEntryPoint (\r | |
1246 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
1247 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
1248 | )\r | |
1249 | {\r | |
1250 | EFI_STATUS Status;\r | |
1251 | \r | |
1252 | //\r | |
1253 | // Install S3 Resume Ppi\r | |
1254 | //\r | |
1255 | Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);\r | |
1256 | ASSERT_EFI_ERROR (Status);\r | |
1257 | \r | |
1258 | return EFI_SUCCESS;\r | |
1259 | }\r | |
1260 | \r |