]> git.proxmox.com Git - mirror_edk2.git/blame - Vlv2DeviceRefCodePkg/AcpiTablesPCAT/PchScc.asl
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Vlv2DeviceRefCodePkg: Fixed thermal issue.
[mirror_edk2.git] / Vlv2DeviceRefCodePkg / AcpiTablesPCAT / PchScc.asl
CommitLineData
3cbfba02
DW		 1/**************************************************************************;\r
2;* *;\r
3;* *;\r
4;* Intel Corporation - ACPI Reference Code for the Baytrail *;\r
5;* Family of Customer Reference Boards. *;\r
6;* *;\r
7;* *;\r
8;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;\r
9;\r
10; This program and the accompanying materials are licensed and made available under\r
11; the terms and conditions of the BSD License that accompanies this distribution.\r
12; The full text of the license may be found at\r
13; http://opensource.org/licenses/bsd-license.php.\r
14;\r
15; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
16; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
17;\r
18;* *;\r
19;* *;\r
20;**************************************************************************/\r
21Device (PEPD)\r
22{\r
23 Name (_HID, "INT3396")\r
24 Name(_CID, 0x800dd041)\r
25 Name (_UID, 0x1)\r
26\r
27 // Indicates if the platform PEP has loaded\r
28 Name(PEPP, Zero)\r
29\r
30 // Devices score-boarded by the PEP, Rev0 format\r
31 Name (DEVS, Package() {0})\r
32\r
33 // Devices score-boarded by the PEP, Rev1 format\r
34 Name(DEVX, Package()\r
35 {\r
36 Package () {"\\_SB.PCI0.XHC1", 0x1},\r
37 Package () {"\\_SB.PCI0.EHC1", 0x1},\r
38 Package () {"\\_SB.PCI0.GFX0", 0x1},\r
39 Package () {"\\_SB.PCI0.GFX0.ISP0", 0x1},\r
40 Package () {"\\_SB.PCI0.SEC0", 0x1},\r
41 Package () {"\\_SB.I2C1", 0x1},\r
42 Package () {"\\_SB.I2C2", 0x1},\r
43 Package () {"\\_SB.I2C3", 0x1},\r
44 Package () {"\\_SB.I2C4", 0x1},\r
45 Package () {"\\_SB.I2C5", 0x1},\r
46 Package () {"\\_SB.I2C6", 0x1},\r
47 Package () {"\\_SB.I2C7", 0x1},\r
48 Package () {"\\_SB.SDHA", 0x1},\r
49 Package () {"\\_SB.SDHB", 0x1},\r
50 Package () {"\\_SB.SDHC", 0x1},\r
51 Package () {"\\_SB.SPI1", 0x1},\r
52 Package () {"\\_SB.URT1", 0x1},\r
53 Package () {"\\_SB.URT2", 0x1},\r
54 })\r
55 // Crashdump device package\r
56 Name(CDMP, Package(2) {})\r
57 // Device dependency for uPEP\r
58 Name(DEVY, Package()\r
59 {\r
60 Package() {"\\_PR.CPU0", 0x1, Package() {Package() {0xFF, 0}}},\r
61 Package() {"\\_PR.CPU1", 0x1, Package() {Package() {0xFF, 0}}},\r
62 Package() {"\\_PR.CPU2", 0x1, Package() {Package() {0xFF, 0}}},\r
63 Package() {"\\_PR.CPU3", 0x1, Package() {Package() {0xFF, 0}}},\r
64 Package() {"\\_SB.I2C1", 0x1, Package() {Package() {0xFF,3}}},\r
65 Package() {"\\_SB.I2C2", 0x1, Package() {Package() {0xFF,3}}},\r
66 Package() {"\\_SB.I2C3", 0x1, Package() {Package() {0xFF,3}}},\r
67 Package() {"\\_SB.I2C4", 0x1, Package() {Package() {0xFF,3}}},\r
68 Package() {"\\_SB.I2C5", 0x1, Package() {Package() {0xFF,3}}},\r
69 Package() {"\\_SB.I2C6", 0x1, Package() {Package() {0xFF,3}}},\r
70 Package() {"\\_SB.I2C7", 0x1, Package() {Package() {0xFF,3}}},\r
71 Package() {"\\_SB.PCI0.GFX0", 0x1, Package() {Package() {0xFF,3}}},\r
72 Package() {"\\_SB.PCI0.SEC0", 0x1, Package() {Package() {0xFF,3}}},\r
73 Package() {"\\_SB.PCI0.XHC1", 0x1, Package() {Package() {0xFF,3}}},\r
74 Package() {"\\_SB.PCI0.GFX0.ISP0", 0x1, Package() {Package() {0xFF,3}}},\r
75 Package() {"\\_SB.LPEA", 0x1, Package() {Package() {0x0,3}, Package() {0x1,0}, Package() {0x2,3}, Package() {0x3,3}}},\r
76 Package() {"\\_SB.SDHA", 0x1, Package() {Package() {0xFF,3}}},\r
77 Package() {"\\_SB.SDHB", 0x1, Package() {Package() {0xFF,3}}},\r
78 Package() {"\\_SB.SDHC", 0x1, Package() {Package() {0xFF,3}}},\r
79 Package() {"\\_SB.SPI1", 0x1, Package() {Package() {0xFF,3}}},\r
80 Package() {"\\_SB.URT1", 0x1, Package() {Package() {0xFF,3}}},\r
81 Package() {"\\_SB.URT2", 0x1, Package() {Package() {0xFF,3}}}\r
82 })\r
83 // BCCD crashdump information\r
84 Name(BCCD, Package()\r
85 {\r
86 Package()\r
87 {\r
88 "\\_SB.SDHA",\r
89 Package()\r
90 {\r
91 Package() { Package() {0, 32, 0, 3, 0xFFFFFFFFFFFFFFFF}, Package() {0xFFFFFFFC, 0x0, 0x4}, 0}\r
92 }\r
93 }\r
94 })\r
95\r
96 Method(_STA, 0x0, NotSerialized)\r
97 {\r
98 Return(0xf)\r
99 }\r
100\r
101 Method(_DSM, 0x4, Serialized)\r
102 {\r
103 If(LEqual(Arg0,ToUUID("B8FEBFE0-BAF8-454b-AECD-49FB91137B21")))\r
104 {\r
105\r
106 // Number of fn IDs supported\r
107 If(LEqual(Arg2, Zero))\r
108 {\r
109 Return(Buffer(One)\r
110 {\r
111 0xf\r
112 })\r
113 }\r
114\r
115 // Pep presence\r
116 If(LEqual(Arg2, One))\r
117 {\r
118 Store(0x1, PEPP)\r
119 Return(0xf)\r
120 }\r
121\r
122 // Mitigation devices\r
123 If(LEqual(Arg2, 0x2))\r
124 {\r
125 If(LEqual(Arg1, 0x0))\r
126 {\r
127 // Rev0\r
128 Return(DEVS)\r
129 }\r
130 If(LEqual(Arg1, 0x1))\r
131 {\r
132 // Rev1\r
133 Return(DEVX)\r
134 }\r
135 }\r
136\r
137 // Crashdump device data\r
138 If(LEqual(Arg2, 0x3))\r
139 {\r
140 Store("\\_SB.SDHA", Index(CDMP,0))\r
141 Store(EM1A, Index(CDMP,1))\r
142 Return(CDMP)\r
143 }\r
144 }\r
145 // New UUID for built-in uPEP\r
146 If(LEqual(Arg0,ToUUID("C4EB40A0-6CD2-11E2-BCFD-0800200C9A66")))\r
147 {\r
148\r
149 // Number of fn IDs supported\r
150 If(LEqual(Arg2, Zero))\r
151 {\r
152 Return(Buffer(One)\r
153 {\r
154 0x7\r
155 })\r
156 }\r
157 // LPI device dependencies\r
158 If(LEqual(Arg2, 0x1))\r
159 {\r
160 Return(DEVY)\r
161 }\r
162 // Crashdump device data\r
163 If(LEqual(Arg2, 0x2))\r
164 {\r
165 Store(EM1A, Local0)\r
166 Add(Local0, 0x84, Local0)\r
167 Store(Local0, Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(BCCD, Zero, )), One, )), Zero, )), Zero, )), 0x4, ))\r
168 Return(BCCD)\r
169 }\r
170 }\r
171\r
172 Return(One)\r
173 }\r
174}\r
175\r
176//\r
177// eMMC 4.41\r
178//\r
179Device(SDHA)\r
180{\r
181 Name (_ADR, 0)\r
182 Name (_HID, "80860F14")\r
183 Name (_CID, "PNP0D40")\r
184 Name (_DDN, "Intel(R) eMMC Controller - 80860F14")\r
185 Name (_UID, 1)\r
186 Name(_DEP, Package(0x1)\r
187 {\r
188 PEPD\r
189 })\r
190\r
191 Name (RBF1, ResourceTemplate ()\r
192 {\r
193 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)\r
194 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {45} // eMMC 4.41 IRQ\r
195 })\r
196\r
197 Method (_CRS, 0x0, NotSerialized)\r
198 {\r
199 // Update the Base address for BAR0 of eMMC 4.41\r
200 CreateDwordField(^RBF1, ^BAR0._BAS, B0B1)\r
201 CreateDwordField(^RBF1, ^BAR0._LEN, B0L1)\r
202 Store(eM0A, B0B1)\r
203 Store(eM0L, B0L1)\r
204 Return (RBF1)\r
205 }\r
206 Method (_STA, 0x0, NotSerialized)\r
207 {\r
208 //\r
209 // PCIM>> 0:ACPI mode 1:PCI mode\r
210 // SD1D>> 0:eMMC 4.41 enable 1:eMMC 4.41 disable\r
211 //\r
212 If (LAnd(LEqual(PCIM, 0), LEqual(SD1D, 0)))\r
213 {\r
214 Return (0xF)\r
215 }\r
216 Else\r
217 {\r
218 Return (0x0)\r
219 }\r
220 }\r
221\r
222\r
223 Method (_PS3, 0, NotSerialized)\r
224 {\r
225 OR(PSAT, 0x00000003, PSAT)\r
226 OR(PSAT, 0X00000000, PSAT)\r
227 //\r
228 // If not B1, still keep 2 ms w/a\r
229 //\r
230 If(LLess(SOCS, 0x03))\r
231 {\r
232 Sleep(2)\r
233 }\r
234 }\r
235 Method (_PS0, 0, NotSerialized)\r
236 {\r
237 And(PSAT, 0xfffffffC, PSAT)\r
238 OR(PSAT, 0X00000000, PSAT)\r
239 //\r
240 // If not B1, still keep 2 ms w/a\r
241 //\r
242 If(LLess(SOCS, 0x03))\r
243 {\r
244 Sleep(2)\r
245 }\r
246 }\r
247\r
248 OperationRegion (KEYS, SystemMemory, eM1A, 0x100)\r
249 Field (KEYS, DWordAcc, NoLock, WriteAsZeros)\r
250 {\r
251 Offset (0x84),\r
252 PSAT, 32\r
253 }\r
254\r
255 Method (_DIS, 0x0, NotSerialized)\r
256 {\r
257 //Adding dummy disable methods for device EMM0\r
258 }\r
259\r
260 Device (EMMD)\r
261 {\r
262 Name (_ADR, 0x00000008) // Slot 0, Function 8\r
263 Method (_RMV, 0, NotSerialized)\r
264 {\r
265 Return (0x0)\r
266 }\r
267 }\r
268}\r
269\r
270\r
271//\r
272// eMMC 4.5\r
273//\r
274Device(SDHD)\r
275{\r
276 Name (_ADR, 0)\r
277 Name (_HID, "80860F14")\r
278 Name (_CID, "PNP0D40")\r
279 Name (_DDN, "Intel(R) eMMC Controller - 80860F14")\r
280 Name (_UID, 1)\r
281 Name(_DEP, Package(0x1)\r
282 {\r
283 PEPD\r
284 })\r
285\r
286 Name (RBF1, ResourceTemplate ()\r
287 {\r
288 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)\r
289 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {44} // eMMC 4.5 IRQ\r
290 })\r
291 Method (_CRS, 0x0, NotSerialized)\r
292 {\r
293 CreateDwordField(^RBF1, ^BAR0._BAS, B0B1)\r
294 CreateDwordField(^RBF1, ^BAR0._LEN, B0L1)\r
295 Store(eM0A, B0B1)\r
296 Store(eM0L, B0L1)\r
297 Return (RBF1)\r
298 }\r
299 Method (_STA, 0x0, NotSerialized)\r
300 {\r
301 //\r
302 // PCIM>> 0:ACPI mode 1:PCI mode\r
303 // HSID>> 0:eMMC 4.5 enable 1:eMMC 4.5 disable\r
304 //\r
305 If (LAnd(LEqual(PCIM, 0), LEqual(HSID, 0)))\r
306 {\r
307 Return (0xF)\r
308 }\r
309 Else\r
310 {\r
311 Return (0x0)\r
312 }\r
313 }\r
314\r
315\r
316 Method (_PS3, 0, NotSerialized)\r
317 {\r
318 OR(PSAT, 0x00000003, PSAT)\r
319 OR(PSAT, 0X00000000, PSAT)\r
320 //\r
321 // If not B1, still keep 2 ms w/a\r
322 //\r
323 If(LLess(SOCS, 0x03))\r
324 {\r
325 Sleep(2)\r
326 }\r
327 }\r
328 Method (_PS0, 0, NotSerialized)\r
329 {\r
330 And(PSAT, 0xfffffffC, PSAT)\r
331 OR(PSAT, 0X00000000, PSAT)\r
332 //\r
333 // If not B1, still keep 2 ms w/a\r
334 //\r
335 If(LLess(SOCS, 0x03))\r
336 {\r
337 Sleep(2)\r
338 }\r
339 }\r
340\r
341 OperationRegion (KEYS, SystemMemory, eM1A, 0x100)\r
342 Field (KEYS, DWordAcc, NoLock, WriteAsZeros)\r
343 {\r
344 Offset (0x84),\r
345 PSAT, 32\r
346 }\r
347\r
348 Method (_DIS, 0x0, NotSerialized)\r
349 {\r
350 //Adding dummy disable methods for device EMM0\r
351 }\r
352\r
353 Device (EM45)\r
354 {\r
355 Name (_ADR, 0x00000008) // Slot 0, Function 8\r
356 Method (_RMV, 0, NotSerialized)\r
357 {\r
358 Return (0x0)\r
359 }\r
360 }\r
361}\r
362\r
363\r
364//\r
365// SDIO\r
366//\r
367Device(SDHB)\r
368{\r
369 Name (_ADR, 0)\r
370 Name (_HID, "INT33BB")\r
371 Name (_CID, "PNP0D40")\r
372 Name (_DDN, "Intel(R) SDIO Controller - 80860F15")\r
373 Name (_UID, 2)\r
374 Name (_HRV, 2)\r
375 Name(_DEP, Package(0x01)\r
376 {\r
377 PEPD\r
378 })\r
379 Name (PSTS, 0x0)\r
380\r
381 Name (RBUF, ResourceTemplate ()\r
382 {\r
383 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)\r
384 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {46} // SDIO IRQ\r
385 })\r
386\r
387 Method (_CRS, 0x0, NotSerialized)\r
388 {\r
389\r
390 CreateDwordField(^RBUF, ^BAR0._BAS, B0BA)\r
391 CreateDwordField(^RBUF, ^BAR0._LEN, B0LN)\r
392 Store(SI0A, B0BA)\r
393 Store(SI0L, B0LN)\r
394 Return (RBUF)\r
395 }\r
396 Method (_STA, 0x0, NotSerialized)\r
397 {\r
398 If (LLessEqual(STEP, 0x04))\r
399 {\r
400 //A stepping\r
401 Store(SDMD, _HRV)\r
402 }\r
403\r
404 //\r
405 // PCIM>> 0:ACPI mode 1:PCI mode\r
406 //\r
407 If (LEqual(PCIM, 1)) {\r
408 Return (0x0)\r
409 }\r
410\r
411 If (LOr(LEqual(SI0A, 0), LEqual(SD2D, 1)))\r
412 {\r
413 Return (0x0)\r
414 }\r
415 Return (0xF)\r
416 }\r
417 Method (_DIS, 0x0, NotSerialized)\r
418 {\r
419 //Adding dummy disable methods for device EMM0\r
420 }\r
421\r
422 Method (_PS3, 0, NotSerialized)\r
423 {\r
424 OR(PSAT, 0x00000003, PSAT)\r
425 OR(PSAT, 0X00000000, PSAT)\r
426 }\r
427 Method (_PS0, 0, NotSerialized)\r
428 {\r
429 And(PSAT, 0xfffffffC, PSAT)\r
430 OR(PSAT, 0X00000000, PSAT)\r
431\r
432 if(LEqual(\_SB.SDHB.PSTS,0x0))\r
433 {\r
434 if(LEqual (\_SB.GPO2.AVBL, 1))\r
435 {\r
436 Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state\r
437 Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON\r
438 }\r
439 }\r
440\r
441\r
442 }\r
443 OperationRegion (KEYS, SystemMemory, SI1A, 0x100)\r
444 Field (KEYS, DWordAcc, NoLock, WriteAsZeros)\r
445 {\r
446 Offset (0x84),\r
447 PSAT, 32\r
448 }\r
449\r
450\r
451 Device (BRCM)\r
452 {\r
453 Name (_ADR, 0x01) //SlotNumber + Function\r
454 Name (_DEP, Package() {\_SB.GPO2})\r
455\r
456 Method (_RMV, 0, NotSerialized)\r
457 {\r
458 Return (0x0)\r
459 }\r
460 Name (_PRW, Package() {0, 0})\r
461 Name (_S4W, 2)\r
462\r
463 Method (_CRS, 0, Serialized)\r
464 {\r
465 Name (RBUF, ResourceTemplate ()\r
466 {\r
467 Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {73}\r
468 })\r
469 Return (RBUF)\r
470 }\r
471\r
472 Method (_PS3, 0, NotSerialized)\r
473 {\r
474 if(LEqual (\_SB.GPO2.AVBL, 1))\r
475 {\r
476 Store( 0x00, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 0 puts the device in reset state\r
477 Store( 0x00, \_SB.SDHB.PSTS) //Indicates that the device is powered off\r
478 }\r
479\r
480 }\r
481 Method (_PS0, 0, NotSerialized)\r
482 {\r
483 if(LEqual(\_SB.SDHB.PSTS,0x0))\r
484 {\r
485 if(LEqual (\_SB.GPO2.AVBL, 1))\r
486 {\r
487 Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state\r
488 Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON\r
489 }\r
490 }\r
491 }\r
492 } // Device (BRCM)\r
493 //\r
494 // Secondary Broadcom WIFI function\r
495 //\r
496 Device(BRC2)\r
497 {\r
498 Name(_ADR, 0x2) // function 2\r
499 Name(_STA, 0xf)\r
500 //\r
501 // The device is not removable. This must be a method.\r
502 //\r
503 Method(_RMV, 0x0, NotSerialized)\r
504 {\r
505 Return(0x0)\r
506 }\r
507\r
508 //\r
509 // Describe a vendor-defined connection between this device and the\r
510 // primary wifi device\r
511 //\r
512\r
513 Method(_CRS)\r
514 {\r
515 Name(NAM, Buffer() {"\\_SB.SDHB.BRCM"})\r
516 Name(SPB, Buffer()\r
517 {\r
518 0x8E, // SPB Descriptor\r
519 0x18, 0x00, // Length including NAM above\r
520 0x01, // +0x00 SPB Descriptor Revision\r
521 0x00, // +0x01 Resource Source Index\r
522 0xc0, // +0x02 Bus type - vendor defined\r
523 0x02, // +0x03 Consumer + controller initiated\r
524 0x00, 0x00, // +0x04 Type specific flags\r
525 0x01, // +0x06 Type specific revision\r
526 0x00, 0x00 // +0x07 type specific data length\r
527 // +0x09 - 0xf bytes for NULL-terminated NAM\r
528 // Length = 0x18\r
529 })\r
530\r
531 Name(END, Buffer() {0x79, 0x00})\r
532 Concatenate(SPB, NAM, Local0)\r
533 Concatenate(Local0, END, Local1)\r
534 Return(Local1)\r
535 }\r
536 }\r
537\r
538}\r
539\r
540//\r
541// SD Card\r
542//\r
543Device(SDHC)\r
544{\r
545 Name (_ADR, 0)\r
546 Name (_HID, "80860F16")\r
547 Name (_CID, "PNP0D40")\r
548 Name (_DDN, "Intel(R) SD Card Controller - 80860F16")\r
549 Name (_UID, 3)\r
550 Name(_DEP, Package(0x01)\r
551 {\r
552 PEPD\r
553 })\r
554 Name (RBUF, ResourceTemplate ()\r
555 {\r
556 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)\r
557 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {47} // SD Card IRQ\r
558 })\r
559 Method (_CRS, 0x0, NotSerialized)\r
560 {\r
561 CreateDwordField(^RBUF, ^BAR0._BAS, B0BA)\r
562 CreateDwordField(^RBUF, ^BAR0._LEN, B0LN)\r
563 Store(SD0A, B0BA)\r
564 Store(SD0L, B0LN)\r
565 Return (RBUF)\r
566 }\r
567 Method (_STA, 0x0, NotSerialized)\r
568 {\r
569 //\r
570 // PCIM>> 0:ACPI mode 1:PCI mode\r
571 //\r
572 If (LEqual(PCIM, 1)) {\r
573 Return (0x0)\r
574 }\r
575\r
576 If (LOr(LEqual(SD0A, 0), LEqual(SD3D, 1)))\r
577 {\r
578 Return (0x0)\r
579 }\r
580 Return (0xF)\r
581 }\r
582\r
583 Method (_PS3, 0, NotSerialized)\r
584 {\r
585 OR(PSAT, 0x00000003, PSAT)\r
586 OR(PSAT, 0X00000000, PSAT)\r
587 }\r
588 Method (_PS0, 0, NotSerialized)\r
589 {\r
590 And(PSAT, 0xfffffffC, PSAT)\r
591 OR(PSAT, 0X00000000, PSAT)\r
592 }\r
593 OperationRegion (KEYS, SystemMemory, SD1A, 0x100)\r
594 Field (KEYS, DWordAcc, NoLock, WriteAsZeros)\r
595 {\r
596 Offset (0x84),\r
597 PSAT, 32\r
598 }\r
599\r
600 Device (CARD)\r
601 {\r
602 Name (_ADR, 0x00000008)\r
603 Method(_RMV, 0x0, NotSerialized)\r
604 {\r
605 // SDRM = 0 non-removable;\r
606 If (LEqual(SDRM, 0))\r
607 {\r
608 Return (0)\r
609 }\r
610\r
611 Return (1)\r
612 }\r
613 }\r
614\r
615}\r
616\r
EFI Development Kit II mirror for PVE