Vlv2DeviceRefCodePkg/ValleyView2Soc: Remove the unused code
[mirror_edk2.git] / Vlv2DeviceRefCodePkg / ValleyView2Soc / SouthCluster / Include / PchRegs.h
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1/**\r
2\r
3Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved\r
4\r
5 This program and the accompanying materials are licensed and made available under\r
6 the terms and conditions of the BSD License that accompanies this distribution.\r
7 The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php.\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13\r
14\r
15 @file\r
16 PchRegs.h\r
17\r
18 @brief\r
19 Register names for VLV SC.\r
20\r
21 Conventions:\r
22\r
23 - Prefixes:\r
24 Definitions beginning with "R_" are registers\r
25 Definitions beginning with "B_" are bits within registers\r
26 Definitions beginning with "V_" are meaningful values of bits within the registers\r
27 Definitions beginning with "S_" are register sizes\r
28 Definitions beginning with "N_" are the bit position\r
29 - In general, PCH registers are denoted by "_PCH_" in register names\r
30 - Registers / bits that are different between PCH generations are denoted by\r
31 "_PCH_<generation_name>_" in register/bit names. e.g., "_PCH_VLV_"\r
32 - Registers / bits that are different between SKUs are denoted by "_<SKU_name>"\r
33 at the end of the register/bit names\r
34 - Registers / bits of new devices introduced in a PCH generation will be just named\r
35 as "_PCH_" without <generation_name> inserted.\r
36\r
37**/\r
38#ifndef _PCH_REGS_H_\r
39#define _PCH_REGS_H_\r
40\r
41///\r
42/// Bit Definitions. BUGBUG: drive these definitions to code base. Should not need\r
43/// to be part of chipset modules\r
44///\r
45#ifndef BIT0\r
46#define BIT0 0x0001\r
47#define BIT1 0x0002\r
48#define BIT2 0x0004\r
49#define BIT3 0x0008\r
50#define BIT4 0x0010\r
51#define BIT5 0x0020\r
52#define BIT6 0x0040\r
53#define BIT7 0x0080\r
54#define BIT8 0x0100\r
55#define BIT9 0x0200\r
56#define BIT10 0x0400\r
57#define BIT11 0x0800\r
58#define BIT12 0x1000\r
59#define BIT13 0x2000\r
60#define BIT14 0x4000\r
61#define BIT15 0x8000\r
62#define BIT16 0x00010000\r
63#define BIT17 0x00020000\r
64#define BIT18 0x00040000\r
65#define BIT19 0x00080000\r
66#define BIT20 0x00100000\r
67#define BIT21 0x00200000\r
68#define BIT22 0x00400000\r
69#define BIT23 0x00800000\r
70#define BIT24 0x01000000\r
71#define BIT25 0x02000000\r
72#define BIT26 0x04000000\r
73#define BIT27 0x08000000\r
74#define BIT28 0x10000000\r
75#define BIT29 0x20000000\r
76#define BIT30 0x40000000\r
77#define BIT31 0x80000000\r
78#define BIT32 0x100000000\r
79#define BIT33 0x200000000\r
80#define BIT34 0x400000000\r
81#define BIT35 0x800000000\r
82#define BIT36 0x1000000000\r
83#define BIT37 0x2000000000\r
84#define BIT38 0x4000000000\r
85#define BIT39 0x8000000000\r
86#define BIT40 0x10000000000\r
87#define BIT41 0x20000000000\r
88#define BIT42 0x40000000000\r
89#define BIT43 0x80000000000\r
90#define BIT44 0x100000000000\r
91#define BIT45 0x200000000000\r
92#define BIT46 0x400000000000\r
93#define BIT47 0x800000000000\r
94#define BIT48 0x1000000000000\r
95#define BIT49 0x2000000000000\r
96#define BIT50 0x4000000000000\r
97#define BIT51 0x8000000000000\r
98#define BIT52 0x10000000000000\r
99#define BIT53 0x20000000000000\r
100#define BIT54 0x40000000000000\r
101#define BIT55 0x80000000000000\r
102#define BIT56 0x100000000000000\r
103#define BIT57 0x200000000000000\r
104#define BIT58 0x400000000000000\r
105#define BIT59 0x800000000000000\r
106#define BIT60 0x1000000000000000\r
107#define BIT61 0x2000000000000000\r
108#define BIT62 0x4000000000000000\r
109#define BIT63 0x8000000000000000\r
110#endif\r
111///\r
112/// The default PCH PCI bus number\r
113///\r
114#define DEFAULT_PCI_BUS_NUMBER_PCH 0\r
115\r
116///\r
117/// Default Vendor ID and Subsystem ID\r
118///\r
119#define V_PCH_INTEL_VENDOR_ID 0x8086\r
120#define V_PCH_DEFAULT_SID 0x7270\r
121#define V_PCH_DEFAULT_SVID_SID (V_PCH_INTEL_VENDOR_ID + (V_PCH_DEFAULT_SID << 16))\r
122\r
123///\r
124/// Include device register definitions\r
125///\r
126#include "PchRegs/PchRegsHda.h"\r
127#include "PchRegs/PchRegsLpss.h"\r
128#include "PchRegs/PchRegsPcie.h"\r
129#include "PchRegs/PchRegsPcu.h"\r
130#include "PchRegs/PchRegsRcrb.h"\r
131#include "PchRegs/PchRegsSata.h"\r
132#include "PchRegs/PchRegsScc.h"\r
133#include "PchRegs/PchRegsSmbus.h"\r
134#include "PchRegs/PchRegsSpi.h"\r
135#include "PchRegs/PchRegsUsb.h"\r
136//#include "PchRegs/PchRegsLpe.h"\r
137\r
138///\r
139/// Device IDS that are PCH Server specific\r
140///\r
141#define IS_PCH_DEVICE_ID(DeviceId) \\r
142 ( \\r
143 (DeviceId == V_PCH_LPC_DEVICE_ID_0) || \\r
144 (DeviceId == V_PCH_LPC_DEVICE_ID_1) || \\r
145 (DeviceId == V_PCH_LPC_DEVICE_ID_2) || \\r
146 (DeviceId == V_PCH_LPC_DEVICE_ID_3) \\r
147 )\r
148\r
149#define IS_PCH_VLV_LPC_DEVICE_ID(DeviceId) \\r
150 ( \\r
151 IS_PCH_DEVICE_ID (DeviceId) \\r
152 )\r
153\r
154#define IS_PCH_VLV_SATA_DEVICE_ID(DeviceId) \\r
155 ( \\r
156 IS_PCH_VLV_SATA_AHCI_DEVICE_ID (DeviceId) || \\r
157 IS_PCH_VLV_SATA_MODE_DEVICE_ID (DeviceId) || \\r
158 IS_PCH_VLV_SATA_RAID_DEVICE_ID (DeviceId) \\r
159 )\r
160\r
161#define IS_PCH_VLV_SATA_AHCI_DEVICE_ID(DeviceId) \\r
162 ( \\r
163 (DeviceId == V_PCH_SATA_DEVICE_ID_D_AHCI) || \\r
164 (DeviceId == V_PCH_SATA_DEVICE_ID_M_AHCI) \\r
165 )\r
166\r
167#define IS_PCH_VLV_SATA_RAID_DEVICE_ID(DeviceId) \\r
168 ( \\r
169 (DeviceId == V_PCH_SATA_DEVICE_ID_D_RAID) || \\r
170 (DeviceId == V_PCH_SATA_DEVICE_ID_M_RAID) \\r
171 )\r
172\r
173#define IS_PCH_VLV_SATA_MODE_DEVICE_ID(DeviceId) \\r
174 ( \\r
175 (DeviceId == V_PCH_SATA_DEVICE_ID_D_IDE) || \\r
176 (DeviceId == V_PCH_SATA_DEVICE_ID_M_IDE) \\r
177 )\r
178#define IS_PCH_VLV_USB_DEVICE_ID(DeviceId) \\r
179 ( \\r
180 (DeviceId == V_PCH_USB_DEVICE_ID_0) || \\r
181 (DeviceId == V_PCH_USB_DEVICE_ID_1) \\r
182 )\r
183#define IS_PCH_VLV_PCIE_DEVICE_ID(DeviceId) \\r
184 ( \\r
185 (DeviceId == V_PCH_PCIE_DEVICE_ID_0) || \\r
186 (DeviceId == V_PCH_PCIE_DEVICE_ID_1) || \\r
187 (DeviceId == V_PCH_PCIE_DEVICE_ID_2) || \\r
188 (DeviceId == V_PCH_PCIE_DEVICE_ID_3) || \\r
189 (DeviceId == V_PCH_PCIE_DEVICE_ID_4) || \\r
190 (DeviceId == V_PCH_PCIE_DEVICE_ID_5) || \\r
191 (DeviceId == V_PCH_PCIE_DEVICE_ID_6) || \\r
192 (DeviceId == V_PCH_PCIE_DEVICE_ID_7) \\r
193 )\r
194\r
195///\r
196/// Any device ID that is Valleyview SC\r
197///\r
198#define IS_PCH_VLV_DEVICE_ID(DeviceId) \\r
199 ( \\r
200 IS_PCH_VLV_LPC_DEVICE_ID (DeviceId) || \\r
201 IS_PCH_VLV_SATA_DEVICE_ID (DeviceId) || \\r
202 IS_PCH_VLV_USB_DEVICE_ID (DeviceId) || \\r
203 IS_PCH_VLV_PCIE_DEVICE_ID (DeviceId) || \\r
204 (DeviceId) == V_PCH_SMBUS_DEVICE_ID || \\r
205 (DeviceId) == V_PCH_HDA_DEVICE_ID_0 || \\r
206 (DeviceId) == V_PCH_HDA_DEVICE_ID_1 \\r
207 )\r
208\r
209#define IS_SUPPORTED_DEVICE_ID(DeviceId) IS_PCH_VLV_DEVICE_ID (DeviceId)\r
210\r
211#endif\r