[mirror_edk2.git] / Vlv2DeviceRefCodePkg / ValleyView2Soc / SouthCluster / Include / Protocol / SdHostIo.h

/*++\r
\r
Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved\r
\r
  This program and the accompanying materials are licensed and made available under\r
  the terms and conditions of the BSD License that accompanies this distribution.\r
  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php.\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
\r
--*/\r
\r
\r
/*++\r
Module Name:\r
\r
  SdHostIo.h\r
\r
Abstract:\r
\r
  Interface definition for EFI_SD_HOST_IO_PROTOCOL\r
\r
--*/\r
\r
#ifndef _SD_HOST_IO_H\r
#define _SD_HOST_IO_H\r
\r
\r
// Global ID for the EFI_SD_HOST_IO_PROTOCOL\r
// {B63F8EC7-A9C9-4472-A4C0-4D8BF365CC51}\r
//\r
#define EFI_SD_HOST_IO_PROTOCOL_GUID \\r
  { 0xb63f8ec7, 0xa9c9, 0x4472, { 0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51 } }\r
\r
typedef struct _EFI_SD_HOST_IO_PROTOCOL EFI_SD_HOST_IO_PROTOCOL;\r
\r
//\r
// TODO: Move to Pci22.h\r
//\r
#define PCI_SUBCLASS_SD_HOST_CONTROLLER   0x05\r
#define PCI_IF_STANDARD_HOST_NO_DMA       0x00\r
#define PCI_IF_STANDARD_HOST_SUPPORT_DMA  0x01\r
\r
//\r
// TODO: Retire\r
//\r
#define EFI_SD_HOST_IO_PROTOCOL_REVISION_01          0x01\r
\r
//\r
// TODO: Do these belong in an Industry Standard include file?\r
//\r
// MMIO Registers definition for MMC/SDIO controller\r
//\r
#define  MMIO_DMAADR                     0x00\r
#define  MMIO_BLKSZ                      0x04\r
#define  MMIO_BLKCNT                     0x06\r
#define  MMIO_CMDARG                     0x08\r
#define  MMIO_XFRMODE                    0x0C\r
#define  MMIO_SDCMD                      0x0E\r
#define  MMIO_RESP                       0x10\r
#define  MMIO_BUFDATA                    0x20\r
#define  MMIO_PSTATE                     0x24\r
#define  MMIO_HOSTCTL                    0x28\r
#define  MMIO_PWRCTL                     0x29\r
#define  MMIO_BLKGAPCTL                  0x2A\r
#define  MMIO_WAKECTL                    0x2B\r
#define  MMIO_CLKCTL                     0x2C\r
#define  MMIO_TOCTL                      0x2E\r
#define  MMIO_SWRST                      0x2F\r
#define  MMIO_NINTSTS                    0x30\r
#define  MMIO_ERINTSTS                   0x32\r
#define  MMIO_NINTEN                     0x34\r
#define  MMIO_ERINTEN                    0x36\r
#define  MMIO_NINTSIGEN                  0x38\r
#define  MMIO_ERINTSIGEN                 0x3A\r
#define  MMIO_AC12ERRSTS                 0x3C\r
#define  MMIO_HOST_CTL2                  0x3E //hphang <- New in VLV2\r
#define  MMIO_CAP                        0x40\r
#define  MMIO_CAP2                       0x44 //hphang <- New in VLV2\r
#define  MMIO_MCCAP                      0x48\r
#define  MMIO_FORCEEVENTCMD12ERRSTAT     0x50 //hphang <- New in VLV2\r
#define  MMIO_FORCEEVENTERRINTSTAT       0x52 //hphang <- New in VLV2\r
#define  MMIO_ADMAERRSTAT                0x54 //hphang <- New in VLV2\r
#define  MMIO_ADMASYSADDR                0x58 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE0               0x60 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE1               0x64 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE2               0x68 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE3               0x6C //hphang <- New in VLV2\r
#define  MMIO_BOOTTIMEOUTCTRL            0x70 //hphang <- New in VLV2\r
#define  MMIO_DEBUGSEL                   0x74 //hphang <- New in VLV2\r
#define  MMIO_SHAREDBUS                  0xE0 //hphang <- New in VLV2\r
#define  MMIO_SPIINTSUP                  0xF0 //hphang <- New in VLV2\r
#define  MMIO_SLTINTSTS                  0xFC\r
#define  MMIO_CTRLRVER                   0xFE\r
\r
typedef enum {\r
  ResponseNo = 0,\r
  ResponseR1,\r
  ResponseR1b,\r
  ResponseR2,\r
  ResponseR3,\r
  ResponseR4,\r
  ResponseR5,\r
  ResponseR5b,\r
  ResponseR6,\r
  ResponseR7\r
} RESPONSE_TYPE;\r
\r
typedef enum {\r
  NoData = 0,\r
  InData,\r
  OutData\r
} TRANSFER_TYPE;\r
\r
typedef enum {\r
  Reset_Auto = 0,\r
  Reset_DAT,\r
  Reset_CMD,\r
  Reset_DAT_CMD,\r
  Reset_All,\r
  Reset_HW\r
} RESET_TYPE;\r
\r
\r
typedef enum {\r
  SDMA = 0,\r
  ADMA2,\r
  PIO\r
} DMA_MOD;\r
\r
typedef struct {\r
  UINT32  HighSpeedSupport:    1;  //High speed supported\r
  UINT32  V18Support:          1;  //1.8V supported\r
  UINT32  V30Support:          1;  //3.0V supported\r
  UINT32  V33Support:          1;  //3.3V supported\r
  UINT32  SDR50Support:        1;\r
  UINT32  SDR104Support:       1;\r
  UINT32  DDR50Support:        1;\r
  UINT32  Reserved0:           1;\r
  UINT32  BusWidth4:           1;  // 4 bit width\r
  UINT32  BusWidth8:           1;  // 8 bit width\r
  UINT32  Reserved1:           6;\r
  UINT32  SDMASupport:         1;\r
  UINT32  ADMA2Support:        1;\r
  UINT32  DmaMode:             2;\r
  UINT32  ReTuneTimer:         4;\r
  UINT32  ReTuneMode:          2;\r
  UINT32  Reserved2:           6;\r
  UINT32  BoundarySize;\r
} HOST_CAPABILITY;\r
\r
/*++\r
\r
  Routine Description:\r
    The main function used to send the command to the card inserted into the SD host\r
    slot.\r
    It will assemble the arguments to set the command register and wait for the command\r
    and transfer completed until timeout. Then it will read the response register to fill\r
    the ResponseData\r
\r
  Arguments:\r
    This           - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    CommandIndex   - The command index to set the command index field of command register\r
    Argument       - Command argument to set the argument field of command register\r
    DataType       - TRANSFER_TYPE, indicates no data, data in or data out\r
    Buffer         - Contains the data read from / write to the device\r
    BufferSize     - The size of the buffer\r
    ResponseType   - RESPONSE_TYPE\r
    TimeOut        - Time out value in 1 ms unit\r
    ResponseData   - Depending on the ResponseType, such as CSD or card status\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
    EFI_OUT_OF_RESOURCES\r
    EFI_TIMEOUT\r
    EFI_DEVICE_ERROR\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND) (\r
  IN   EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN   UINT16                     CommandIndex,\r
  IN   UINT32                     Argument,\r
  IN   TRANSFER_TYPE              DataType,\r
  IN   UINT8                      *Buffer, OPTIONAL\r
  IN   UINT32                     BufferSize,\r
  IN   RESPONSE_TYPE              ResponseType,\r
  IN   UINT32                     TimeOut,\r
  OUT  UINT32                     *ResponseData OPTIONAL\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set max clock frequency of the host, the actual frequency\r
    may not be the same as MaxFrequency. It depends on\r
    the max frequency the host can support, divider, and host\r
    speed mode.\r
\r
  Arguments:\r
    This           - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    MaxFrequency   - Max frequency in HZ\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     MaxFrequency\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set bus width of the host\r
\r
  Arguments:\r
    This       - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    BusWidth   - Bus width in 1, 4, 8 bits\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     BusWidth\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set voltage which could supported by the host.\r
    Support 0(Power off the host), 1.8V, 3.0V, 3.3V\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    Voltage   - Units in 0.1 V\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     Voltage\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set Host High Speed\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    HighSpeed   - True for High Speed Mode set, false for normal mode\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     HighSpeed\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set High Speed Mode\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    SetHostDdrMode   - True for DDR Mode set, false for normal mode\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     DdrMode\r
  );\r
\r
\r
/*++\r
\r
  Routine Description:\r
   Reset the host\r
\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    ResetAll  - TRUE to reset all\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  RESET_TYPE                 ResetType\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
   Reset the host\r
\r
  Arguments:\r
    This    - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    Enable  - TRUE to enable, FALSE to disable\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  BOOLEAN                    Enable\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Find whether these is a card inserted into the slot. If so\r
    init the host. If not, return EFI_NOT_FOUND.\r
\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_NOT_FOUND\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
   Set the Block length\r
\r
  Arguments:\r
    This        - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    BlockLength - card supportes block length\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     BlockLength\r
  );\r
\r
typedef EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE)(\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This\r
  );\r
\r
\r
\r
//\r
// Interface structure for the EFI SD Host I/O Protocol\r
//\r
struct _EFI_SD_HOST_IO_PROTOCOL {\r
  UINT32                                             Revision;\r
  HOST_CAPABILITY                                    HostCapability;\r
  EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND               SendCommand;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY        SetClockFrequency;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH              SetBusWidth;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE           SetHostVoltage;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE          SetHostDdrMode;\r
  EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST              ResetSdHost;\r
  EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD       EnableAutoStopCmd;\r
  EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST  DetectCardAndInitHost;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH           SetBlockLength;\r
  EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE               SetupDevice;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE        SetHostSpeedMode;\r
};\r
\r
extern EFI_GUID gEfiSdHostIoProtocolGuid;\r
\r
#endif\r
\r
Commit	Line	Data
3cbfba02 DW	1	/*++\r
	2	\r
	3	Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
	4	\r
	5	This program and the accompanying materials are licensed and made available under\r
	6	the terms and conditions of the BSD License that accompanies this distribution.\r
	7	The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php.\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	\r
	14	--*/\r
	15	\r
	16	\r
	17	/*++\r
	18	Module Name:\r
	19	\r
	20	SdHostIo.h\r
	21	\r
	22	Abstract:\r
	23	\r
	24	Interface definition for EFI_SD_HOST_IO_PROTOCOL\r
	25	\r
	26	--*/\r
	27	\r
	28	#ifndef _SD_HOST_IO_H\r
	29	#define _SD_HOST_IO_H\r
	30	\r
	31	\r
	32	// Global ID for the EFI_SD_HOST_IO_PROTOCOL\r
	33	// {B63F8EC7-A9C9-4472-A4C0-4D8BF365CC51}\r
	34	//\r
	35	#define EFI_SD_HOST_IO_PROTOCOL_GUID \\r
	36	{ 0xb63f8ec7, 0xa9c9, 0x4472, { 0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51 } }\r
	37	\r
	38	typedef struct _EFI_SD_HOST_IO_PROTOCOL EFI_SD_HOST_IO_PROTOCOL;\r
	39	\r
	40	//\r
	41	// TODO: Move to Pci22.h\r
	42	//\r
	43	#define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05\r
	44	#define PCI_IF_STANDARD_HOST_NO_DMA 0x00\r
	45	#define PCI_IF_STANDARD_HOST_SUPPORT_DMA 0x01\r
	46	\r
	47	//\r
	48	// TODO: Retire\r
	49	//\r
	50	#define EFI_SD_HOST_IO_PROTOCOL_REVISION_01 0x01\r
	51	\r
	52	//\r
	53	// TODO: Do these belong in an Industry Standard include file?\r
	54	//\r
	55	// MMIO Registers definition for MMC/SDIO controller\r
	56	//\r
	57	#define MMIO_DMAADR 0x00\r
	58	#define MMIO_BLKSZ 0x04\r
	59	#define MMIO_BLKCNT 0x06\r
	60	#define MMIO_CMDARG 0x08\r
	61	#define MMIO_XFRMODE 0x0C\r
	62	#define MMIO_SDCMD 0x0E\r
	63	#define MMIO_RESP 0x10\r
	64	#define MMIO_BUFDATA 0x20\r
65	#define MMIO_PSTATE 0x24\r
66	#define MMIO_HOSTCTL 0x28\r
67	#define MMIO_PWRCTL 0x29\r
68	#define MMIO_BLKGAPCTL 0x2A\r
69	#define MMIO_WAKECTL 0x2B\r
70	#define MMIO_CLKCTL 0x2C\r
71	#define MMIO_TOCTL 0x2E\r
72	#define MMIO_SWRST 0x2F\r
73	#define MMIO_NINTSTS 0x30\r
74	#define MMIO_ERINTSTS 0x32\r
75	#define MMIO_NINTEN 0x34\r
76	#define MMIO_ERINTEN 0x36\r
77	#define MMIO_NINTSIGEN 0x38\r
78	#define MMIO_ERINTSIGEN 0x3A\r
79	#define MMIO_AC12ERRSTS 0x3C\r
80	#define MMIO_HOST_CTL2 0x3E //hphang <- New in VLV2\r
81	#define MMIO_CAP 0x40\r
82	#define MMIO_CAP2 0x44 //hphang <- New in VLV2\r
83	#define MMIO_MCCAP 0x48\r
84	#define MMIO_FORCEEVENTCMD12ERRSTAT 0x50 //hphang <- New in VLV2\r
85	#define MMIO_FORCEEVENTERRINTSTAT 0x52 //hphang <- New in VLV2\r
86	#define MMIO_ADMAERRSTAT 0x54 //hphang <- New in VLV2\r
87	#define MMIO_ADMASYSADDR 0x58 //hphang <- New in VLV2\r
88	#define MMIO_PRESETVALUE0 0x60 //hphang <- New in VLV2\r
89	#define MMIO_PRESETVALUE1 0x64 //hphang <- New in VLV2\r
90	#define MMIO_PRESETVALUE2 0x68 //hphang <- New in VLV2\r
91	#define MMIO_PRESETVALUE3 0x6C //hphang <- New in VLV2\r
92	#define MMIO_BOOTTIMEOUTCTRL 0x70 //hphang <- New in VLV2\r
93	#define MMIO_DEBUGSEL 0x74 //hphang <- New in VLV2\r
94	#define MMIO_SHAREDBUS 0xE0 //hphang <- New in VLV2\r
95	#define MMIO_SPIINTSUP 0xF0 //hphang <- New in VLV2\r
96	#define MMIO_SLTINTSTS 0xFC\r
97	#define MMIO_CTRLRVER 0xFE\r
98	\r
99	typedef enum {\r
100	ResponseNo = 0,\r
101	ResponseR1,\r
102	ResponseR1b,\r
103	ResponseR2,\r
104	ResponseR3,\r
105	ResponseR4,\r
106	ResponseR5,\r
107	ResponseR5b,\r
108	ResponseR6,\r
109	ResponseR7\r
110	} RESPONSE_TYPE;\r
111	\r
112	typedef enum {\r
113	NoData = 0,\r
114	InData,\r
115	OutData\r
116	} TRANSFER_TYPE;\r
117	\r
118	typedef enum {\r
119	Reset_Auto = 0,\r
120	Reset_DAT,\r
121	Reset_CMD,\r
122	Reset_DAT_CMD,\r
123	Reset_All,\r
124	Reset_HW\r
125	} RESET_TYPE;\r
126	\r
127	\r
128	typedef enum {\r
129	SDMA = 0,\r
130	ADMA2,\r
131	PIO\r
132	} DMA_MOD;\r
133	\r
134	typedef struct {\r
135	UINT32 HighSpeedSupport: 1; //High speed supported\r
136	UINT32 V18Support: 1; //1.8V supported\r
137	UINT32 V30Support: 1; //3.0V supported\r
138	UINT32 V33Support: 1; //3.3V supported\r
139	UINT32 SDR50Support: 1;\r
140	UINT32 SDR104Support: 1;\r
141	UINT32 DDR50Support: 1;\r
142	UINT32 Reserved0: 1;\r
143	UINT32 BusWidth4: 1; // 4 bit width\r
144	UINT32 BusWidth8: 1; // 8 bit width\r
145	UINT32 Reserved1: 6;\r
146	UINT32 SDMASupport: 1;\r
147	UINT32 ADMA2Support: 1;\r
148	UINT32 DmaMode: 2;\r
149	UINT32 ReTuneTimer: 4;\r
150	UINT32 ReTuneMode: 2;\r
151	UINT32 Reserved2: 6;\r
152	UINT32 BoundarySize;\r
153	} HOST_CAPABILITY;\r
154	\r
155	/*++\r
156	\r
157	Routine Description:\r
158	The main function used to send the command to the card inserted into the SD host\r
159	slot.\r
160	It will assemble the arguments to set the command register and wait for the command\r
161	and transfer completed until timeout. Then it will read the response register to fill\r
162	the ResponseData\r
163	\r
164	Arguments:\r
165	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
166	CommandIndex - The command index to set the command index field of command register\r
167	Argument - Command argument to set the argument field of command register\r
168	DataType - TRANSFER_TYPE, indicates no data, data in or data out\r
169	Buffer - Contains the data read from / write to the device\r
170	BufferSize - The size of the buffer\r
171	ResponseType - RESPONSE_TYPE\r
172	TimeOut - Time out value in 1 ms unit\r
173	ResponseData - Depending on the ResponseType, such as CSD or card status\r
174	\r
175	Returns:\r
176	EFI_SUCCESS\r
177	EFI_INVALID_PARAMETER\r
178	EFI_OUT_OF_RESOURCES\r
179	EFI_TIMEOUT\r
180	EFI_DEVICE_ERROR\r
181	\r
182	--*/\r
183	typedef\r
184	EFI_STATUS\r
185	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND) (\r
186	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
187	IN UINT16 CommandIndex,\r
188	IN UINT32 Argument,\r
189	IN TRANSFER_TYPE DataType,\r
190	IN UINT8 *Buffer, OPTIONAL\r
191	IN UINT32 BufferSize,\r
192	IN RESPONSE_TYPE ResponseType,\r
193	IN UINT32 TimeOut,\r
194	OUT UINT32 *ResponseData OPTIONAL\r
195	);\r
196	\r
197	/*++\r
198	\r
199	Routine Description:\r
200	Set max clock frequency of the host, the actual frequency\r
201	may not be the same as MaxFrequency. It depends on\r
202	the max frequency the host can support, divider, and host\r
203	speed mode.\r
204	\r
205	Arguments:\r
206	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
207	MaxFrequency - Max frequency in HZ\r
208	\r
209	Returns:\r
210	EFI_SUCCESS\r
211	EFI_TIMEOUT\r
212	--*/\r
213	typedef\r
214	EFI_STATUS\r
215	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY) (\r
216	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
217	IN UINT32 MaxFrequency\r
218	);\r
219	\r
220	/*++\r
221	\r
222	Routine Description:\r
223	Set bus width of the host\r
224	\r
225	Arguments:\r
226	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
227	BusWidth - Bus width in 1, 4, 8 bits\r
228	\r
229	Returns:\r
230	EFI_SUCCESS\r
231	EFI_INVALID_PARAMETER\r
232	\r
233	--*/\r
234	typedef\r
235	EFI_STATUS\r
236	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH) (\r
237	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
238	IN UINT32 BusWidth\r
239	);\r
240	\r
241	/*++\r
242	\r
243	Routine Description:\r
244	Set voltage which could supported by the host.\r
245	Support 0(Power off the host), 1.8V, 3.0V, 3.3V\r
246	Arguments:\r
247	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
248	Voltage - Units in 0.1 V\r
249	\r
250	Returns:\r
251	EFI_SUCCESS\r
252	EFI_INVALID_PARAMETER\r
253	\r
254	--*/\r
255	typedef\r
256	EFI_STATUS\r
257	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE) (\r
258	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
259	IN UINT32 Voltage\r
260	);\r
261	\r
262	/*++\r
263	\r
264	Routine Description:\r
265	Set Host High Speed\r
266	Arguments:\r
267	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
268	HighSpeed - True for High Speed Mode set, false for normal mode\r
269	\r
270	Returns:\r
271	EFI_SUCCESS\r
272	EFI_INVALID_PARAMETER\r
273	\r
274	--*/\r
275	typedef\r
276	EFI_STATUS\r
277	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE) (\r
278	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
279	IN UINT32 HighSpeed\r
280	);\r
281	\r
282	/*++\r
283	\r
284	Routine Description:\r
285	Set High Speed Mode\r
286	Arguments:\r
287	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
288	SetHostDdrMode - True for DDR Mode set, false for normal mode\r
289	\r
290	Returns:\r
291	EFI_SUCCESS\r
292	EFI_INVALID_PARAMETER\r
293	\r
294	--*/\r
295	typedef\r
296	EFI_STATUS\r
297	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE) (\r
298	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
299	IN UINT32 DdrMode\r
300	);\r
301	\r
302	\r
303	/*++\r
304	\r
305	Routine Description:\r
306	Reset the host\r
307	\r
308	Arguments:\r
309	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
310	ResetAll - TRUE to reset all\r
311	\r
312	Returns:\r
313	EFI_SUCCESS\r
314	EFI_TIMEOUT\r
315	\r
316	--*/\r
317	typedef\r
318	EFI_STATUS\r
319	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST) (\r
320	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
321	IN RESET_TYPE ResetType\r
322	);\r
323	\r
324	/*++\r
325	\r
326	Routine Description:\r
327	Reset the host\r
328	\r
329	Arguments:\r
330	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
331	Enable - TRUE to enable, FALSE to disable\r
332	\r
333	Returns:\r
334	EFI_SUCCESS\r
335	EFI_TIMEOUT\r
336	\r
337	--*/\r
338	typedef\r
339	EFI_STATUS\r
340	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD) (\r
341	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
342	IN BOOLEAN Enable\r
343	);\r
344	\r
345	/*++\r
346	\r
347	Routine Description:\r
348	Find whether these is a card inserted into the slot. If so\r
349	init the host. If not, return EFI_NOT_FOUND.\r
350	\r
351	Arguments:\r
352	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
353	\r
354	Returns:\r
355	EFI_SUCCESS\r
356	EFI_NOT_FOUND\r
357	\r
358	--*/\r
359	typedef\r
360	EFI_STATUS\r
361	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST) (\r
362	IN EFI_SD_HOST_IO_PROTOCOL *This\r
363	);\r
364	\r
365	/*++\r
366	\r
367	Routine Description:\r
368	Set the Block length\r
369	\r
370	Arguments:\r
371	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
372	BlockLength - card supportes block length\r
373	\r
374	Returns:\r
375	EFI_SUCCESS\r
376	EFI_TIMEOUT\r
377	\r
378	--*/\r
379	typedef\r
380	EFI_STATUS\r
381	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH) (\r
382	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
383	IN UINT32 BlockLength\r
384	);\r
385	\r
386	typedef EFI_STATUS\r
387	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE)(\r
388	IN EFI_SD_HOST_IO_PROTOCOL *This\r
389	);\r
390	\r
391	\r
392	\r
393	//\r
394	// Interface structure for the EFI SD Host I/O Protocol\r
395	//\r
396	struct _EFI_SD_HOST_IO_PROTOCOL {\r
397	UINT32 Revision;\r
398	HOST_CAPABILITY HostCapability;\r
399	EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND SendCommand;\r
400	EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY SetClockFrequency;\r
401	EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH SetBusWidth;\r
402	EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE SetHostVoltage;\r
403	EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE SetHostDdrMode;\r
404	EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST ResetSdHost;\r
405	EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD EnableAutoStopCmd;\r
406	EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST DetectCardAndInitHost;\r
407	EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH SetBlockLength;\r
408	EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE SetupDevice;\r
409	EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE SetHostSpeedMode;\r
410	};\r
411	\r
412	extern EFI_GUID gEfiSdHostIoProtocolGuid;\r
413	\r
414	#endif\r
415	\r