[mirror_edk2.git] / Vlv2DeviceRefCodePkg / ValleyView2Soc / SouthCluster / Include / Protocol / SdHostIo.h

/*++\r
\r
Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
\r
--*/\r
\r
\r
/*++\r
Module Name:\r
\r
  SdHostIo.h\r
\r
Abstract:\r
\r
  Interface definition for EFI_SD_HOST_IO_PROTOCOL\r
\r
--*/\r
\r
#ifndef _SD_HOST_IO_H\r
#define _SD_HOST_IO_H\r
\r
\r
// Global ID for the EFI_SD_HOST_IO_PROTOCOL\r
// {B63F8EC7-A9C9-4472-A4C0-4D8BF365CC51}\r
//\r
#define EFI_SD_HOST_IO_PROTOCOL_GUID \\r
  { 0xb63f8ec7, 0xa9c9, 0x4472, { 0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51 } }\r
\r
typedef struct _EFI_SD_HOST_IO_PROTOCOL EFI_SD_HOST_IO_PROTOCOL;\r
\r
//\r
// TODO: Move to Pci22.h\r
//\r
#define PCI_SUBCLASS_SD_HOST_CONTROLLER   0x05\r
#define PCI_IF_STANDARD_HOST_NO_DMA       0x00\r
#define PCI_IF_STANDARD_HOST_SUPPORT_DMA  0x01\r
\r
//\r
// TODO: Retire\r
//\r
#define EFI_SD_HOST_IO_PROTOCOL_REVISION_01          0x01\r
\r
//\r
// TODO: Do these belong in an Industry Standard include file?\r
//\r
// MMIO Registers definition for MMC/SDIO controller\r
//\r
#define  MMIO_DMAADR                     0x00\r
#define  MMIO_BLKSZ                      0x04\r
#define  MMIO_BLKCNT                     0x06\r
#define  MMIO_CMDARG                     0x08\r
#define  MMIO_XFRMODE                    0x0C\r
#define  MMIO_SDCMD                      0x0E\r
#define  MMIO_RESP                       0x10\r
#define  MMIO_BUFDATA                    0x20\r
#define  MMIO_PSTATE                     0x24\r
#define  MMIO_HOSTCTL                    0x28\r
#define  MMIO_PWRCTL                     0x29\r
#define  MMIO_BLKGAPCTL                  0x2A\r
#define  MMIO_WAKECTL                    0x2B\r
#define  MMIO_CLKCTL                     0x2C\r
#define  MMIO_TOCTL                      0x2E\r
#define  MMIO_SWRST                      0x2F\r
#define  MMIO_NINTSTS                    0x30\r
#define  MMIO_ERINTSTS                   0x32\r
#define  MMIO_NINTEN                     0x34\r
#define  MMIO_ERINTEN                    0x36\r
#define  MMIO_NINTSIGEN                  0x38\r
#define  MMIO_ERINTSIGEN                 0x3A\r
#define  MMIO_AC12ERRSTS                 0x3C\r
#define  MMIO_HOST_CTL2                  0x3E //hphang <- New in VLV2\r
#define  MMIO_CAP                        0x40\r
#define  MMIO_CAP2                       0x44 //hphang <- New in VLV2\r
#define  MMIO_MCCAP                      0x48\r
#define  MMIO_FORCEEVENTCMD12ERRSTAT     0x50 //hphang <- New in VLV2\r
#define  MMIO_FORCEEVENTERRINTSTAT       0x52 //hphang <- New in VLV2\r
#define  MMIO_ADMAERRSTAT                0x54 //hphang <- New in VLV2\r
#define  MMIO_ADMASYSADDR                0x58 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE0               0x60 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE1               0x64 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE2               0x68 //hphang <- New in VLV2\r
#define  MMIO_PRESETVALUE3               0x6C //hphang <- New in VLV2\r
#define  MMIO_BOOTTIMEOUTCTRL            0x70 //hphang <- New in VLV2\r
#define  MMIO_DEBUGSEL                   0x74 //hphang <- New in VLV2\r
#define  MMIO_SHAREDBUS                  0xE0 //hphang <- New in VLV2\r
#define  MMIO_SPIINTSUP                  0xF0 //hphang <- New in VLV2\r
#define  MMIO_SLTINTSTS                  0xFC\r
#define  MMIO_CTRLRVER                   0xFE\r
\r
typedef enum {\r
  ResponseNo = 0,\r
  ResponseR1,\r
  ResponseR1b,\r
  ResponseR2,\r
  ResponseR3,\r
  ResponseR4,\r
  ResponseR5,\r
  ResponseR5b,\r
  ResponseR6,\r
  ResponseR7\r
} RESPONSE_TYPE;\r
\r
typedef enum {\r
  NoData = 0,\r
  InData,\r
  OutData\r
} TRANSFER_TYPE;\r
\r
typedef enum {\r
  Reset_Auto = 0,\r
  Reset_DAT,\r
  Reset_CMD,\r
  Reset_DAT_CMD,\r
  Reset_All,\r
  Reset_HW\r
} RESET_TYPE;\r
\r
\r
typedef enum {\r
  SDMA = 0,\r
  ADMA2,\r
  PIO\r
} DMA_MOD;\r
\r
typedef struct {\r
  UINT32  HighSpeedSupport:    1;  //High speed supported\r
  UINT32  V18Support:          1;  //1.8V supported\r
  UINT32  V30Support:          1;  //3.0V supported\r
  UINT32  V33Support:          1;  //3.3V supported\r
  UINT32  SDR50Support:        1;\r
  UINT32  SDR104Support:       1;\r
  UINT32  DDR50Support:        1;\r
  UINT32  Reserved0:           1;\r
  UINT32  BusWidth4:           1;  // 4 bit width\r
  UINT32  BusWidth8:           1;  // 8 bit width\r
  UINT32  Reserved1:           6;\r
  UINT32  SDMASupport:         1;\r
  UINT32  ADMA2Support:        1;\r
  UINT32  DmaMode:             2;\r
  UINT32  ReTuneTimer:         4;\r
  UINT32  ReTuneMode:          2;\r
  UINT32  Reserved2:           6;\r
  UINT32  BoundarySize;\r
} HOST_CAPABILITY;\r
\r
/*++\r
\r
  Routine Description:\r
    The main function used to send the command to the card inserted into the SD host\r
    slot.\r
    It will assemble the arguments to set the command register and wait for the command\r
    and transfer completed until timeout. Then it will read the response register to fill\r
    the ResponseData\r
\r
  Arguments:\r
    This           - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    CommandIndex   - The command index to set the command index field of command register\r
    Argument       - Command argument to set the argument field of command register\r
    DataType       - TRANSFER_TYPE, indicates no data, data in or data out\r
    Buffer         - Contains the data read from / write to the device\r
    BufferSize     - The size of the buffer\r
    ResponseType   - RESPONSE_TYPE\r
    TimeOut        - Time out value in 1 ms unit\r
    ResponseData   - Depending on the ResponseType, such as CSD or card status\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
    EFI_OUT_OF_RESOURCES\r
    EFI_TIMEOUT\r
    EFI_DEVICE_ERROR\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND) (\r
  IN   EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN   UINT16                     CommandIndex,\r
  IN   UINT32                     Argument,\r
  IN   TRANSFER_TYPE              DataType,\r
  IN   UINT8                      *Buffer, OPTIONAL\r
  IN   UINT32                     BufferSize,\r
  IN   RESPONSE_TYPE              ResponseType,\r
  IN   UINT32                     TimeOut,\r
  OUT  UINT32                     *ResponseData OPTIONAL\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set max clock frequency of the host, the actual frequency\r
    may not be the same as MaxFrequency. It depends on\r
    the max frequency the host can support, divider, and host\r
    speed mode.\r
\r
  Arguments:\r
    This           - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    MaxFrequency   - Max frequency in HZ\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     MaxFrequency\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set bus width of the host\r
\r
  Arguments:\r
    This       - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    BusWidth   - Bus width in 1, 4, 8 bits\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     BusWidth\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set voltage which could supported by the host.\r
    Support 0(Power off the host), 1.8V, 3.0V, 3.3V\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    Voltage   - Units in 0.1 V\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     Voltage\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set Host High Speed\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    HighSpeed   - True for High Speed Mode set, false for normal mode\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     HighSpeed\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Set High Speed Mode\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    SetHostDdrMode   - True for DDR Mode set, false for normal mode\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_INVALID_PARAMETER\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     DdrMode\r
  );\r
\r
\r
/*++\r
\r
  Routine Description:\r
   Reset the host\r
\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    ResetAll  - TRUE to reset all\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  RESET_TYPE                 ResetType\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
   Reset the host\r
\r
  Arguments:\r
    This    - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    Enable  - TRUE to enable, FALSE to disable\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  BOOLEAN                    Enable\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
    Find whether these is a card inserted into the slot. If so\r
    init the host. If not, return EFI_NOT_FOUND.\r
\r
  Arguments:\r
    This      - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_NOT_FOUND\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This\r
  );\r
\r
/*++\r
\r
  Routine Description:\r
   Set the Block length\r
\r
  Arguments:\r
    This        - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
    BlockLength - card supportes block length\r
\r
  Returns:\r
    EFI_SUCCESS\r
    EFI_TIMEOUT\r
\r
--*/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH) (\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This,\r
  IN  UINT32                     BlockLength\r
  );\r
\r
typedef EFI_STATUS\r
(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE)(\r
  IN  EFI_SD_HOST_IO_PROTOCOL    *This\r
  );\r
\r
\r
\r
//\r
// Interface structure for the EFI SD Host I/O Protocol\r
//\r
struct _EFI_SD_HOST_IO_PROTOCOL {\r
  UINT32                                             Revision;\r
  HOST_CAPABILITY                                    HostCapability;\r
  EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND               SendCommand;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY        SetClockFrequency;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH              SetBusWidth;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE           SetHostVoltage;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE          SetHostDdrMode;\r
  EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST              ResetSdHost;\r
  EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD       EnableAutoStopCmd;\r
  EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST  DetectCardAndInitHost;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH           SetBlockLength;\r
  EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE               SetupDevice;\r
  EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE        SetHostSpeedMode;\r
};\r
\r
extern EFI_GUID gEfiSdHostIoProtocolGuid;\r
\r
#endif\r
\r
Commit	Line	Data
3cbfba02 DW	1	/*++\r
	2	\r
	3	Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
	4	\r
7ede8060	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
3cbfba02 DW	6	\r
	7	\r
	8	--*/\r
	9	\r
	10	\r
	11	/*++\r
	12	Module Name:\r
	13	\r
	14	SdHostIo.h\r
	15	\r
	16	Abstract:\r
	17	\r
	18	Interface definition for EFI_SD_HOST_IO_PROTOCOL\r
	19	\r
	20	--*/\r
	21	\r
	22	#ifndef _SD_HOST_IO_H\r
	23	#define _SD_HOST_IO_H\r
	24	\r
	25	\r
	26	// Global ID for the EFI_SD_HOST_IO_PROTOCOL\r
	27	// {B63F8EC7-A9C9-4472-A4C0-4D8BF365CC51}\r
	28	//\r
	29	#define EFI_SD_HOST_IO_PROTOCOL_GUID \\r
	30	{ 0xb63f8ec7, 0xa9c9, 0x4472, { 0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51 } }\r
	31	\r
	32	typedef struct _EFI_SD_HOST_IO_PROTOCOL EFI_SD_HOST_IO_PROTOCOL;\r
	33	\r
	34	//\r
	35	// TODO: Move to Pci22.h\r
	36	//\r
	37	#define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05\r
	38	#define PCI_IF_STANDARD_HOST_NO_DMA 0x00\r
	39	#define PCI_IF_STANDARD_HOST_SUPPORT_DMA 0x01\r
	40	\r
	41	//\r
	42	// TODO: Retire\r
	43	//\r
	44	#define EFI_SD_HOST_IO_PROTOCOL_REVISION_01 0x01\r
	45	\r
	46	//\r
	47	// TODO: Do these belong in an Industry Standard include file?\r
	48	//\r
	49	// MMIO Registers definition for MMC/SDIO controller\r
	50	//\r
	51	#define MMIO_DMAADR 0x00\r
	52	#define MMIO_BLKSZ 0x04\r
	53	#define MMIO_BLKCNT 0x06\r
	54	#define MMIO_CMDARG 0x08\r
	55	#define MMIO_XFRMODE 0x0C\r
	56	#define MMIO_SDCMD 0x0E\r
	57	#define MMIO_RESP 0x10\r
	58	#define MMIO_BUFDATA 0x20\r
	59	#define MMIO_PSTATE 0x24\r
	60	#define MMIO_HOSTCTL 0x28\r
	61	#define MMIO_PWRCTL 0x29\r
	62	#define MMIO_BLKGAPCTL 0x2A\r
	63	#define MMIO_WAKECTL 0x2B\r
	64	#define MMIO_CLKCTL 0x2C\r
	65	#define MMIO_TOCTL 0x2E\r
	66	#define MMIO_SWRST 0x2F\r
	67	#define MMIO_NINTSTS 0x30\r
	68	#define MMIO_ERINTSTS 0x32\r
	69	#define MMIO_NINTEN 0x34\r
70	#define MMIO_ERINTEN 0x36\r
71	#define MMIO_NINTSIGEN 0x38\r
72	#define MMIO_ERINTSIGEN 0x3A\r
73	#define MMIO_AC12ERRSTS 0x3C\r
74	#define MMIO_HOST_CTL2 0x3E //hphang <- New in VLV2\r
75	#define MMIO_CAP 0x40\r
76	#define MMIO_CAP2 0x44 //hphang <- New in VLV2\r
77	#define MMIO_MCCAP 0x48\r
78	#define MMIO_FORCEEVENTCMD12ERRSTAT 0x50 //hphang <- New in VLV2\r
79	#define MMIO_FORCEEVENTERRINTSTAT 0x52 //hphang <- New in VLV2\r
80	#define MMIO_ADMAERRSTAT 0x54 //hphang <- New in VLV2\r
81	#define MMIO_ADMASYSADDR 0x58 //hphang <- New in VLV2\r
82	#define MMIO_PRESETVALUE0 0x60 //hphang <- New in VLV2\r
83	#define MMIO_PRESETVALUE1 0x64 //hphang <- New in VLV2\r
84	#define MMIO_PRESETVALUE2 0x68 //hphang <- New in VLV2\r
85	#define MMIO_PRESETVALUE3 0x6C //hphang <- New in VLV2\r
86	#define MMIO_BOOTTIMEOUTCTRL 0x70 //hphang <- New in VLV2\r
87	#define MMIO_DEBUGSEL 0x74 //hphang <- New in VLV2\r
88	#define MMIO_SHAREDBUS 0xE0 //hphang <- New in VLV2\r
89	#define MMIO_SPIINTSUP 0xF0 //hphang <- New in VLV2\r
90	#define MMIO_SLTINTSTS 0xFC\r
91	#define MMIO_CTRLRVER 0xFE\r
92	\r
93	typedef enum {\r
94	ResponseNo = 0,\r
95	ResponseR1,\r
96	ResponseR1b,\r
97	ResponseR2,\r
98	ResponseR3,\r
99	ResponseR4,\r
100	ResponseR5,\r
101	ResponseR5b,\r
102	ResponseR6,\r
103	ResponseR7\r
104	} RESPONSE_TYPE;\r
105	\r
106	typedef enum {\r
107	NoData = 0,\r
108	InData,\r
109	OutData\r
110	} TRANSFER_TYPE;\r
111	\r
112	typedef enum {\r
113	Reset_Auto = 0,\r
114	Reset_DAT,\r
115	Reset_CMD,\r
116	Reset_DAT_CMD,\r
117	Reset_All,\r
118	Reset_HW\r
119	} RESET_TYPE;\r
120	\r
121	\r
122	typedef enum {\r
123	SDMA = 0,\r
124	ADMA2,\r
125	PIO\r
126	} DMA_MOD;\r
127	\r
128	typedef struct {\r
129	UINT32 HighSpeedSupport: 1; //High speed supported\r
130	UINT32 V18Support: 1; //1.8V supported\r
131	UINT32 V30Support: 1; //3.0V supported\r
132	UINT32 V33Support: 1; //3.3V supported\r
133	UINT32 SDR50Support: 1;\r
134	UINT32 SDR104Support: 1;\r
135	UINT32 DDR50Support: 1;\r
136	UINT32 Reserved0: 1;\r
137	UINT32 BusWidth4: 1; // 4 bit width\r
138	UINT32 BusWidth8: 1; // 8 bit width\r
139	UINT32 Reserved1: 6;\r
140	UINT32 SDMASupport: 1;\r
141	UINT32 ADMA2Support: 1;\r
142	UINT32 DmaMode: 2;\r
143	UINT32 ReTuneTimer: 4;\r
144	UINT32 ReTuneMode: 2;\r
145	UINT32 Reserved2: 6;\r
146	UINT32 BoundarySize;\r
147	} HOST_CAPABILITY;\r
148	\r
149	/*++\r
150	\r
151	Routine Description:\r
152	The main function used to send the command to the card inserted into the SD host\r
153	slot.\r
154	It will assemble the arguments to set the command register and wait for the command\r
155	and transfer completed until timeout. Then it will read the response register to fill\r
156	the ResponseData\r
157	\r
158	Arguments:\r
159	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
160	CommandIndex - The command index to set the command index field of command register\r
161	Argument - Command argument to set the argument field of command register\r
162	DataType - TRANSFER_TYPE, indicates no data, data in or data out\r
163	Buffer - Contains the data read from / write to the device\r
164	BufferSize - The size of the buffer\r
165	ResponseType - RESPONSE_TYPE\r
166	TimeOut - Time out value in 1 ms unit\r
167	ResponseData - Depending on the ResponseType, such as CSD or card status\r
168	\r
169	Returns:\r
170	EFI_SUCCESS\r
171	EFI_INVALID_PARAMETER\r
172	EFI_OUT_OF_RESOURCES\r
173	EFI_TIMEOUT\r
174	EFI_DEVICE_ERROR\r
175	\r
176	--*/\r
177	typedef\r
178	EFI_STATUS\r
179	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND) (\r
180	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
181	IN UINT16 CommandIndex,\r
182	IN UINT32 Argument,\r
183	IN TRANSFER_TYPE DataType,\r
184	IN UINT8 *Buffer, OPTIONAL\r
185	IN UINT32 BufferSize,\r
186	IN RESPONSE_TYPE ResponseType,\r
187	IN UINT32 TimeOut,\r
188	OUT UINT32 *ResponseData OPTIONAL\r
189	);\r
190	\r
191	/*++\r
192	\r
193	Routine Description:\r
194	Set max clock frequency of the host, the actual frequency\r
195	may not be the same as MaxFrequency. It depends on\r
196	the max frequency the host can support, divider, and host\r
197	speed mode.\r
198	\r
199	Arguments:\r
200	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
201	MaxFrequency - Max frequency in HZ\r
202	\r
203	Returns:\r
204	EFI_SUCCESS\r
205	EFI_TIMEOUT\r
206	--*/\r
207	typedef\r
208	EFI_STATUS\r
209	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY) (\r
210	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
211	IN UINT32 MaxFrequency\r
212	);\r
213	\r
214	/*++\r
215	\r
216	Routine Description:\r
217	Set bus width of the host\r
218	\r
219	Arguments:\r
220	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
221	BusWidth - Bus width in 1, 4, 8 bits\r
222	\r
223	Returns:\r
224	EFI_SUCCESS\r
225	EFI_INVALID_PARAMETER\r
226	\r
227	--*/\r
228	typedef\r
229	EFI_STATUS\r
230	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH) (\r
231	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
232	IN UINT32 BusWidth\r
233	);\r
234	\r
235	/*++\r
236	\r
237	Routine Description:\r
238	Set voltage which could supported by the host.\r
239	Support 0(Power off the host), 1.8V, 3.0V, 3.3V\r
240	Arguments:\r
241	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
242	Voltage - Units in 0.1 V\r
243	\r
244	Returns:\r
245	EFI_SUCCESS\r
246	EFI_INVALID_PARAMETER\r
247	\r
248	--*/\r
249	typedef\r
250	EFI_STATUS\r
251	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE) (\r
252	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
253	IN UINT32 Voltage\r
254	);\r
255	\r
256	/*++\r
257	\r
258	Routine Description:\r
259	Set Host High Speed\r
260	Arguments:\r
261	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
262	HighSpeed - True for High Speed Mode set, false for normal mode\r
263	\r
264	Returns:\r
265	EFI_SUCCESS\r
266	EFI_INVALID_PARAMETER\r
267	\r
268	--*/\r
269	typedef\r
270	EFI_STATUS\r
271	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE) (\r
272	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
273	IN UINT32 HighSpeed\r
274	);\r
275	\r
276	/*++\r
277	\r
278	Routine Description:\r
279	Set High Speed Mode\r
280	Arguments:\r
281	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
282	SetHostDdrMode - True for DDR Mode set, false for normal mode\r
283	\r
284	Returns:\r
285	EFI_SUCCESS\r
286	EFI_INVALID_PARAMETER\r
287	\r
288	--*/\r
289	typedef\r
290	EFI_STATUS\r
291	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE) (\r
292	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
293	IN UINT32 DdrMode\r
294	);\r
295	\r
296	\r
297	/*++\r
298	\r
299	Routine Description:\r
300	Reset the host\r
301	\r
302	Arguments:\r
303	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
304	ResetAll - TRUE to reset all\r
305	\r
306	Returns:\r
307	EFI_SUCCESS\r
308	EFI_TIMEOUT\r
309	\r
310	--*/\r
311	typedef\r
312	EFI_STATUS\r
313	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST) (\r
314	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
315	IN RESET_TYPE ResetType\r
316	);\r
317	\r
318	/*++\r
319	\r
320	Routine Description:\r
321	Reset the host\r
322	\r
323	Arguments:\r
324	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
325	Enable - TRUE to enable, FALSE to disable\r
326	\r
327	Returns:\r
328	EFI_SUCCESS\r
329	EFI_TIMEOUT\r
330	\r
331	--*/\r
332	typedef\r
333	EFI_STATUS\r
334	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD) (\r
335	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
336	IN BOOLEAN Enable\r
337	);\r
338	\r
339	/*++\r
340	\r
341	Routine Description:\r
342	Find whether these is a card inserted into the slot. If so\r
343	init the host. If not, return EFI_NOT_FOUND.\r
344	\r
345	Arguments:\r
346	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
347	\r
348	Returns:\r
349	EFI_SUCCESS\r
350	EFI_NOT_FOUND\r
351	\r
352	--*/\r
353	typedef\r
354	EFI_STATUS\r
355	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST) (\r
356	IN EFI_SD_HOST_IO_PROTOCOL *This\r
357	);\r
358	\r
359	/*++\r
360	\r
361	Routine Description:\r
362	Set the Block length\r
363	\r
364	Arguments:\r
365	This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
366	BlockLength - card supportes block length\r
367	\r
368	Returns:\r
369	EFI_SUCCESS\r
370	EFI_TIMEOUT\r
371	\r
372	--*/\r
373	typedef\r
374	EFI_STATUS\r
375	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH) (\r
376	IN EFI_SD_HOST_IO_PROTOCOL *This,\r
377	IN UINT32 BlockLength\r
378	);\r
379	\r
380	typedef EFI_STATUS\r
381	(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE)(\r
382	IN EFI_SD_HOST_IO_PROTOCOL *This\r
383	);\r
384	\r
385	\r
386	\r
387	//\r
388	// Interface structure for the EFI SD Host I/O Protocol\r
389	//\r
390	struct _EFI_SD_HOST_IO_PROTOCOL {\r
391	UINT32 Revision;\r
392	HOST_CAPABILITY HostCapability;\r
393	EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND SendCommand;\r
394	EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY SetClockFrequency;\r
395	EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH SetBusWidth;\r
396	EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE SetHostVoltage;\r
397	EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE SetHostDdrMode;\r
398	EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST ResetSdHost;\r
399	EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD EnableAutoStopCmd;\r
400	EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST DetectCardAndInitHost;\r
401	EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH SetBlockLength;\r
402	EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE SetupDevice;\r
403	EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE SetHostSpeedMode;\r
404	};\r
405	\r
406	extern EFI_GUID gEfiSdHostIoProtocolGuid;\r
407	\r
408	#endif\r
409	\r